CyPins 2.0 on PSoC4 | Cypress Semiconductor
CyPins 2.0 on PSoC4
I placed a CyPins component and am trying to determine the in-reset state of the pin on the PSoC4245. The cy_pins_v2_0.pdf document states that there should be a "Reset" tab, which does not exist for me, and does not describe a "Clocking" tab which does exist. I've verified that I am indeed using the cy_pins 2.0 component so I think there is a documentation issue. Please see the attached screen shot, showing that I am using a cy_pins v2.0 component and that there is a "Clocking" tab instead of a "Reset" tab.
What is the state of a pin component when the device is being held in reset (XRES=0)? I understand that after initial device configuration the "Initial State" field of the General tab under the Pins tab determins what the state of the pin will be, but I'm looking for the state of the pin while the PSoC4245 is in reset, not after configuration.
Most microcontrollers turn all their I/O pins into high impedance inputs, and I suspect that is also the case for the PSoC4245, but I'm looking for a definitive answer, in particualr whether there are any pull-up or pull-down resistors active in the PSoC while the device is in reset.