Creation of a parallel slave interface (GPIO expander) | Cypress Semiconductor
Creation of a parallel slave interface (GPIO expander)
I want to create a GPIO expander on a PSOC4, but not for a serial interface like SPI/I2C. Instead, I want to interface with a 8-bit data bus. There are many GPIO expander devices for SPI/I2C with several features (even bit-wise input/output functions), but it seems that there are only few to zero devices with parallel interface and extended features (someone might still know the 82C55, for example).
So, I want to create a device with a 8-bit bidirectional data bus, read/write and chip-select strobes as well as some address bits (e.g. for selecting the IO functions and configuring the slave device).
As far as I understand the UDB capabilities, I should use the PI (parallel in) and PO (parallel out) functions of the UDB.
However, I don't get the starting point, e.g. how to synch the I/O operation with the read/write/CS strobes. If someone can help me to build up the parallel interface or pointing into the right direction, this would be great.
Currently I only have some concepts, but they all seem to lead to a 'big' CPU overhead managing the configuration of the ports, which leads to a second problem: if most of the configuration and data transfer to/from the ports to the parallel interface is done by the CPU, I assume that the access timing of the ports will be in a very large area. So, the question is if it's possible to let the UDB do most of the port bit configuration and especially the data transfer.
The questions in short:
1) how to create a parallel slave interface for a 8-bit data bus with read/write/chip-select strobes and address inputs
2) how to keep access timings small