Configuring SCB IO Pins to LVTTL rather than CMOS levels | Cypress Semiconductor
Configuring SCB IO Pins to LVTTL rather than CMOS levels
Does anyone know if it is possible to set the logic thresholds for the RX input pin of an SCB component is the same way as you can for a discrete IO pin? The architecture seems to suggest it should be possible in hardware but I cannot find how to configure it in PSoC Creator.
For background, I am trying to interface with a FT230X FTDI USB converter chip which has IO at 3.3V maximum, but with 5V tolerance on the inputs. My PSoC (actually it is a PRoC BLE Module, but I posted here because this question should apply to any PSoC/PRoC 4 chip) has to run at 5V for other reasons. It works fine as a prototype, but I am concerned that the CMOS high logic level is marginal (spec says 0.7*VCC minimum = 3.5V). Actual tests indicate the threshold is 2.2V on the prototype, but I do not want to chance my arm! The LVTTL specification of 2V minimum would be safe, but I do not know how to set this for the SCB component as opposed to a Pins component.
Since the threshold setting is per port, I layed out my PCB so one other 3.3V input was on the same port as the SCB expecting that setting that pin to LVTTL would set the entire port including the SCB RX (and TX). But when I try doing that in PSoC Creator 3.3 I get the following error:
pft.M0032:Pin Error: (Mixed Input Threshold. Cannot assign 'USB_ON(0)' with Input Threshold LVTTL to physical port 1 where '\SCB_2:tx(0)\' with Input Threshold CMOS is already placed.).
This is followed by error messages about the SCB rx and tx pins not having the same <vtrip> as the pin USB_ON.
But there is nothing on the SCB configuration about setting the Input Threshold.