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UART between PSOC3 and PSOC1 | Cypress Semiconductor

UART between PSOC3 and PSOC1

Summary: 9 Replies, Latest post by danaaknight on 25 Apr 2014 05:58 AM PDT
Verified Answers: 0
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Luke_skywalker's picture
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3 posts

Helo,

I'm trying to configure UART between PSOC3 and PSOC1. I'm new and I don't know where I make misteake. I would make fullduplex communication (in my example I want to send data from PSOc3 to PSOC1). Have you got some examples of this kind of UART?  I atach my files.

Attachments: 
user_14586677's picture
User
7648 posts

Both PSOC 1 and PSOC 3 have example UART programs you can use.

 

In Creator, "File", "Example Project"

 

In Designer, "Design Catalog" on opening page, then "Launch Example Project" link.

 

Regards, Dana.

user_1377889's picture
User
10803 posts

Most common mistakes are

- Baud rate setting / required clock

- interrupts not enabled and using functions that requires ints

- connection

- not or wrong status checking before read / write

When you have got a logic analyzer or a skope you could check out everything for yourself.

 

Bob

user_1377889's picture
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10803 posts

Looks like baud rates do not match: PSoC1 600bd PSoC3 9600Bd

24MHz / 8 / 16 / 39 / 8 = ~ 600

Bob

Luke_skywalker's picture
User
3 posts

VC3 Source is VC1 and this 24MHz/8/39 = ~9600

user_1377889's picture
User
10803 posts

Ooops, overlooked.

 

Bob

user_14586677's picture
User
7648 posts

You have Rx and Tx swapped between the two PSOCs ?

Both at TTL or RS232 levels, not one at TTL, the other

at RS232 level ?

 

Regards, Dana.

Luke_skywalker's picture
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3 posts

Yes, I swapped TX and RX and both are TTL levels,

Luke

hli
user_78878863's picture
User
2759 posts

Are you able to get both (PSoC3 and PSoC1) to talk properly with your PC stand-alone? That way you can find out whether one of the boards is at fault, or if its the connection.

Also, look at the signals with a scope or logic analyzer, to check that everything is as expected.

user_14586677's picture
User
7648 posts

I am sure you have though of these -

 

1) With scope look at bit time on each Tx side to see it is what you expected.

Same for drive levels.

2) Tx configed as strong drive output, initial state "1".

3) Rx configed as input, Hi Z digital.

4) 3 wire cable, grounds connected, Tx to Rx, Rx to Tx.

5) Clocks auto started in clocks tab of cydwr workspace view

6) Vdd both sides of link same. eg. output levels both at 5V or 3.3 V

7) Components and ISRs on each side started.

8) Boot.tpl in root directory PSOC 1 modified ISR vector table for

digital block UART is in, if using interrupts.

 

Normal
0

false
false
false

EN-US
X-NONE
X-NONE

MicrosoftInternetExplorer4

/* Style Definitions */
table.MsoNormalTable
{mso-style-name:"Table Normal";
mso-tstyle-rowband-size:0;
mso-tstyle-colband-size:0;
mso-style-noshow:yes;
mso-style-priority:99;
mso-style-qformat:yes;
mso-style-parent:"";
mso-padding-alt:0in 5.4pt 0in 5.4pt;
mso-para-margin-top:0in;
mso-para-margin-right:0in;
mso-para-margin-bottom:10.0pt;
mso-para-margin-left:0in;
line-height:115%;
mso-pagination:widow-orphan;
font-size:11.0pt;
font-family:"Calibri","sans-serif";
mso-ascii-font-family:Calibri;
mso-ascii-theme-font:minor-latin;
mso-fareast-font-family:"Times New Roman";
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mso-hansi-theme-font:minor-latin;}

http://www.cypress.com/?id=4&rID=36720

http://www.planetpsoc.com/psoc1-articles-digital/13-basics-of-psoc-gpio.html?start=6

http://www.planetpsoc.com/psoc1-articles-analog/57-psoc-1-adcs--the-five-golden-rules.html

http://www.planetpsoc.com/component/content/article/43-writing-a-c-isr.html

 

9) Global interrupts enabled both sides.

 

Regards, Dana.

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