You are here

Sudden strong noise from the analog OpAmp | Cypress Semiconductor

Sudden strong noise from the analog OpAmp

Summary: 10 Replies, Latest post by danaaknight on 16 Jul 2015 04:50 AM PDT
Verified Answers: 0
Last post
Log in to post new comments.
user_501149274's picture
User
118 posts

Hi,

I am building a device that works like a phonograph. I am using a piezo disc as a microphone and a pcos3 kit for the amplifying, filtering and processing . But I a getting a terrible sudden noise at the output of the OpAmp for some seconds.

Maybe somebody knows the reason?

I attached the amplifier circuit.

THANKS!

user_1377889's picture
User
10803 posts

The project you supplied misses the main loop. main() will start over and over again including PSoC component initialization.

Place at least a while(1); infinitive loop after your initialization.

 

Bob

user_501149274's picture
User
118 posts

Ok. Thanks!!!

user_14586677's picture
User
7648 posts

To Bobs point you commented out your for(;;) so application falls out of main().

 

Note you use 2 Vrefs and 2 OpAmps to buffer the two Vrefs. You really only need to do

the left one and route its output to OpAmp2's NI input. Saving an OpAmp resource.

 

 

Regards, Dana.

user_501149274's picture
User
118 posts

Great! Thanks! I thought is not possible...

 

 

user_14586677's picture
User
7648 posts

One additional consideration I am sure you are aware of is the exceptionally high Z levels

at the input amp, fdbk R values, etc.., very subject to noise pickup. So PCB layout very

important.

 

https://www.dropbox.com/s/2h96beh1fbvz4e2/noise_notes.zip?dl=0

 

http://www.cypress.com/?rID=39157&source=an61290     AN54181 - Getting Started with PSoC 3

http://www.cypress.com/?rID=39677     AN57821 - PSoC® 3, PSoC 4, and PSoC 5LP Mixed Signal Circuit Board Layout Considerations

http://www.cypress.com/?rID=40247     AN58827 - PSoC® 3 and PSoC 5LP Internal Analog Routing Considerations

http://www.cypress.com/?rID=39974     AN58304 - PSoC® 3 and PSoC 5LP – Pin Selection for Analog Designs

 

Regards, Dana.

user_501149274's picture
User
118 posts

Thanks!

As regular you are very helpful :)

 

user_342122993's picture
User
804 posts

Piona,

attached an example from Analog Devices AN-106 on how to interface Piezo transducer with OPAMP.

 

user_14586677's picture
User
7648 posts

You can't use that AD circuit as shown, its meant to operate on split supplies.

You can do a single supply version of it, eg. still bootstrap with + fdbk to raise

Z levels, but then bias circuit Z becomes the problem for practical values. Maybe

a real JFET current source would permit that.

 

As an aside the 10 uF block cap in that circuit can't be an ordinary electrolytic,

it has to have super low leakage to avoid latchup in the OpAmp.

 

Regards, Dana.

user_501149274's picture
User
118 posts

HI,

To interface a piezo transducer I used a single supply circuit of charge amp.

Regarding the big Z in the circuit

"still bootstrap with + fdbk to raise Z levels, but then bias circuit Z becomes the problem for practical values" - what does it mean?

All piezo interfaces containt big Z impedance. Maybe it is reasonable to use external Opamp and not Psoc?

 

Anna

user_14586677's picture
User
7648 posts

The judgment to use external OpAmp or IA should be made on

noise, bias currents, offsets, etc.. The primary issue here is the

biasing solution and its affects on loading of the Piezo.

You might consider doing some spice simulations to get a general idea

of how to proceed.

 

Note board prep for real hi z applications not trivial. Google "Bob Pease"

on ap notes for bias current and pcb design factors.

Regards, Dana.

Log in to post new comments.