ripple on external DSM ADC reference depending on ADC clock | Cypress Semiconductor
ripple on external DSM ADC reference depending on ADC clock
Hello, I'm trying to use an external reference voltage (1.25V) in my design. The problem is that I've got a ripple (+-50mV) which depends on the conversion rate / ADC-clock. I've selectet 'Externel Vref on P0', do I have to do more? It seems that this GPIO is not very high impedance or so..? If I switch the reference to internal, my external reference looks nice, so I excluded problems with my external design.
Had anyone ever a similar problem?