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Funny VDAC output signal, slow voltage settle | Cypress Semiconductor

Funny VDAC output signal, slow voltage settle

Summary: 5 Replies, Latest post by klauskvik on 11 Sep 2015 04:49 AM PDT
Verified Answers: 3
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kkragelund_1477131's picture
User
1 post

Hi

I am using the PSOC kit with the CY8C3866 (ES2 silicon)

I have to use the DAC, but the output signal is strange (see attachment). When I set the DAC to a new value, it does not settle like it should in less than 5us

The DAC output is directly into a 1M scope input, DC coupled.

The code, somewhat snipped: (also attached)

// Enable DACs

VDAC8_1_Start();

 

while (1) {

VDAC8_1_SetValue(100);

 

for (i=1;i<100;i++) {

value1 = 100;

}

VDAC8_1_SetValue(0);

 

for (i=1;i<100;i++) {

value1 = 100;

}

}

user_14586677's picture
User
7648 posts

Keep in mind the VDAC output is NOT a voltage source. For the 1V range

its output Z is 4K , 4V range 16K, typical values. So if you have any signif-

icant C on pin that will show up as RC charging waveshape.

 

Your waveshape looks like C ramping from a current source. Or RC over a short

span.

 

I noticed you are using an ES version of PSOC 3, and old Creator. There have

been many bug fixes and components fixes/upgrades since then. Creator is now

3.2 SP1. You should, if you can, upgrade.

 

Regards, Dana.

 

user_14586677's picture
User
7648 posts

If you want a true V source out of the VDAC pass it thru OpAmp configed as

buffer, high power setting.

 

Regards, Dana.

user_342122993's picture
User
804 posts

Also make sure that scope probe is balanced. There is a connector on front face of scope with 1kHz output and there is adjustment capacitor on the probe. Hook it up and tune capacitor to make square wave.

klauskvik's picture
User
2 posts

Thank you for the comments. It is really embarrasing, it was the probe compensation ;-)

klauskvik's picture
User
2 posts

Thank you for the comments. It is really embarrasing, it was the probe compensation ;-)

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