Caution when putting the PSoC to sleep. | Cypress Semiconductor
Caution when putting the PSoC to sleep.
At times it so happens that we may maintain the status of a pin through control register. That works well on all cases except the case where the PSoC is put to sleep and there is also a need to maintain the pin high.
The following is the reason,
when the device is put to sleep,the control registers are unpowered while the pin is still maintained high. Now, when the device wakes up and the power is restored to the control register, the bit is set to zero(0). Even if we add a firm ware to set the control register bit to one(1), the pin logic still momentarily sees a zero(0) or a glitch occurs.
Suggestion: Control the pin directly, instead of using a control register in such circumstances.