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ADC Full Scale on PSoC3 CY8C3846AXE-176 | Cypress Semiconductor

ADC Full Scale on PSoC3 CY8C3846AXE-176

Summary: 4 Replies, Latest post by 3Lance on 24 Jun 2014 03:40 PM PDT
Verified Answers: 0
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user_2432504's picture
User
71 posts

Hi to All,

I'm using the DS ADC in single-ended mode, 13-bit resolution, internal 1.024V reference, input range from 0 to 6*Vref, buffer mode tuned to R/R and the buffer gain set to 4. The ADC is fed  with a constant 1.3V DC.

This setup should force the full range on the ADC, therefore 8191 lsbs (in fact around 8520 triggered by the compression/expansion mecanism in the modulator which is explained in the datasheet of the component).

However the displayed value stops at 6200 lsb even if I sligtly increase the input voltage.

On the other way if I go down to 0V (very closed to the analog floor) , the ADC is able to display 2 lsbs.

Any clue or idea about this behavior?

Michel

 

 

user_1377889's picture
User
10803 posts

You cannot reach the 6 * Vref, because the value of 6 * 1.024 = 6.144 exceeds the maximum voltage of an input-pin of 5.0V.

 

Bob

user_1377889's picture
User
10803 posts

Just calculating 8192 / 6.144 * 5 = 6667 which gets near your observed value,

 

Bob

user_14586677's picture
User
7648 posts

If you have Rail to Rail mode set, its actually not R-R performance. See input

range below for these settings. If you want real R-R performace you have to bypass

the input buffer, which means no G is available for the A/D front end. So your 1.3 V

X 4 = 5.2V in R-R mode is not accurate, as you can see.

 

Note the range when bypass is set is only 100 mV outside the rails, but good enough

for measuring power supply V or high side current sensing Rs.

 

Regards, Dana.

 

 

 

user_2432504's picture
User
71 posts

Bob & Dana,

Thx a lot for your help, in fact the answer from Bob was the trigger to my miss-interpretation of the parameters for an input set upto 6*Vref.

Michel

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