SPIM or SPIS reset pin | Cypress Semiconductor
SPIM or SPIS reset pin
Can anyone tell me please, which is the active state of "reset pin" on ant SPI componet ? I mean is "0" active or is "1" is active?
I puting a quote from de SPIM component pdf.
reset – Input
Resets the SPI state machine to the idle state. This throws out any data that was currently being transmitted or received but does not clear data from the FIFO that has already been received or is ready to be transmitted
Thank tou in advance.