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Low Pass Filter Design | Cypress Semiconductor

Low Pass Filter Design

Summary: 2 Replies, Latest post by danaaknight on 03 Mar 2013 04:51 AM PST
Verified Answers: 2
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rteg's picture
8 posts


   Could any help me in designing a low pass filter with 50 hz cutoff frequency. The input to Low Pass Filter is The output of PGA. I didnt understand how can we feed PGA out put to filter.


user_1377889's picture
9284 posts

The filters in PSoC3 and 5 are digital filters, not analog. So you'll have to exchange the places of the ADC and the Filter, feeding the analog signal out of the PGA into the ADC and transferring it into the filter and then to memory or whatever you'd like to.

The last two transfers are often made with DMA, so there is no load on the CPU for that. When starting a new project in creator 2.2 there is a filter-example that covers most of the techniques needed, Modify that for your needs.


Happy coding


user_14586677's picture
7646 posts

There is a whole class of analog active  filters that PSOC can implement

using its OpAmps, state variable, simple ladder, sallen-key, biquad.......

Here is a good tool to get RC values for this purpose -


Also PSOC has some simple RC filters onboard, see this thread -


Regards, Dana.

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