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Timing a signal using a Counter | Cypress Semiconductor

Timing a signal using a Counter

Summary: 3 Replies, Latest post by Gautam Das on 12 Nov 2011 11:19 AM PST
Verified Answers: 0
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Rocketmagnet's picture
131 posts


I just cannot seem to understand how the Counter component works. It seems simple, and yet my design doesn't work.

I have an input pin connected to a signal which is low most of the time, but occasionally sees high pulses lasting a few tens of milliseconds. These occur at random intervals.

What I would like is to keep a count of the total high time of this signal, and generate an interrupt when it passes some threshold.

I have attached an image of my schematic. The counter is configured as a UDB down counter, period 200, interrupt on TC.

Please set me straight.



Rocketmagnet's picture
131 posts

 Sorry, I forgot that the input signal is actually inverted, which is why I needed to put that not gate in there.


user_460349's picture
1362 posts

Are you trying to count how many high pulses?


How long is the input stay high?

dasg's picture
Cypress Employee
730 posts

Hi Rocketmagnet,


What I understand from your requirement is that you need to use a counter to count the high period of every pulse and also issue an interrupt when the High period exceeds a threshold, is that right?


If that is the case, then one way to implement it is to use the Capture feature to determine the High period. The Compare value has to be set according to your threshold requirement. Upon compare match, an interrupt is generated if "Interrupt on Compare" is enabled or the "comp" terminal on the component also gives a pulse. ISR can be connected to this terminal to execute your code on interrupt.


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