Minimizing current in hibernate mode of PSoC3 | Cypress Semiconductor
Minimizing current in hibernate mode of PSoC3
I have started to using low power modes of PSoC 3 and i'm wondering how to minimize current consumption in hibernate mode.
I am using CY8C3866LTI-068ES3 device, i have made blank project - without any components, i have changed some parameters such as:
- disabled pll,
- master clock changed to IMO (3MHz),
- completly disable debugging port.
On my PCB i have 3.3V connected to: Vdda, Vcca, Vddio0, Vddio1, Vddio2, Vddio3, Vddd, Vccd
The ground is connected to: Vbat, Vb, Vssb, Vssd, Ex_Pad
All other pins are unconnected.
The only two lines in my code are:
CyPmSaveClocks(); //Save Clock configuration before entering Hibernate
CyPmHibernate(); // put the device into hibernate mode
When i measure current taken by PSoC 3 (after starting this program) it's about 100 uA - when in datasheet it says that it supouse to be about 200nA.
I'm wondering where such big difference comes from?
What can i change to minimize current consumption?
I was testing with forcing some pins to be outputs in high impedance, some to inputs and etc. - but any such move leads to bigger current.
I have also tried "Hibernate_WakeupWithPICU" (application note and example) - but the minimum current is the same (over 100uA).
I have attached example project which takes 100uA.
Thanks in advance for any help/hints.