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I do not know the best way to measure a 300 pF capacator for pulse width. | Cypress Semiconductor

I do not know the best way to measure a 300 pF capacator for pulse width.

Summary: 5 Replies, Latest post by pnielsen3 on 12 Jan 2013 03:51 PM PST
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pnielsen3's picture
130 posts

I am measuring the change in a 300pF capacator. I have taked precautions to drive the shield with the feedback from my voltage follower. The capacator will change a maximum of 80pF for temperature and fumidity. For test pruproses I am using a 500hz clock through a series resistor(10m) through the 300 pF capacator. I am able to get very good RC curves. I have tried the camparator with and without clock sync.

After my comparator what is the best way to measure the pulse width time? I am trying to achieve 200 to 800 Hertz.


Thank You.

user_1377889's picture
9307 posts

Measuring the number of pulses for a fixed time, eg. gated by a PWM, count during High-time, calculations, display and set up during low-time seems for me the easiest way to do.



user_14586677's picture
7646 posts

Several methods could be used -

1) RC, meaasure the time it takes to go from 0 to some voltage, fed by R.
2) C fed by constant current source, meaasure the time it takes to go from 0 to some voltage.
3) Embed C in an oscillator loop and measure frequency.

The onboard current source is accurate to 1%. The issue with your 10 M R is charging current
is in the range of leakage effects corrupting the accuracy of the charging time. Also you
have the concern over the 10 M accuracy, and its susceptability to humidity.

So lets look at 2). So Q = C x V, I = C dV/dT, C = ( I x dT ) / dV. And dV = ( I x dT ) / C
and dT = ( C x dV ) / I

Lets decide to measure a ramp 0 to 2V. We use an open drain output to reset cap to 0V. Choose
100 uA as a starting point. Then for a nominal 300 pF to charge from 0 to 2 V dT =
( 300 x 10**-12 x 2 ) / 100**-6 = 6 uS. We will use a comparator to trigger or stop a counter.
If we want a resolution of 10 pF we need a counter that can count from 0 - 30, therefore counter
clk nominal would be 6 uS / 30 = 200 nS, 5 mhz.The comparator delay is 75 nS nominal with 50 mV
overdrive. So thats a little worrisome. So lets use 10 uA as charging current. That way comparator
errors basically drop out, You can do calculations to confirm that.

With 10 uA charging, dT = 60 uS, counter clock become 2 uS. Also offset to ground when reset
is negligible with 10 uA, eg. you are starting from 0 Volts essentially. So place a current
source, tied to a pin, the cap will be connected to it. Pin configured analog in. Place another
pin, also tied to cap, That is open drain low. Place a clk, 500 Khz, and an 8 bit counter with
enable and capture. Comparator out goes to counter capture pin. Also attach an ISR to comparator

Procedure -
1) Turn on I source.
2) Turn on open drain low pin to discharge cap.
3) Turn off open drain low pin.Cap begins charging.
4) Start counter or enable it.
5) When comparator trips, ISR fires, read counter capture register, each count = 2 uS
6) Compute C from ( I x dT ) / dV

Note, to get rid of error related to starting counter simultaneously with open drain turning off
to initiate ramp, hook the counter enable to a staus register along with drivbe to open drain low

The same basic approach, - I source, can be used, but use a lower R charging to remove leakage effects.
Calculations involve exponentials, so more code space, or a table or normalized numbers to use in calculation.
little more involved.

Do an error analysis to make sure you meet your goals.

Regards, Dana.

user_14586677's picture
7646 posts

You might be able to use only one pin, looking at the options. So pin is connected to cap

and functions as a resettable input.


Regards, Dana.


user_14586677's picture
7646 posts

Here is one other possible approach -


Regards, Dana.

pnielsen3's picture
130 posts

 Thank You all

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