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Fastest way to compare two shiftregisters | Cypress Semiconductor

Fastest way to compare two shiftregisters

Summary: 5 Replies, Latest post by Gautam Das on 24 Jan 2012 05:11 AM PST
Verified Answers: 0
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abnoname's picture
50 posts


I need to compare two shiftregisters (each 32bit, one containing a ref value and one a cycling sequence) as fast as possible. Is there an alternative to dma the registers and interrupt the cpu and then XOR the values in the isr? I need cpu time for other tasks.




user_460349's picture
1362 posts

 I think it can be done with customized datapath, but I never done that. May be we need some help from Cypress Application support here. :-)

user_78878863's picture
2553 posts

I think you can do it in hardware. You can either use 16 LUTs, each configured as 2bit-comparer, or 4 8bit-XORs switched together. But it will consume a lot of UDBs. The best way would really a custom datapath. You should read the tutorials on that - I think a simple comparision is not that difficult (the example creates a counter).

uday's picture
Cypress Employee
569 posts

As many have told the best way to go about it is to develop your own custom logic. Fpr this you can use the datapath tool provided with PSoC Creator and synthesize the logic. There are some good tutorials here,

abnoname's picture
50 posts

 But how to access the parallel output of the shiftregister in HW? Or should I route do[7:0] from each datapath in the shiftregister component?



dasg's picture
Cypress Employee
730 posts

To compare two values, the "Conditions" in the datapath can be used for comparison.

The comparison can occur between Data Register (D0) and Accumulator Register (A0).


This has been utilized in the UDB based components such as PWM and Timers.

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