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DelSig value overflowing at maximum/minimum voltages | Cypress Semiconductor

DelSig value overflowing at maximum/minimum voltages

Summary: 0 Replies, Latest post by pvkv on 31 Mar 2011 04:49 AM PDT
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pvkv's picture
Cypress Employee
82 posts

When the ADC resolution is 8 bit or 16 bits then the ADC result will have postive value to negative value or negative to positive value overflow when input just crosses the maximum or minimum voltage. To avoid this, when 8 bit or 16 bit resolution is used, the ADC result should be read as 16 bit and 24 bit respectively. The extra byte will retain the sign value and the user will not get sign reversion. 


If the ADC resolution = 8 bits differential mode. Range = NegInput +/- 1.024 V.

When input reaches just above NegInput  + 1.024 V the ADC may swing from 0x7F to 0x80. Note that ADC input voltage is still positive side, but ADC result 0x80 is negative min value. To avoid this, read ADC result as 16 bit using ADC_GetResult16() API. This will return 0x0080 in place of 8 bit 0x80. Now the value 0x0080 is not negative value because in 2' s complement format, the negative value should be 0xFF80. 

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