analog pin selection | Cypress Semiconductor
analog pin selection
I have a project with 9 inputs (pots) to the adc via hardware mux and 9 capsense inputs. This is just the analog portion of the project. Is there any reason not to interleave the pin selection on these? I have a routing that works that does this. I have placed all of these on the left side gpio section. This is convenient for external connections. I want to check to see if it matters whether or not I place all of this on one side or if it's better to do the adc and mux on the left and all capsense on the right.