SPI | Cypress Semiconductor


Summary: 3 Replies, Latest post by Stub for 2584170 on 04 May 2010 12:59 PM PDT
Verified Answers: 0
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nickgray's picture
2 posts

Do any of the PSoC devices have more than one SPI port?

I need two different SPI ports with the ability to send received data from one port out to the other. I will not always want to do this, but I need the capability. I could implement a second port by "bit banging", but I would rather not do it that way unless there were no other solution.

graa's picture
Cypress Employee
223 posts

You can implement two SPI Masters using PSoC devices that have more than 1 digital block row, like CY8C27x43, CY8C29x66 etc. In these devices, you can use a digital communication block to place an SPIM user module and route the SPI signals through the Row Output / Row Input nets and the Global In and Global Out nets to the desired GPIO pins.

Stub for 2575603's picture
99 posts

In addition to the PSoC 1 devices that Graa mentioned above, PSoC 3 and PSoC 5 devices can create an SPI interface in their universal digital blocks (UDBs).

So all PSoC 3 and PSoC 5 devices could support multiple SPI interfaces via the UDBs.


Stub for 2584170's picture
64 posts

There are 4 8-bit digital blocks per row in PSoC 1 parts, and two of them them are communication type blocks (DCx) that can be configured as SPIM, SPIS, UART Tx/Rx, and the other two are basic function blocks (DBx) that can be configured as PWM, counter, PRS, etc.

So you can get 1 x SPIM and 1x SPIS from each row of the digital blocks.

CY8C21x34, CY24x94, CY8C27x43, CY8C28xxx, and CY8C29x66 all support SPIM and SPIS. The new CY8C28xxx family also support various length SPI (8~16 bit) in user modules.

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