There are various I2C modes - low speed, standard, high-speed, fast, ultra-fast. Which of these modes/speed are supported by PSoC 1?
50k,100k and 400k.
As Ileung already stated: When you place an I2C module onto your sheet, You get a dop-down list for the I2C Clock giving you choices of
50K, 100K (standard) and 400K (Fast).
For PSoC 3 or 5 the choice of clock-speed is arbitrary and may go up to some MHz.
I2C in PSOC 3/5 is limited to 1 Mb/s, 16 Mhz clock.
I2C also will operate at SCLK = DC.
The I2C bus can operate at many frequencies; typical ones are 100 kHz and 400 kHz, higher frequencies are 1MHz and 3.4MHz.
PSoC 1 supports 50 kHz, 100 kHz and 400 kHz.
Please note that there are multiple user module options available to cater to the needs to your project.
A very basic summary of the UMs available:
1. EzI2C - straight forware to use, implements Slave only I2C block
2. I2CHW - supports Slave, Master and MultiMaster modes
3. I2Cm - Master node implemented in software, flexible choice of I2C pins on any two GPIO
All these details and more on I2C protocol basics, architecture of the usermodules, etc can be found in the appnote - AN50987 - Getting Started with I2C in PSoC® 1
You can find example projects to help you configure and test your I2C system. I hope this will answer all your doubts regarding I2C.
Thanks for your reply. Its really amazing how your query usually get resolved in these forums.
I am interested in 400K speed so PSoC 1 should be suitable for my application.
The example projects in the link that you sent are really useful. This is something that I was looking for. Looks like most of my doubts will get resolved by understanding and playing around with the project. If I have any further queries, I will post here.
I have been palying around with the Master and Slave project and have a small doubt.
There is an option in the I2CHW parameters window to select Read_Buffer_Types - We can select either RAM only or RAM and FLASH.
The text in the I2CHW datasheet says "Selection of RAM ONLY removes code and variables required to support direct flash-ROM reads. Selection of RAM OR FLASH gives code and variable support for reading either RAM buffers or flash-ROM buffers for data to be transmitted to the master. If RAM OR FLASH is selected, API calls may be used to select whether a RAM or flash-read buffer is used."
Can anyone tell me in practical application which should be used when?
The Harvard-architecture of the PSoC1 core strongly distinguishes between Ram and Rom and needs different instructions (assembly) to access either of them. Slave's ram usually contains actual (measured) informations, while its rom keeps data like version info.
Assume you are wirting both master and slave programs and want to keep track of the slave's program version or its capabilities. So you write a slave part that answeres a query from master with infos from Rom. This is the point where you have to define to use both, ram AND rom accesses.
An example of FLASH as source is a text string in C that is a "const",
does not change.
Whereas a string in RAM derived from ADC reading is variable data,
hence "normally" taken from RAM.