Freeing IOs | Cypress Semiconductor
I'm new to PSoC world, trying to improve m'y customer PSoC1 CY8C29466 design.
The current dev is using a zero cross detection done with a comparator which triggers a GPIO interrupt on every half cycle (Change From Read) of the 292Hz input sinusoidal signal.
Such a routing is consumming one GPIO pin only for the purpose of linking the output of the comparator to tne input of the interrupt pin driver thru the out analog bus of the concerned column.
Would there be another way to generate the interrupt without using the corresponding pin as analog outputs are rare ressource?