What are the different clocks available in PSoC1?
This should help -
PSoC 1 Clocking System
PSoC includes an advanced clocking system with multiple clock sources, many of which are programmable. Main clock sources can be derived from either the internal 24-MHz internal main oscillator (IMO) or an external clock source of up to 24 MHz. In addition, for a low-speed oscillator, use either a 32-kHz oscillator circuit or an internal low-speed oscillator (ILO).
PSoC 1 Digital Clock Options
Twice the frequency of SYSCLK.
Either the output of the IMO or a clock input on the EXTCLK pin.
SYSCLK is divided down to one of eight possible frequencies, to create CPUCLK, which determines the speed of the M8C.
SYSCLK is divided down to create Variable Clock 1 (VC1). Division range is 1 to 16.
VC1 is divided down to create Variable Clock 2 (VC2). Division range is 1 to 16.
Divides down SYSCLK, VC1, VC2, or SYSCLKX2 to create Variable Clock 3 (VC3). Division range is 1 to 256.
Either the output of the internal low-speed oscillator or the output of the external crystal oscillator.
The internally generated 24-MHz clock by the IMO. The IMO may be put into a slow mode using the SLIMO bit, which changes the speed of the IMO and the CLK24M to either 6 MHz or 12 MHz in some PSoC devices.
One of four sleep intervals may be selected, ranging from 1.95 ms to 1 second.
These details can be found on page 8 and 9 of the application note - "AN75320 - Getting Started with PSoC 1" - http://www.cypress.com/?rID=58639. For more details on the PSoC 1 clocks, you can download the application Note "AN32200 - PSoC 1 - Clocks and Global Resources" - http://www.cypress.com/?rID=2773
Is there an app note, schematic representation, or recommendation, for connecting an external 24 MHz clock source, and the the associated PSoC Designer "Global Resources" configuration?
PSoC 1 cannot take external crystal input for the SysClk source. You will have to provide an external clock signal of 24 MHz to P1 if external accurate 24 MHz is required. The setting for this: "SysClk Source: External P1" and the drive mode for this pin has to be "High Z"
An other option is to use external 32 KHz crystal and enable the PLL to achieve better accuracy of IMO equal to the crystal accuracy. The settings for this: "32K Select: External; PLL Mode: Ext Lock; SysClk Source: Internal 24_MHz"