You are here

CY22393 P Q dividers and CyClocksRT | Cypress Semiconductor

CY22393 P Q dividers and CyClocksRT

Summary: 2 Replies, Latest post by Stub for 2594006 on 15 Mar 2013 09:41 AM PDT
Verified Answers: 0
Last post
Log in to post new comments.
Corentin's picture
1 post


We are working on a new desing using CY22393 programmable PLL to generates a synchronous clock from another.

We have calculated P and Q dividers and post div values and would like to check that they are compliant with your internal component constraints using your CYClocksRT software but there is no way to enter manualy que P Q and post div values in this software.

The sofware only works from enterred frequencies values, but it does not calculates the same P and Q values has we have determined and the obtained output frequency is less accurate than the one using our calculted values.


For example our input frequency is 27 * (1000 / 1001) MHz so approximatively 26,973027 MHz

We want to output a precise 9.6 MHz frequency and we have determined that it can be precisely generated using the following values :

P= 2002

Q= 225

post div = 25

Do these values match our component internal constraints ? There is no precision in the datasheet about these constraints, just a instructions to use CyClocksRT software.

But the sofware doesn't the calculated the values we want to use the obtained frequency is not as exact as what we can get.

In our example the software computes the following values :

P= 867

Q= 84

post div = 29

Frequency output = : 9,60000590 MHz frequency


Thank your for your support,


Best regards,


Stub for 2594006's picture
135 posts

It is recommended to use CyClocksRT software that optimizes a required configuration for best jitter performance and ppm output.

There is a knowledge base article on Algorithm To Help Calculate P & Q Values for the CY22393 available on the website at: that provides the details with an example.

Stub for 2594006's picture
135 posts

You can also use VCO calculator of CyClocksRT to determine the P and Q values. The VCO calculator can be located in CyClocksRT configuration form by clicking on Option >> VCO Calculator.

You just enter your reference and desired output frequencies in MHz and you get the P and Q values. So as per your requirement of 9.6MHz output with 27MHz input, the VCO frequency is set to 326.4MHz with P=544, Q=45 and post divider=34 which gives you 9.6MHz output from 27MHz input with 0 ppm synthesis error.

Attached is the jedec file that you can review with CLKA configured to output 9.6MHz from 27 MHz external input reference.


Log in to post new comments.