Does slower system clock use less power than faster system clock? | Cypress Semiconductor
Does slower system clock use less power than faster system clock?
I'm currently use CYBLE-012011. For my application, the CYBLE will be in deep sleep most of the time. When the MCU is up (once every minute), it performs some calculation and then go back to deep sleep again. I want to reduce the power consumption as much as possible since it will be run from a coin-cell battery. If I remember correctly, running the MCU at 3MHz consumes about 1.3mA and at 12MHz consumes about 4mA. My CYBLE module is currently running at 12MHz. If I change the system clock to 3MHz, is it going to reduce the power consumption? From my understanding, reducing the clock speed from 12MHz to 3MHz will cause the MCU to be active 4 times longer. It sounds like it is actually consume more power on average if I reduce the clock speed to 3MHz. My program is already based on the document "Designing for Low Power and Estimating Battery Life for BLE Applications" but I want to further reduce the power consumption for longer battery life.