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FRAM Endurance | Cypress Semiconductor

FRAM Endurance

Summary: 1 Reply, Latest post by SmartPSoC on 12 Dec 2013 03:16 AM PST
Verified Answers: 0
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HiZ's picture
27 posts

 For FRAM, /OE and /WE being HIGH, if CS goes low and an address change happens, will this internally be considered as a read as far as endurance is concerned?

SmartPSoC's picture
Cypress Employee
68 posts

 Each read and write causes one endurance cycle for the device.Even with /OE and /WE high, the device will internally start a read cycle at every falling /CE. The /OE pin only influences when the output pads begin to drive. It does not qualify the Read cycle. So this will be internally treated as a read cycle and will be cause one endurance cycle for the device.

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