PRS, CRC, shifth register compare don' exist | Cypress Semiconductor
PRS, CRC, shifth register compare don' exist
Cypress do a very awful things,
You calculate CRC, from a stream , and after this there isn't any compare with crc incoming and the calculate.WhY they put a CRC calculation, for platonic view?
In same manner , in PRS module, they remove compare function as exist in PSOC1, and if i want compare one random number with the value coming for example from a serial stream ?. another platonic and unuseful things.
In the same manner for the shith register or others logic there isn't compare logic.
The bad things that exist in PSOC1, take a look on PRS module, that it's easy to transform in a shifth register..
Using Warp verilog it's like take an hammer and punch it's feet.
I like known , the reason for forget this important logic function ?, that complete like said before CRC, PRS and others module.
Full of hopes ( the last to die)