# Cypress Developer CommunityTM

## Frequency calculation

Summary: 133 Replies, Latest post by danaaknight on 30 Apr 2013 06:44 AM PDT
User
8 posts

Helle everybody,

I am usin cy8c29466 PSOC1 and i want to calculate frequency. I have 50Hz clock palse. And i am gonna input that any port. I want to show frequency measuremant on LCD at port2.

Please don't advice me "ad2283 example" because it is useless. It's half of C and half of assembly and so complicated. I want to calculate it just 1 Timer. Noting else. Timer8 or 16 will be enough. And I want to hear solutions just in C language. Also there are some examples on internet which are using just in designer 4.4 and this is meaningless. I am using designer 5.1.

So if anybody who can help me i will be appraciate.

Cypress Employee
100 posts

I remember one of my colleague did this example for some customer using PD5.1. Unfortunately, I won't be able to attach zip file over here. Can you please provide me your email address such that I can send it to you via email.

Best regards,

Pushek

User
8 posts

oguzk@meve.com.tr

thanks..

Cypress Employee
8 posts

Hi,

I have sent the example project to the above mentioned email. Please find the same.

Regards,

Keerthi Raj

User
1 post

hi everybody!

I am doing the project on measuring frequency by PSoC. you do have examples of this project please send mail to me.

thanks!

User
7646 posts

At the most basic level you need a gate of known width in time,
and a counter that starts counting when gate is active (high),
from a known value (255 8 bit,  65535 16 bit), and stops counting
when gate goes low. You read the value of the counter, subtract
it from start value, and divide by gate period in seconds.

16 bit example, .1 sec gate period, f = (65535 – count value) / .1

To setup Gate

1) Timer, setup for .1 or 1 sec (resolution would be 10 Hz or 1 Hz
respectively). You set up period to be 2X desired gate period, and
compare value 1/2 period, so that high time of compare output =
gate period, low time = gate period.

2) Route timer compare out to counter enable.

To setup counter

1) Route pin, Fin, to counter clock

2) Route timer compare out to counter enable

Code

1) Load counter with its max allowed value, 255 for 8 bit, 65535 for
16 bit

2) Start counter

3) Enable timer ISR, on terminal count, that means gate is low, counter
not enabled to count

3) Start timer

When ISR occurs set a flag and return

1) If flag true read counter (gate is low so it is not enabling counter)
and compute frequency. Reload counter with its max value.

There are other optimizations that can be done, for example stop and reset
timer when ISR occurs so that gate low period is minimized, and measurement
frequency is increased.

If the frequencies you are measuring are very low, like less than 1 Hz,
use reciprocal counter technique.

Regards Dana.

User
1362 posts

Dana give some hints to do the project already. Try to come up with your project. post it here for others to help. But you have to do it yourself to learn.

Happy coding

User
7646 posts

Here is some reference material that may be of interest.

Regards, Dana.

Attachments:
User
72 posts

sir, can i interface my light sensor tsl235 directly with CY8CKIT-001 DVK .

Suggest me how i can interface my tsl235 with this kit.

Actually my work is to detect light intensity of different laser and measure its frequency and develop a device which is very sensitive. so i m using TSL235 converter for my work.
i need to do it on PSoC designer. help send me demo sample and if possible code also.
Thanks
Cypress Employee
90 posts

TSL235 is a light sensor with frequency output. You can refer application note AN2283 - PSoC 1 - Measuring frequency

http://www.cypress.com/?rID=2671

I would suggest to use a light sensor with analog output and then do signal processing inside PSoC. You will be able to reduce the system cost.

User
72 posts

what if i m using tsl235. this AN code is perfect for my work