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ADCINCVR V 4.0 datasheet ambiguity | Cypress Semiconductor

ADCINCVR V 4.0 datasheet ambiguity

Summary: 9 Replies, Latest post by EricS on 04 Sep 2014 10:15 AM PDT
Verified Answers: 0
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user_27941315's picture
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Hello all,

In the datasheet of ADCINCVR rev 4.0 it says that dataclock is limited to 2.67 MHz  and you can reach 5018sps and it's right if you use 2.67MHz in the formulas. In the previous rev 3.2 the maximum sampling was 10000sps.


If you take the example project CE54287 which is "Measure and display 0 to 5V on a LCD " the Dataclock is set to 4 MHz. This value is higher than the maximum specified in the datasheet.

If you look at note number 6 it specify a 8MHz dataclock and this note is not referenced anywhere in the datasheet.


Does someone can explain all this confusion?