I2C clock stretching support | Cypress Semiconductor

I2C clock stretching support

Summary: 2 Replies, Latest post by pro_1875216 on 15 Nov 2016 10:02 PM PST
Verified Answers: 1
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pro_1875216's picture
User
2 posts

Hello,

I want to use MB9BF218T with UCD90160 power sequencer from TI. The connection interface is PMBus (I2C). UCD90160 works as slave and it uses clock stretching, so after receiving the start condition, 7 bits of slave address and r/w bit, it holds SCL low until it's data will be ready, and then release SCL and generate ACK, to allow MCU to complete the transfer. Standard I2C master mode can not be used, because MB9BF218T generate 9 clock pulses and try to detect ACK immediately. How this kind of transfer can be realized on MB9BF218T? 

bhwj's picture
Cypress Employee
32 posts

Hello ,

MB9BF218T does support clock stretching, so can you verify if the slave is holding the clock low ?

pro_1875216's picture
User
2 posts

Hello ,

We have checked this connection. Indeed, MB9BF218T supports clock stretching at least for delayed ACK.
It would be nice, if this feature was described in reference guide more clearly.

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