I2C clock stretching support | Cypress Semiconductor
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I2C clock stretching support
I want to use MB9BF218T with UCD90160 power sequencer from TI. The connection interface is PMBus (I2C). UCD90160 works as slave and it uses clock stretching, so after receiving the start condition, 7 bits of slave address and r/w bit, it holds SCL low until it's data will be ready, and then release SCL and generate ACK, to allow MCU to complete the transfer. Standard I2C master mode can not be used, because MB9BF218T generate 9 clock pulses and try to detect ACK immediately. How this kind of transfer can be realized on MB9BF218T?