Query regarding the Design challenge | Cypress Semiconductor
Query regarding the Design challenge
We completed making our abstrat on our topic but when we put our model on the PSoc Creator we are facing a problem. we completed analog part of our model on the PSoc Creator but when we come to Digital part I have a doubt that we have to place complete REGISTER TRANSFER LEVEL Diagram in the PSOC Creator or not? OR else I roughly draw block diagrams mentioning their functionality?
Please also mention us which family of PSoc5 we will be using in our further stages ?
Awaiting for our reply,