FM25CL64B Verilog Model and Cadence Ncsim | Cypress Semiconductor
FM25CL64B Verilog Model and Cadence Ncsim
In the config.v file i set the define to FM25CL64B.
When I try to compile the model with ncsim, the compiler tells me that he's expecting a keyword like 'module', 'macromodule' or 'primitive' at line 381. This is where the parameters for the choosen part start.
Since there are only defines and parameters in this file the compiler output doesn't make much sense to me.