Why are the Address pins not numbered in ASYNC SRAMs? Is there any reason for this?
Once a address pin is assigned with a particular address bit, You will Read and Write from the same address. So, it doesn't affect the Read and Write operation. Hence, we do not provide the exact Address(A) pin numbers . This is true for all Asynchronous SRAMs.
Hence, the user can connect the address pins on their side to any address pins on the SRAM.
For further information. Please refer to the below Application Notes:
Pinout Compatibility Considerations of SRAMs - AN1083 - http://www.cypress.com/?rID=12877
SRAM Address and I/O Pin Order - AN4025 - http://www.cypress.com/?rID=13041
I'm about to upgrade (and increase) a memory in one of my boards.
I'm using a CY7C199D-10VXI (32Kx8) and I want to increase the memory to 64Kx8, but I can't found it, so I decide to use a CY7C1009D-10VXI (128Kx8).
If I want to modify the board the less possible, I'll need to not take care of the numbers of the addres, because both memory seems to have almost the same pin configuration but with very different address lines.
Do I have total freedom to change the address of this new memory ? I really think that it is ok, and when I read this post I confirmed it. But because the data sheet is numbering the addres, I want to be really sure.
Apart from that, why there is no any SRAM memory with 64Kx8 ?
You are free to connect address pins in any order on SRAM. As explained above, once address pins are fixed, you will perform write and read from same location everytime.
Any new part opening depends on market survey and customer demand. We didn't find any big bussiness opprtunity to open this part in 64Kx 8 configuration.