• Full byte-oriented EEPROM emulation
• Abstracts block-oriented Flash architecture
• Efficient use of memory

General Description:

The SMBus Slave User Module provides a SMBus slave interface that is fully compliant with the Physical and Digital Link layers described in the SMBus Specification Version 2.0. This user module can be used in conjunction with other master and slave devices connected to a single SMBus segment. This user module uses an I2C controller and its interrupt for its physical layer.

Features:

• Industry standard SMBus compatible slave interface
• Supports SMBus Host Notify Protocol (HNP) using command and through a dedicated Alert pin
• Optional Packet Error Check (PEC)
• Standard data rate of 50/100 kbps
• High-level Application Program Interface (API) requires minimal user programming

Related Pages: Application Notes, Technical Reference Manuals, Design Guides

• 16-bit general purpose pulse width modulator (PWM) with 8-bit dead band generator, two or three PSoC blocks, respectively
• Phase1 and Phase2 underlapped outputs track the frequency of the generated PWM signal
• Programmable duty cycle
• Programmable dead time
• Dead Band Kill input drives Phase1 and Phase2 outputs low
• Counter clocking up to 48 MHz
• Interrupt option triggered on rising edge of the PWM generated signal or counter terminal count

The 16-bit PWMDB User Module is a pulse width modulator combined with an 8-bit dead band generator.The pulse width modulator provides a programmable period and pulse width input signal to the dead band generator. The dead band generator outputs two under-lapped signals, with programmable dead time at the same frequency as the input signal. When asserted, the Dead Band Kill input drives the Phase1 and Phase2 output signals low.  The clock and enable signals can be selected from several sources. The Phase1 and Phase2 output signals can be routed to the external pin ports or to the global output buses for internal use by other user modules. An interrupt can be programmed to effectively trigger on both edges of the pulse width modulator output.

• Output is digital inverted input
• Requires only one digital block
• Can be used to generate an interrupt on the falling edge of the input

The DigInv User Module is a simple digital inverter. The output is a logical NOT of the input signal.

• Two Digital Buffers
• Input1 can be inverted
• Can be used to generate an interrupt on the rising edge of Output1

• Industry standard Philips I2C bus compatible interface
• Master and Slave operation, Multi Master capable
• Only two pins (SDA and SCL) required to interface to I2C bus
• Standard data rate of 100/400 kbps, also supports 50 kbps
• High level API requires minimal user programming
• 7-bit addressing mode
   

The I2C Hardware User Module implements an I2C device in firmware. The I2C bus is an industry standard, two-wire hardware interface developed by Philips®. The master initiates all communication on the I2C bus and supplies the clock for all slave devices. The I2CHW User Module supports the standard mode with speeds up to 400 kbps. No digital or analog user blocks are consumed with this module. The I2CHW User Module is compatible with other slave devices on the same bus.

• 6-bit resolution
• Voltage output
• Four quadrant multiplication
• 2’s complement, offset binary, and sign/magnitude input data formats
• Sample and hold for analog bus and external outputs
• Update rates up to 250 ksps

The MDAC6 User Module is a 6-bit, four-quadrant multiplying DAC that scales input voltage with digital codes. The MDAC6 translates digital codes to output voltages at an update rate of up to 250k samples per second. The Application Programming Interface (API) supports offset-binary, sign-and-magnitude, and 2’s complement data formats. Offset compensation minimizes conversion error. 

Features and Overview

• The 32-bit general purpose counter uses four PSoC blocks
• Source clock rates up to 48 MHz
• Automatic reload of period on terminal count
• Programmable pulse width
• Input enables/disables continuous counter operation
• Interrupt option on compare output or terminal count
   

The 32-bit Counter User Module provides a down counter with a programmable period and pulse width. The clock and enable signals can be selected from any system time base or external source. Once started, the counter operates continuously and reloads its internal value from the period register upon reaching terminal count. During each clock cycle, the counter compares the current count to the value stored in the compare register. Each clock cycle, the Counter tests the count against the value of the compare register for either a “less than" or “less than or equal to" condition. The comparator output provides a logic level that may be routed to pins and to other user modules.

Features and Overview

• The 24-bit general purpose counter uses three PSoC blocks
• Source clock rates up to 48 MHz
• Automatic reload of period on terminal count
• Programmable pulse width
• Input enables/disables continuous counter operation
• Interrupt option on compare output or terminal count
   

The 24-bit Counter User Module provides a down counter with a programmable period and pulse width. The clock and enable signals can be selected from any system time base or external source. Once started, the counter operates continuously and reloads its internal value from the period register upon reaching terminal count. During each clock cycle, the counter compares the current count to the value stored in the compare register. Each clock cycle, the Counter tests the count against the value of the compare register for either a “less than" or “less than or equal to" condition. The comparator output provides a logic level that may be routed to pins and to other user modules.

• Flexible input sources
• Output signal latching
• Flexible functionality configuration

The Comparator User Module (COMP) provides a digital output representation of the comparison of two signal levels. The input signals can be external signals multiplexed through the analog column mux, internal signals, and fixed or adjustable reference voltages. It provides a number of standard structural options with considerable flexibility in connection, threshold limits, and noise rejection.

The COMP user module is constructed as a MUM (multi user module). The MUM lists the name, brief description, simplified schematic, and input/output waveforms. The MUM schematic is at the "system" level. It does not show physical interconnections.

• 8-bit general purpose timer uses one PSoC block
• Source clock rates up to 48 MHz
• Automatic reload of period on terminal count
• Capture for clocks up to 24 MHz
• Terminal count output pulse may be used as input clock for other analog and digital functions
• Interrupt option on terminal count, capture (on some devices), or when counter reaches a preset value
   

The 8-Bit Timer User Modules provides a down counter with programmable period and capture ability. The clock and enable signals can be selected from any system time base or external source. Once started, the timer operates continuously and reloads its internal value from the period register upon reaching terminal count. The output pulses high in the clock cycle following terminal count. Events can capture the current Timer count value by asserting the edge-sensitive capture input signal. Each clock cycle, the Timer tests the count against the value of the compare register for either a “Less Than" or “Less Than or Equal To" condition. Interrupts may be generated based on terminal count and compare signals. Some device families offer two additional features. The interrupt options include “interrupt on capture" and, in addition, the compare signal may be routed onto the row buses. If these options are available on your chosen device they will be shown in the Device Editor.

• 32-bit general purpose timer uses four PSoC blocks
• Source clock rates up to 48 MHz
• Automatic reload of period on terminal count
• Capture for clocks up to 24 MHz.
• Terminal count output pulse may be used as input clock for other analog and digital functions
• Interrupt option on terminal count, capture (on some devices), or when counter reaches a preset value
   

The 32-bit Timer User Module provides a down counter with programmable period and capture ability. The clock and enable signals can be selected from any system time base or external source. Once started, the timer operates continuously and reloads its internal value from the period register upon reaching terminal count. The output pulses high in the clock cycle following terminal count. Events can capture the current Timer count value by asserting the edge-sensitive capture input signal. Each clock cycle, the Timer tests the count against the value of the compare register for either a “Less Than" or “Less Than or Equal To" condition. Interrupts may be generated based on terminal count and compare signals. Some device families offer two additional features. The interrupt options include “interrupt on capture" and, in addition, the compare signal may be routed onto the row buses. If these options are available on your chosen device they will be shown in the Device Editor.  

• 24-bit general purpose timer three PSoC blocks
• Source clock rates up to 48 MHz
• Automatic reload of period on terminal count
• Capture for clocks up to 24 MHz
• Terminal count output pulse may be used as input clock for other analog and digital functions
• Interrupt option on terminal count, capture (on some devices), or when counter reaches a preset value
   

The 24-bit Timer User Module provides a down counter with programmable period and capture ability. The clock and enable signals can be selected from any system time base or external source. Once started, the timer operates continuously and reloads its internal value from the period register upon reaching terminal count. The output pulses high in the clock cycle following terminal count. Events can capture the current Timer count value by asserting the edge-sensitive capture input signal. Each clock cycle, the Timer tests the count against the value of the compare register for either a “Less Than" or “Less Than or Equal To" condition. Interrupts may be generated based on terminal count and compare signals. Some device families offer two additional features. The interrupt options include “interrupt on capture" and, in addition, the compare signal may be routed onto the row buses. If these options are available on your chosen device they will be shown in the Device Editor.

• Supports 1 to 8 Digits
• Any combination of individual displays up to 8 total digits
• Display both hex and integer values
• Supports decimal points built into 7-Segment display
• Supports both common cathode and common anode displays
• Configurable for both active high and active low segment and digit drives
   

The LED7SEG User Module is capable of multiplexing up to eight 7-segment displays. This user module is compatible with common cathode, common anode, or any drive polarity. This allows a wide range of flexibility with various displays. Digits and segments may be driven directly by PSoC pins without the use of transistors or drivers as long as the current sinking and sourcing limits of the PSoC pins are not exceeded.

• Support for both Active High and Active Low circuits
• Works with system shadow registers
• Functions (Switch, Invert, and GetState )

The LED User Module is just a couple simple functions to control an LED or any simple device that is controlled by on and off.

• Uses the industry standard Hitachi HD44780 LCD display driver chip protocol
• Requires only seven I/O pins
• Routines provided to print RAM or ROM strings
• Routines provided to print numbers
• Routines provided to display horizontal and vertical bar graphs
• Uses a single I/O port
   

The Character LCD User Module is a set of library routines that writes text strings and formatted numbers to a common two or four-line LCD module. Vertical and horizontal bar graphs are supported, using the character graphics feature of these LCD modules. This module was developed specifically for the industry standard Hitachi HD44780 two-line by 16 character LCD display driver chip, but works for many other fourline displays. This library uses the 4-bit interface mode to limit the number of I/O pins required.
 

Features and Overview

• Industry standard Philips I2C bus compatible interface
• Only two pins (SDA and SCL) required to interface several slave I2C devices
• Standard mode data supports rate of 100 kbps
• High level API requires minimal user programming
• Low level API provided for flexibility

The I2Cm User Module implements a master I2C device in firmware. The I2C bus is an industry standard,  two-wire interface developed by Philips®. An I2C bus master may communicate with several slave devices  using only two wires. The master initiates all communication on the I2C bus and supplies the clock for all slave devices. The I2Cm User Module supports speeds up to 100 kbps. No digital or analog user blocks  are consumed with this module. 

• Real time clock that keeps time with an external 32K crystal oscillator
• Flexible interrupt sources between second, minute, hour, and day
• Hour, Minute and Second time read and write in BCD format
• Normal timer if using VC1 as clock source
• Sleep mode with internal or external 32K clock source
• Reset by PPOR, IPOR, and watchdog reset
   

• 10 mV hysteresis that can be enabled or disabled
• Programmable output polarity
• Programmable speed and power
• Direct output connection available to trip input of the HYSTCTRL User Module blocks
• Direct input selection from DualDAC8HW UM to achieve a precise, programmable comparator reference

The CMPHW User Module (UM) is a dedicated hardware comparator block (not the comparator block implemented with PSoC analog and digital blocks) that compares two input signals and switches the output to indicate the larger signal. The comparator has rail-to-rail operation with a 10 mV hysteresis that can be enabled or disabled.This UM can operate in both fast and slow mode, a useful feature depending on the end application. For example, a typical over-current protection circuit is designed to respond faster to changes in the output variable and therefore would benefit from the fast mode feature. On the other hand, an application where the comparator is used to sense a slow changing variable, such as temperature, can benefit from the slow mode of this comparator using less system power.

• Operates with a high common mode voltage of 36V
• Possesses high common mode rejection ratio
• Gives bandwidth adjustment capability with high bandwidth
• Gives low input offset currents and low offset voltages
• Highly accurate output

The high side current sense amplifiers (CSA) give a differential sense capability to measure the voltage across current sense resistors in power systems.

Features and Overview

• Supports SD, miniSD, microSD/TransFlash, MMC, RS-MMC/MMCmobile, and MMCplus.
• Handles PC FAT16/32, DOS, and Windows files with short filenames (DOS 8.3 format).
• Opens multiple files for read and write operations.
• Supports multiple file random access.
• Allows PSoC to access 2 Gb of flash storage space.
   

The SDCard User Module allows you to access PC compatible files on six different flash card form factors without the need to know the "nuts and bolts" of either file access or the flash card interface.

The SDCard User Module allows basic operation with as few as four PSoC pins. Depending upon the card type and card socket, you can use additional pins to support write protect, card insert, and others.

• Power switchover detecting input voltage change
• Single or dual cell battery supply
• An internal Current DAC is used for estimating battery charge

The Power User Module, in combination with the on board full speed USB on CYONS2xxx devices provides a one chip solution for driving a USB mouse. Wired, wireless, and hybrid mouse solutions are all supported. Wireless applications are supported by a power system capable of operating from a battery. The Power User Module supports hybrid mice by allowing the mouse to seamlessly transition from battery powered wireless operation to USB powered wired operation and vice versa.

• Nominal 10-bit resolution
• Selectable resolution from 2-bit to 12-bit
• Input range 0 to Vdd-1
• Allows a coarse temperature measurement: range of -40°C to +125°; accuracy of ± 40°C with resolution ± 2°C
   

The ADC10 User Module implements a Single Slope A/D Converter that generates up to a 12-bit, full scale output (0 to 4095 count range). Although capable of generating a 12-bit output, it has only 10 effective bits of resolution. Further resolution is achieved by averaging multiple samples.

• User-programmable, mid-band gain
• User-programmable center frequency (20 Hz to 150 kHz) and Q with no external components
• Filter center frequency stability directly derived from clock accuracy
• Filter sampling rates up to 1.5 MHz
• Built in, zero-crossing detector

The BPF4 User Module implements a four-pole band-pass filter. The center frequency and Q (ratio of center frequency to bandwidth) are functions of the clock frequency and the ratios of the capacitor values chosen. The center frequency can be set accurately or adjusted by controlling the sample rate clock. Any of the classical all-pole filter configurations (Butterworth, Gaussian, Bessel, and Chebyshev) can be implemented. The filter output can drive the analog output bus.

General Description:

The Voltage Sequencer User Module is a flexible and easy way to implement voltage sequencing function using a PSoC 1 device. Voltage sequencing is required to ensure reliable power up and power down of power rails in a system and flag a fault condition in case of a failure. The User Module Wizard allows you to control ramp timing as well as time delays between power rails. Voltage sequencing is popularly used in computing (servers, storage arrays) as well as communication (basestation, routers, VOIP equipments) systems in addition to general industrial and consumer systems.

The User Module enables PSoC 1 to read PGOOD (power good) signals from power regulators and generate EN (enable) signals for power regulators based on user-defined ramp timing. If PSoC 1 does not receive the PGOOD signal in the user-defined 'RAMP' time, then it asserts a power-up failure interrupt and continues with the user-defined power-down sequence, if the auto power-down mode is enabled. This User Module uses an on-chip 16-bit timer (implemented using programmable digital blocks) to generate user-defined time delays.

Features: Drag-n-drop ‘virtual IC’ in PSoC Designer 5.3 or later Implements voltage sequencing in a PSoC 1 device Provides a graphical Wizard for configuration Reads PGOOD signals and generates EN signals Enables user-defined time delays and power-up as well as power-down sequences Detects a fault in case of a failure
	Voltage Sequencer User Module Wizard

Related Pages: Application Notes, Technical Reference Manuals, Design Guides

General Description:

The SmartSense2X User Module helps you design CapSense based touch buttons and sliders. This User Module includes auto-tuning algorithm implemented by Cypress that auto-tunes the design and avoids need of extensive engineering and manual tuning. As manual tuning is not required, this User Module improves time-to-market and reduces production cost. The SmartSense2X User Module adapts to noise and other environmental changes and provided industry’s most reliable touch solution. This User Module empowers you to make your design water-tolerant with a simple selection of shield electrode from the drop-down list. The SmartSense2X user module includes background scanning feature that provides more CPU bandwidth for other process. Some of the applications where this User Module can be used are home appliances, consumer electronics, learning kits, medical appliances etc.

Features: Dual channel scanning to reduce scanning time Configurable sensitivity for each sensor Supports background scanning to improve system performance Supports buttons, sliders, and proximity sensors Supports water-tolerance using shield electrode
	SmartSense2X Wizard configures CapSense quickly

Related Pages: Application Notes, Technical Reference Manuals, Design Guides

General Description:

The Thermistor User Module measures the temperature from a Thermistor using PSoC 1 device. This User Module implements complete Analog Front End (AFE) needed for Thermistor interface. It also implements the required firmware that provides the digital output directly proportional to the temperature.

This User Module implements ratiometric interface for Thermistor. On-chip analog multiplexer is used to switch between the channels. Two buffered references are used to excite the sensor circuit. A Programmable Gain Amplifier (PGA) that is implemented using continuous time block is used to provide required gain. Then, ADC converts the amplifier’s output to digital format. M8C core converts this digital voltage output into the temperature either using the Steinhart-Hart equation or the Lookup table based on user selection.

Features: Implements complete AFE for Thermistor interfacing using PSoC 1 Calculates temperature either using the Steinhart-Hart equation or the Lookup Table Provides output in signed or unsigned data format Compensates for offset error User Module wizard helps in configuring the User Module quickly
	Thermistor User Module Wizard

Related Pages: Application Notes, Technical Reference Manuals, Design Guides

General Description:

The Gas Sensor Analog Front End (AFE) User Module in PSoC Designer is a virtual IC that implements the required analog front-end for three-lead electrochemical gas sensors in PSoC 1. Once you place this User Module in your design it configures all required hardware resources. This User Module provides an output voltage that is proportional to the gas concentration.

The Gas Sensor AFE User Module consists of two blocks - a control amplifier and a trans-impedance amplifier (TIA). Control amplifier is implemented using one continues time (CT) analog block and one switched capacitor (SC) block of PSoC 1. It is used to maintain the sensor’s required bias voltage.

The sensor provides current output proportional to the gas concentration. TIA (implemented using a CT block) converts this current signal to voltage.

Features:

• Implements configurable AFE for a three-lead electrochemical sensor
• Provides Control Amplifier to drive and control the gas sensor
• Provides TIA to convert the sensor current output to voltage
• Maintains user-settable bias voltage for the gas sensor

Related Pages: Application Notes, Technical Reference Manuals, Design Guides

General Description:

The Fan Controller User Module in PSoC Designer helps you control up to eight, four-wire fans in open-loop or closedloop mode. The Fan Controller User Module wizard enables you to select the number of fans and their configurations. Some key applications of Fan Controller are in servers, computers, projectors etc.

The Fan Controller User Module changes the fan speed using hardware PWMs implemented in programmable digital blocks in PSoC 1. It measures fan speed by reading tachometer output using a 16-bit timer and a hysteresis comparator.

In open-loop mode, PSoC 1 sets the user defined PWM duty cycle irrespective if the current fan speed. However, application programming interface (API) is provided to measure the fan speed. In closed-loop mode, a desired fan speed is achieved by PSoC 1 by controlling PWM duty cycle based on the difference between desired and current speed. In open-loop mode, this User Module supports multiple fans to be connected to the same PWM signal called “banks”.

Features: Open-loop and closed-loop control of four-wire BLDC fans User Module wizard to select the number of fans and their configuration Fan speeds ranging from 450 to 25,000 RPM Fan stall/rotor lock condition detect on all fans Selectable tolerance and damping factor Multiple fans grouped together called “banks” can be connected to one PWM output APIs to set desired speed and to read current speed

Fan Controller Wizard

Related Pages: Application Notes, Technical Reference Manuals, Design Guides

• Supports Serial Peripheral Interconnect (SPI) Slave protocol
• Supports protocol modes 0, 1, 2, and 3
• Selectable input sources for MOSI, SCLK, and ~SS
• Selectable output routing for MISO
• Programmable interrupt on SPI done condition
• SS may be firmware controlled

The SPIS User Module is a Serial Peripheral Interconnect Slave. It performs full duplex synchronous 8-bit data transfers. SCLK phase, SCLK polarity, and LSB First can be specified to accommodate most SPI protocols. The SPIS PSoC block has selectable routing for the input and output signals, and programmable interrupt driven control. Application Programming Interface (API) firmware provides a highlevel programming interface for either assembly or C application software.

• Supports Serial Peripheral Interconnect (SPI) Master protocol
• Supports SPI clocking modes 0, 1, 2, and 3
• Programmable interrupt on SPI-done condition
• SPI Slave devices can be independently selected
   

The SPIM User Module is a Serial Peripheral Interconnect Master. It performs full duplex synchronous 8- bit data transfers. SCLK phase, SCLK polarity, and LSB First can be specified to accommodate most SPI clocking modes. Controlled by user supplied software, you can configure the slave select signal to control one or more SPI Slave devices.

The SPI User Module also supports two wire serial devices such as optical mouse sensors that employ an SDIO/SCK interface.

• Implements CapSense® capacitive sensing in the CY8C20xx6A family of PSoC® devices using sigma-delta data conversion.
• Configurable system parameters allow tuning to optimize performance in a broad range of applications.
• Supports up to 36 capacitive sensors and 6 sliders.
• Capable of detecting touches as low as 0.1 pF, that is, detecting a finger is possible through up to 15 mm of glass or 5 mm of plastic.
• High immunity to AC mains noise, other EMI, and power supply noise.
• Supports capacitive sensors configured as independent buttons and/or as dependent arrays to form sliders.
• Effective number of slider elements can double the number of dedicated I/O pins using diplexing technique.
• Supports slider resolution greater than physical pitch through interpolation.
• Shield electrode provided for reliable operation with high parasitic capacitance and/or in the presence of water film.
• Guided sensor and pin assignments using the CSD Wizard.
• The CY8C20045 family does not support sliders.

• 8-bit resolution
• Voltage output
• 2’s complement, offset binary and sign/magnitude input data formats
• Sample and hold for analog bus and external outputs
• Update rates to 125 ksps

The DAC8 User Module translates digital codes to output voltages. The DAC8 translates digital codes to output voltages at an update rate of up to 125k samples per second. The Application Programming Interface (API) supports offset-binary, 2’s complement, and register-image data formats. Offset compensation is employed to minimize error.   

• Range of -40°C to 85°C
• Accuracy of ± 20°C with no calibration
• Single PSoC block implementation
• 8-bit 2’s complement output in degrees Celsius
   

The FlashTemp User Module gives a coarse temperature measurement for the bFlashWriteBlock routine, which varies its programming pulse width with temperature. A single switch capacitor analog block is used and requires no calibration. The output of the FlashTemp User Module is the junction temperature of the PSoC microcontroller in a 2’s complement format, with 1 count per degree Celsius.

• Highly efficient boost control operation
• Fast hysteretic control loop
• Software integral loop for current regulation
• Easy-to-implement optional current protection
   

• 7- to 13-bit resolution, 2’s complement
• Sample rate from 4 to 10,000 sps
• Input range Vss to Vdd
• Integrating converter provides good normal-mode rejection
• Internal or external clock
   

The ADCINCVR is an integrating ADC with an adjustable resolution between 7 and 13 bits. It can be configured to remove unwanted high frequencies by optimizing the integrate time. Input voltage ranges, including rail-to-rail, may be measured by configuring the proper reference voltage and analog ground. The output is 2’s complement based on an input voltage between –Vref and Vref centered at AGND.

Sample rates from 4 to 10,000 sps are achievable depending on the selection of the resolution, DataClock, and CalcTime parameters.

The programming interface allows you to specify the number of sequential samples to be taken or to select continuous sampling. The CPU load varies with the input level. For example, when Vin = Vref, there are 5076 CPU cycles (maximum 13 bit). When Vin = AGND, there are 2708 CPU cycles (average 13 bit). When Vin = -Vref, there are 340 CPU cycles (minimum 7-13 bit).

• 8-bit resolution
• Sample rates up to 8.8 ksps
• Input range 0 to Vdd-1V

The ADC8 User Module implements a Single Slope A/D Converter that generates an 8-bit, full scale output (0 to 255 count range).

• 6 to 14-bit resolution
• Optional synchronous 8-bit PWM output
• Optional differential Input
• Signed or unsigned data format
• Sample rate up to 15.6 ksps (6-bit resolution)
• Input range defined by internal and external reference options
• Internal or external clock
   

Note: If this user module is used with the 29K family, it consumes an extra 6 mA. As an alternative, use the ADCINCVR user module.

The ADCINC is a differential or single input ADC that returns a 6 to 14 bit result. The maximum DataClock frequency is 8 MHz, but 2 MHz is the maximum frequency recommended for improved linearity. This ADC may only be placed one time, due to its implementation which uses the hardware decimator rather than a digital block. This is the most resource efficient ADC. A 2nd order modulator may be implemented with an additional switch-capacitor block, allowing better linearity with an 8 MHz DataClock.

• The best analog-to-digital conversion results on CY8C21x45, CY8C22x45, and CY8C28x45 devices.
• 10-bit resolution
• One-shot conversion
• Free running conversion.
• Selectable conversion trigger
• Programmable clock divider
• Automatically enter low power mode right after conversion finishing
   

The SAR10 User Module is a 10-bit Successive Approximation Register (SAR) ADC converter that converts an input voltage to a digital code using the SAR block. It produces a 10-bit unsigned value for each sample. This user module supports three modes of analog-to-digital conversion: Software Trigger, Hardware Trigger, and Freerun.

• Best analog-to-digital conversion results on CY8C24x33 and CY8C23x33 devices
• Fast (typical 2.7 μs) conversion time
• Successive approximation functionality support
• 8-bit resolution
• Eight primary input analog channels and two internal analog channels from CT blocks
• Single conversion
• Free running conversion
• Selectable conversion trigger
• Programmable sample time
• Programmable clock divider
• Cancel/restart feature for running conversions
• Support to autoalign/trigger at any point of PWM, timer, or counter cycle
• Automatic entry into low power mode after every conversion in single conversion mode
   

The SAR8 User Module is an 8-bit successive approximation register (SAR) ADC converter that converts an input voltage to a digital code using a dedicated analog PSoC block. It features typical conversion times of 2.7 μs (limited with firmware processing) and produces an 8-bit unsigned value for each sample.

• 6-bit resolution
• Single PSoC block
• Conversion time of 25 μs, typical
• API optimized to help minimize aperture jitter
   

The SAR6 User Module converts an input voltage to a digital code, using a single switched-capacitor analog PSoC block. It features typical conversion times of 25 μs, producing a 2’s complement value in the closed interval of [-32..+31] for each sample. The SAR6 Application Programming Interface (API) provides a time-equalized function, so that synchronous sampling can be managed by a timing loop for minimum aperture jitter.

• 8-bit resolution
• Sample rates up to 100 sps
• Input range depends on CPU Clock
   

The SAADC implements a simple ADC which does not require a Digital Block to operate.

Note:  The SAADC has 8 bits of resolution with 1% error if placed in analog column 0. When placed in analog column 1 the error is 4%.

• Fully parameterized for custom development
• Custom block for prototypes
• Selectable power settings
   

The SCBLOCK User Module is an analog switched capacitor (SC) PSoC block that is fully parameterized. This allows for the creation of custom switched capacitor functions. Application Programming Interfaces (APIs) are included for SCBLOCK power management.

Features and Overview

• 6-bit to 14-bit resolution
• Data in unsigned or signed 2’s complement formats
• Maximum sample rates of 65,500 sps at 6 bit resolution, 7812 sps at 14-bit resolution
• Sinc2 filter fully implemented in hardware reduces CPU overhead and anti-alias requirements
• 1st-Order or 2nd-Order modulator for improved signal-to-noise ratio, user selectable
• Input range defined by internal and external reference options
• Requires no digital blocks

• 6-bit to 14-bit resolution
• 2 to 4 channels of synchronized sampling
• Data in unsigned or signed 2’s complement formats
• Maximum sample rates of 65,500 sps at 6 bit resolution, 7812 sps at 14-bit resolution
• Sinc2 filter fully implemented in hardware reduces CPU overhead and anti-alias requirements
• 1st Order or 2nd Order modulator for improved signal-to-noise ratio, user selectable
• Input range defined by internal and external reference options
• Requires no digital blocks
• Configuration wizard enables you to easily select between 2, 3 or 4 channels of delta-sigma ADC measurements that are all synchronized with each other
• The internal timer of the decimators allows no digital block use
   

The DelSigMulti User Module is an integrating converter, requiring from 32 to 256 integration cycles to generate a single output sample. Changing multiplexed inputs invalidates the first two samples after the change. This DelSigMulti User Module supports up to 4 channels of simultaneous, synchronized deltasigma ADC sampling.

A configuration wizard allows you to easily select the number of analog blocks that are used by each channel and the decimator oversample rate of each channel.

• Immune to GPIO current transient, VDD fluctuation, entry and exit from sleep, and IDAC RTS noise
• Implements CapSense® capacitive sensing using sigma-delta data conversion
• Configurable system parameters allow tuning to optimize performance in a range of applications
• Supports as many as 35 capacitive sensors and six sliders
• Capable of detecting touches as low as 0.1 pF, meaning that, detecting a finger is possible through up to 15 mm of glass or 5 mm of plastic
• Supports capacitive sensors configured as independent buttons or as dependent arrays to form sliders, or both
• Effective number of slider elements can double the number of dedicated I/O pins using diplexing technique
• Supports slider resolution greater than physical pitch by using interpolation
• For more, see pdf

The CSDPLUS User Module is based on the differential capacitive sensing method. This user module uses the Analog MUX Bus for connecting a capacitive sensing analog circuitry to any PSoC pin. The CSDPLUS User Module connects the active sensor to the Analog MUX Bus allowing the CapSense circuitry to measure its capacitance and translate that capacitance into a digital code. Firmware serially scans the sensors by sequentially setting corresponding bits in the MUX_CRx registers.

• Implements CapSense® capacitive sensing in the CY8C20xx6AS family of PSoC® devices.
• Auto-tunes configurable system parameters in runtime to account for sensor, IC, and PCB characteristics.
• Specifically designed for superior noise immunity against external radiated and conducted noise.
• Supports three different levels of noise immunity (Low, Medium, and High) to optimize user module performance and resource usage.
• Supports up to 36 capacitive sensors and 6 sliders.
• Supports parasitic sensor capacitance range of 5 pF to 45 pF.
• Detects touches as low as 0.1 pF; that is, a finger touch can be detected through up to 15 mm of glass or 5 mm of plastic.
• High immunity to AC mains noise, other EMI, and power supply noise.
• Supports capacitive sensors configured as independent buttons and also as dependent arrays to form sliders.
• For more, see pdf

Note: This user module supports only C language projects. ASM (Assembly language) projects are not supported.

• Implements CapSense® capacitive sensing in the CY8C20xx7S family of PSoC® devices
• Auto-tunes configurable system parameters in runtime to account for sensor, IC, and PCB characteristics
• Supports as many as 35 capacitive sensors and six sliders
• Supports parasitic sensor capacitance range of 5 pF to 45 pF
• Detects touches as low as 0.1 pF, that is, a finger touch can be detected through up to 15 mm of glass or 5 mm of plastic
• High immunity to AC mains noise, other EMI, and power supply noise
• Supports capacitive sensors configured as independent buttons and also as dependent arrays to form sliders
• Provides diplexing option, which enables two linear slider elements to be assigned per dedicated I/O pin
• Supports slider resolution greater than physical pitch through interpolation
• Provides shield electrode for reliable operation with high parasitic capacitance and in the presence of water film
• Enables guided sensor and pin assignments using the SmartSense_EMCplus™ Wizard
• The SmartSense Electromagnetic Compatible (SmartSense_EMCplus) User Module provides superior noise immunity against external noise

• Scan 1 to 48 capacitive sensors.
• Sensing possible with up to a 15 mm glass overlay.
• Proximity detection to 20 cm with a wire-based sensor.
• High immunity to AC mains noise, EMC noise, and power supply voltage changes.
• Supports different combinations of independent and slide capacitive sensors.
• Double slide sensor physical resolution using diplexing.
• Increase slide sensor resolution using interpolation.
• Touchpad support with two slide sensors.
• Sensing support through high resistive conductive materials (ITO films for example).
• Shield electrode support for reliable operation in the presence of water film or droplets.
• Guided sensor and pin assignments using the CSD2X Wizard.
• Integrated baseline update algorithm for handling temperature, humidity, and electrostatic discharge (ESD) events.
• Easily adjustable operational parameters.
• PC GUI application support for raw data monitoring and parameter optimization in real-time.
   

The CSD2X User Module (Capacitive Sensing using a Sigma-Delta Modulator) provides capacitance sensing using the switched capacitor technique with a sigma-delta modulator to convert the sensing switched capacitor current to digital code. The CSD2X User Module can support double-channel CapSense scanning with First and Second order of Sigma Delta Modulator.

• Scan 1 to 37 capacitive sensors
• Sensing possible with up to a 15 mm glass overlay
• Proximity detection to 20 cm with a wire-based sensor
• High immunity to AC mains noise, EMC noise, and power supply voltage changes
• Supports different combinations of independent and slide capacitive sensors
• Double slide sensor physical resolution using diplexing
• Increase slide sensor resolution using interpolation
• Touchpad support with two slide sensors
• Sensing support through high resistive conductive materials (ITO films for example)
• Shield electrode support for reliable operation in the presence of water film or droplets
• Guided sensor and pin assignments using the CSD2x Wizard
• Integrated baseline update algorithm for handling temperature, humidity, and electrostatic discharge (ESD) events
• Easily adjustable operational parameters
• PC GUI application support for raw data monitoring and parameter optimization in real-time
   

The CSD2x User Module (Capacitive Sensing using a Sigma-Delta Modulator) gives capacitance sensing using the switched capacitor technique with a sigma-delta modulator to convert the sensing switched capacitor current to digital code. The CSD2x User Module can support single-channel CapSense scanning and dual-channel CapSense scanning.

• Provides a global shadow register for a selected port data register
• Generates a set of macros for port pin manipulation
• Prevents corruption of GPIO pin settings during CPU control of GPIO
• Cooperates with other user modules that allocate shadow registers.
   

• Choice between three implementations:
  • FSK modem only
  • FSK modem with proprietary Powerline Communication Protocol
  • FSK modem with proprietary Powerline Communication Protocol along with built-in communication to external microcontrollers through I2C
• Bidirectional half-duplex communication
• Supports master and slave and peer-to-peer network topologies
• Multiple masters on powerline network
• Each device has a built in unique 64-bit address
• For more, see pdf

The Powerline Transceiver (PLT) User Module gives a control interface within the PLC device for communicating between the application and the FSK Modem. The application may either run on the PLC device or on a separate device that communicates with the PLC device through I2C, RS232, or SPI. The I2C communication implementation is available as a user module option and does not require additional coding to operate.

• Control of laser navigation engine and on-chip power management
• Resolution (counts per inch) control
• Continuous variable resolution setting from 1 to 3200 dpi
• 360 degree navigation support
• Independent X and Y resolution control
• Flexible track modes
• Automatic laser control for eye-safe operation
• Power consumption optimized for mobile device applications
   

The LPNAV User Module enables designers to control and configure the settings for a laser navigation system.
 

• User-programmable corner frequency and damping ratio
• Corner frequency ranging from 20 Hz to 180 kHz
• Automated design for Bessel, Butterworth, and Chebychev filters
• User-selected oversample ratio (OSR), ratio of sample frequency to corner frequency
• Built-in polarity control
• Built-in modulator for use in full-wave detection and frequency translation

The LPF2 User Module uses two switched-capacitor blocks to implement a general-purpose second order low-pass filter. Corner frequency and damping ratio are functions of the ratios of programmable on-chip capacitors and clock frequency; no external components are required. Selects your filter characteristics and clock frequency; capacitor and clock divider values are automatically calculated in the design tool (wizard). Multiple low-pass filters can be cascaded or combined with band-pass filters to achieve more complex transfer functions.

• User programmable center frequency, Q, and Gain
• No external components required
• Center frequency 20 Hz to 200 kHz
• Automated design using wizard
• User-selected over-sample ratio (OSR), a ratio of sample frequency to corner frequency
• Built-in polarity control
• Built-in comparator output for use in full-wave detection and communication applications
• Built-in modulator for use in frequency translation and signal generation

The BPF2 User Module uses two switched-capacitor blocks to implement a general-purpose second order band-pass filter. Center frequency and Q are functions of the ratios of programmable on-chip capacitors and clock frequency; no external components are required. The user selects filter characteristics and clock frequency. Capacitor and clock divider values are automatically calculated in the design tool (wizard). BPF2 can be cascaded or combined with other filter types to make more complex filter structures.

• Full LIN 2.1 or 2.0 Slave Node implementation
• Supports compliance with SAE J2602-1 specification
• Automatic baud rate synchronization
• Fully implements a Diagnostic Class I Slave Node
• Full Transport Layer support
• Automatic detection of bus inactivity
• Full error detection
• Automatic Configuration Services handling
• Wizard for fast and easy configuration
• Import of *.ncf/*.ldf files and *.ncf file export
• Editor for *.ncf/*.ldf files with syntax checking

The LINS User Module implements a LIN 2.1 slave node on a PSoC device. In addition, options for LIN 2.0 or SAE J2602-1 compliance are available. This user module consists of the hardware blocks necessary to communicate on the LIN bus, and an API to allow the application code to easily interact with the LIN bus communication. The user module provides an API that conforms to the API specified by the LIN 2.1 specification.

This user module provides a good combination of flexibility and ease-of-use. A wizard for the user module is provided that allows configuring all parameters of the LIN slave in an easy manner.

• User-programmable gain
• User-programmable corner frequency (from 20 Hz to 150 kHz), Notch frequency (for low and high filter pairs) and damping ratio with no external components
• Filter corner-frequency stability directly derived from clock accuracy
• Filter sampling rates up to 1.5 MHz
   

The ELPF4 User Module implements a general purpose four-pole low-pass filter with up to two pairs of elliptical zeroes at user selectable frequencies. The zeroes result in notches in the transfer function, intended to eliminate specific frequencies. Damping ratio are functions of the clock frequency and the ratios of the capacitor values calculated automatically based on the user parameters preset (Corner, Sample and Notch frequency, Gain, Filter type). Any of the classical all-pole filter configurations (Butterworth, Bessel, and Chebyshev) can be implemented. You can also select custom filter configuration, and enter values for complex poles. The corner frequency can be set very accurately or adjusted by controlling the sample rate clock. The filter output can drive the analog output bus.

• Incremental ADC supporting first order and second order modulator
• Selectable sample rate 0.007–15.625 ksps
• Selectable resolution 6–14 bits
• Selectable gain 1x–48x
• Selectable reference
• Automatic clock calculation
• Signed and unsigned output data format
• Enables AGND output to AnalogBus
• Offset error compensation
• Configurable offset error compensation frequency

Features and Overview

• Flexible input sources
• Direct connection to digital PSoC block and interrupt

The CMP User Module gives a comparison of two selectable inputs. Both inputs have the same set of possible connections to choose from. This enables you to select the polarity of the output.

• Low voltage offset path from PMux to analog output bus
• Provides a method to route internal references (AGND, REFHI, REFLO) to an external pin
• Provides a 4 to 1 analog mux for switch capacitor blocks such as ADCs and filters, if used with the AMux4 User Module
• Signals from PMux through test mux may be rail-to-rail
• Provides a method to route external analog inputs directly to the analog output bus
   

The RefMux User Module switches one of three internal references (AGND, REFLO, or REFHI) to the analog output bus. Additionally, the output of the Continuous Time (CT) block PMux multiplexer can be selected. The RefMux User Module makes use of the TestMux in a CT block. These signals may be routed to a switch capacitor block on the bottom analog row or buffered and routed to an external pin. If used in conjunction with the AMux4 User Module, they form a four input analog multiplexer to route signals from one of four pins to the analog output bus. 

• 6-bit resolution with 32X oversampling to 14-bit resolution with 256X oversampling
• Data in unsigned or signed 2’s complement formats
• Maximum sample rates of 65,500 sps at 6 bit resolution, 7812 sps at 14-bit resolution
• Sinc² filter fully implemented in hardware reduces CPU overhead and anti-alias requirements
• 1st-Order or 2nd-Order modulator, user selectable
• Input range defined by internal and external reference options
• Optional synchronized PWM Output

The DelSig is an integrating converter, requiring from 32 to 256 integration cycles to generate a single output sample. Changing multiplexed inputs, invalidates the first two samples following the change.

• Industry standard Philips I2C bus compatible interface
• Slave-only operation
• Only two pins (SDA and SCL) are required to interface to I2C bus
• Standard data rate of 50, 100, and 400 kbps
• No clock stretching
• 32-byte hardware data buffer

The I2CSBUF User Module implements an I2C register based slave device. The I2C bus is an industry standard, two wire hardware interface developed by Philips® (now NXP). The master initiates all communication on the I2C bus and supplies the clock for all slave devices. The I2CSBUF user module supports the standard mode with speeds of as much as 400 kbps. The I2CSBUF user module is compatible with multiple devices on the same bus.

1. Timer resource usage, for CY8C20xx6H devices only.
2. The presented API memory value is for worst case. Used Flash depends on TS2000 configuration selected  and the type of    compiler used.
3. Consumed RAM significantly depends on how many and what effects were enabled in the TS2000 parameters.

Features and Overview

• Haptics effects based on industry proven Immersion TouchSense 2000 Haptics Effect Library
• Selection of up to 14 different effects
• Selection of two actuator models
• Improved user accuracy of CapSense® buttons due to tactile feedback
• Up to 3.3V operation
• Simple API to play haptic effects
   

The TS2000 User Module enables haptic feedback effects based on Immersion TouchSense 2000 technology when added to a project. Haptics is a tactile sensation effect that lets the equipment user know that a touch event has been detected. Input accuracy and user satisfaction with the equipment is improved with haptics.

Features and Overview

• 16-bit general purpose timer uses two PSoC blocks
• Source clock rates up to 48 MHz
• Automatic reload of period on terminal count
• Capture for clocks up to 24 MHz
• Terminal count output pulse may be used as input clock for other analog and digital functions
• Interrupt option on terminal count, capture (on some devices), or when counter reaches a preset value
   

The 16-bit Timer User Modules provides a down counter with programmable period and capture ability. The clock and enable signals can be selected from any system time base or external source. Once started, the timer operates continuously and reloads its internal value from the period register upon reaching terminal count. The output pulses high in the clock cycle following terminal count. Events can capture the current Timer count value by asserting the edge-sensitive capture input signal. Each clock cycle, the Timer tests the count against the value of the compare register for either a “Less Than" or “Less Than or Equal To" condition. Interrupts may be generated based on terminal count and compare signals. Some device families offer two additional features. The interrupt options include “interrupt on capture" and, in addition, the compare signal may be routed onto the row buses. If these options are available on your chosen device they will be shown in the Device Editor. 

• Flexible memory map
• Device reprogramming without engineering tools
• Product resident reprogramability
• Communication interface integrated to minimize code overhead
• Field deployment of firmware upgrades
• USB Full Speed device interface driver
• Support for interrupt and control transfer types
• Setup wizard for easy and accurate descriptor generation
• Runtime support for descriptor set selection
• Optional USB string descriptors
• Optional USB HID class support

• Industry standard Philips I2C-bus compatible interface
• Enables you to reprogram a PSoC device through the I2C system bus instead of  in-system programming pins
   

The I2C Bootloader User Module implements a bootloader that can reprogram the PSoC device over the I2C interface. The PSoC device already gives an in-system serial programming interface (ISSP) that allows downloading new code into the device. However, the bootloader allows a code update to occur through an industry standard communication interface, such as I2C. This User Module can be useful for any device that has to be reprogrammed in the field. The bootloading information can be sent through an I2C master device, such as a CY3240 (USB to I2C bridge) or an in-system host processor.     

• Flexible memory map
• Device reprogramming without engineering tools
• Product resident reprogramability
• Communication interface integrated to minimize code overhead
• Field deployment of firmware upgrades
• USB Full Speed device interface driver
• Support for interrupt and control transfer types
• Setup wizard for easy and accurate descriptor generation
• Runtime support for descriptor set selection
• Optional USB string descriptors
• Optional USB HID class support
• Optional USB-UART (CDC) class support

The USB Bootloader User Module implements a bootloader that can reprogram the PSoC device over the USB interface. The PSoC device already gives an in-system serial programming interface (ISSP) that allows downloading new code into the device. However, the bootloader allows a code update to occur through an industry standard communication interface, such as USB. This User Module can be useful for any device that has to be reprogrammed in the field. The bootloading information can be sent through a Cypress USB Bootloader Host interface.    

• Industry standard Philips I2C bus compatible interface.
• Enables you to reprogram a PSoC device using the I2C system bus instead of in-system programming pins.

The I2C Bootloader User Module implements a bootloader that can reprogram the PSoC device over the I2C interface. The PSoC device already gives an in-system serial programming interface (ISSP) that allows downloading new code into the device. However, the bootloader allows a code update to occur through an industry standard communication interface, such as I2C.

• The 8-bit general purpose counter uses one PSoC block
• Source clock rates up to 48 MHz
• Automatic reload of period on terminal count
• Programmable pulse width
• Input enables/disables continuous counter operation
• Interrupt option on compare output or terminal count
   

The 8-Bit Counter User Module provides a down counter with a programmable period and pulse width. The clock and enable signals can be selected from any system time base or external source. Once started, the counter operates continuously and reloads its internal value from the period register upon reaching terminal count. During each clock cycle, the counter compares the current count to the value stored in the compare register. Each clock cycle, the Counter tests the count against the value of the compare register for either a “less than" or “less than or equal to" condition. The comparator output provides a logic level that may be routed to pins and to other user modules. Most PSoC device families also permit the terminal count output to be routed in the same manner.

• The 16-bit general purpose counter uses two PSoC blocks
• Source clock rates up to 48 MHz
• Automatic reload of period on terminal count
• Programmable pulse width
• Input enables/disables continuous counter operation
• Interrupt option on compare output or terminal count
   

The 16-bit Counter User Modules provide a down counter with a programmable period and pulse width. The clock and enable signals can be selected from any system time base or external source. Once started, the counter operates continuously and reloads its internal value from the period register upon reaching terminal count. During each clock cycle, the counter compares the current count to the value stored in the compare register. Each clock cycle, the Counter tests the count against the value of the compare register for either a “less than” or “less than or equal to” condition. The comparator output provides a logic level that may be routed to pins and to other user modules. Most PSoC device families also permit the terminal count output to be routed in the same manner. If your device has this ability, it is shown in the device editor. An interrupt can be programmed to trigger when the counter reaches the terminal count or when the comparator (primary) output is asserted.

The SPI-based WUSB_NL User Module is a firmware interface to the CYRF8935 WirelessUSB NL radio modem hardware.

• Typical transmit power: 0 dBm
• Packet framer with 64-byte first in first out (FIFO) data buffer
• Auto-retry-acknowledge protocol to simplify usage
• Cyclic Redundancy Check (CRC)
• Forward Error Correction (FEC)
• Supports up to 4 Mbps SPI bus baud rate
• Digital readout of received signal strength indication (RSSI)

Functional Description

The WUSB_NL User Module can be used as a base for developing proprietary wireless protocols. The WUSB_NL User Module application programming interface (API) provides functions that can be called from both C and assembly to start the radio, send and receive data, change channels, change transmit power, and more.

The WUSB_NL User Module offers hardware SPI interface, initialization, configuration, and communication functions for interfacing with an NL radio.

• Selectable input
• Selectable output (with row interconnect)
• Selectable clock up to 48 MHz
• Data input can be inverted
• Data output is active low
• Available 8, 16, 24, 32-bit Relax Time 
   

The OneShot User Module is a device that produces a single pulse in response to an input signal. It can be used to reshape short input pulses and generate single pulses with a required duration.

• Hardware implementation of IrDA low-speed, physical-layer transmitter
• Data bit rate selectable to a maximum transmit rate of 115.2 kbps
• Optional interrupt on transmit buffer empty

• Hardware implementation of IrDA receiver
• Data format compliant with IrDA data format
• Data bit rate selectable to a maximum receive rate of 115.2 kbps
• Data framing consists of start and stop bits
• Optional interrupt on receive register full
• Overrun and framing error detection

• Burst rates up to 6 Mbits/second
• RS-232 data-format compliant with framing consisting of start, optional parity, and stop bits
• Serial data format with even, odd, or no parity
• Optional interrupt receive register full condition
• Automatic framing, overrun, and parity error detection
   

The RX8 User Module is a RS-232 data-format compliant 8-bit serial receiver with programmable clocking and selectable interrupt or polling control operation. The format of the received data consists of a start bit, an optional parity bit, and a trailing stop bit. Receiver firmware is used to initialize the device, read the received byte, and detect error conditions.

• Requires only two I/O pins to interface multiple slave devices
• Functions provided support reading and writing of both bits and bytes
• Function provided for CRC-8 data integrity checking
• Optional CRC-16 function for iButton® data integrity checking
• Optional functions provided for performing One-Wire search for handling multiple devices
• Optional functions provided for overdrive speed supported by some One-Wire devices
• Optional functions provided for parasite power supported by some One-Wire devices

The OneWire User Module is a set of library routines that read and write data as a master using the Maxim Integrated Products 1-Wire® protocol. A One-Wire master may communicate with one or many slave devices using only one signal wire and a ground. The master initiates all data transfers.

• Implements CapSense® capacitive sensing in the CY8C20xx6L family of PSoC® devices using the sigma-delta data conversion
• Immune to GPIO current transient, VDD fluctuation, entry and exit from sleep, and IDAC RTS noise
• Configurable system parameters enable tuning so that performance is optimized in a broad range of applications
• Supports up to 36 capacitive sensors and 6 sliders
• Capable of detecting touches as low as 0.1 pF, that is, a finger touch can be detected through up to 15 mm of glass or 5 mm of plastic
• Supports capacitive sensors configured as independent buttons and as dependent arrays to form sliders
• Effective numbers of slider elements can double the number of dedicated I/O pins using the diplexing technique
• Supports slider resolution greater than the physical pitch through interpolation
• Gives shield electrode for reliable operation with high parasitic capacitance and in the presence of a water film
• Guided sensor and pin assignments using the CSDe Wizard
• For more, see pdf

• Allows scanning CapSense sensors and measuring input voltages without using separate loadable configurations
• ADC features:
  • Absolute and ratiometric ADC input modes with run-time mode switching allows you to easily scan different sensor types
  • Single slope ADC for absolute voltage input mode
  • Built-in calibration mechanism for the single-slope ADC
  • Integrating incremental ADC for ratiometric input mode
  • Allows a coarse temperature measurement: range of -40°C to +125°, accuracy of ± 40°C with resolution ± 2°C
• CapSense® features:
  

  • Based on the robust CSD method
  • Scans 1 to 28 capacitive sensors
  • Sensing possible with up to a 15-mm glass overlay
  • Proximity detection to 20 cm with a wire-based sensor
  • For more, see pdf

Functional Description

The CSDADC combines capacitance sensing with ADC functionality for voltage measurement without using separate loadable configurations. It saves code space by reusing modules common to both the CSD and ADC. You should use the CSDADC when you need both capacitance sensing and ADC functionality. Applications that need one or the other should use the CSD User Module or the ADC8 or ADC10.

• Allows scanning CapSense sensors and measuring input voltages without using separate loadable configurations
• Uses a Sinc^N filter fully implemented in hardware to reduce CPU overhead and antialias requirements
• Supports a configuration that uses no digital blocks
• ADC features:
  • Sigma-delta ADC with second order modulator
  • Data in unsigned or signed 2’s complement formats
  • Dynamically changed resolution to 10,12 and 14 bits
  • Maximum sample rates of 31250 sps at 10 bit resolution, 7812 sps at 14-bit resolution
  • Input range defined by internal and external reference options
  • Built in Programmable Gain Amplifier with configurable gain and reference settings.
• CapSense features:
  • Based on the robust CSD method
  • Second order modulator provides superior SNR performance
  • Scans 1 to 46 capacitive sensors
  • Sensing possible with up to a 25 mm glass overlay  
  • For more, see pdf

• Scan 1 to 28 capacitive sensors
• Scan capacitive sliders with 2 to 28 elements
• Slider physical resolution doubling using diplexing
• Slider interpolated resolution up to 1 part in 65535
• Generate touchpad using multiple slider sensors
• Adjustable sensor sensitivity, detection threshold, and sampling rate
• Guided sensor and pin assignments using the CSA_EMC Wizard
• Integrated baseline update algorithm for handling temperature changes
• Compensate for environmental and physical sensor variations
   

The CapSense® Successive Approximation Electromagnetic Compatibility (CSA_EMC) User Module implements an array of capacitive touch sensors using switched capacitor circuitry, an analog multiplexer, digital counting functions, and high level software routines to compensate for environmental and physical sensor variations. The sensor array can consist of combinations of independent sensors, sliding sensors, and touchpads implemented as a pair of orthogonal sliding sensors. High level software routines accommodate slider diplexing. Slider diplexing allows a single pin to measure two electrical sensors in two different physical locations. Diplexing provides resolution enhancement of the slider without the cost of an additional I/O.

• Does not require digital blocks
• Selectable 8, 16, or 32-bit tick counter
• Three types of timer functions.

The SleepTimer User Module provides basic timing functions without the use of valuable digital blocks. This user modules makes use of the standard sleep timer to create a variety of timing functions that are often useful in a project.

• Multiplexed -1/2 bias supported
• 2, 3, and 4 common LCD drive
• 30-150 Hz refresh rate
• LCD Drive technique using analog MUX bus
• Option of 1/2 bias to be generated externally or internally
• Supports Type A waveform only
• Contrast Control
   

The Segment LCD Driver (SLCD) User Module drives the LCD glass directly without using any external components.

• Scan up to 41 capacitive sensors (depending on the device pin count).
• Sensing is possible with up to a 15 mm glass overlay.
• Proximity detection to 20 cm with a wire-based sensor.
• High immunity to AC mains noise, EMC noise, and power supply voltage changes.
• Supports different combinations of independent and slide capacitive sensors.
• Double slide sensor physical resolution using diplexing.
• Increase slide sensor resolution using interpolation.
• Touchpad support with two slide sensors.
• Sensing support through high resistive conductive materials (indium tin oxide (ITO) films for example).
• Shield electrode support for reliable operation in the presence of water film or droplets.
• Guided sensor and pin assignments using the CSD Wizard.
• Integrated baseline update algorithm for handling temperature, humidity, and electrostatic discharge (ESD) events.
• Easily adjustable operational parameters.
• PC GUI application support for raw data monitoring and parameter optimization in real time.
   

• Scan 1 to 28 capacitive sensors.
• Sensing possible with up to a 15 mm glass overlay.
• Proximity detection to 20 cm with a wire-based sensor.
• High immunity to AC mains noise, EMC noise, and power supply voltage changes.
• Supports different combinations of independent and slide capacitive sensors.
• Double slide sensor physical resolution using diplexing.
• Increase slide sensor resolution using interpolation.
• Touchpad support with two slide sensors.
• Sensing support through high resistive conductive materials (ITO films for example).
• Shield electrode support for reliable operation in the presence of water film or droplets.
• Guided sensor and pin assignments using the CSD Wizard.
• Integrated baseline update algorithm for handling temperature, humidity, and electrostatic discharge (ESD) events.
• Easily adjustable operational parameters.
• PC GUI application support for raw data monitoring and parameter optimization in real time.
   

Capacitive sensing using a sigma delta modulator (CSD) provides CapSense® functionality using a switched capacitor technique with a sigma-delta modulator to convert the sensing switched capacitor current to digital code.

• Scan 1 to 46 capacitive sensors.
• Sensing possible with up to a 15 mm glass overlay.
• Proximity detection to 20 cm with a wire-based sensor.
• High immunity to AC mains noise, EMC noise, and power supply voltage changes.
• Supports different combinations of independent and slide capacitive sensors.
• Double slide sensor physical resolution using diplexing.
• Increase slide sensor resolution using interpolation.
• Touchpad support with two slide sensors.
• Sensing support through high resistive conductive materials (ITO films for example).
• Shield electrode support for reliable operation in the presence of water film or droplets.
• Guided sensor and pin assignments using the CSD Wizard.
• Integrated baseline update algorithm for handling temperature, humidity, and electrostatic discharge (ESD) events.
• Easily adjustable operational parameters.
• PC GUI application support for raw data monitoring and parameter optimization in real time.
   

The Capacitive Sensing using a Sigma-Delta Modulator (CSD) provides CapSense® functionality using the switched capacitor technique with a sigma-delta modulator to convert the sensing switched capacitor current to digital code.

• Immune to GPIO current transient, Vdd fluctuation, entry and exit from sleep, and IDAC RTS noise.
• Implements CapSense® capacitive sensing using sigma-delta data conversion.
• Configurable system parameters allow tuning to optimize performance in a broad range of applications.
• Supports up to 35 capacitive sensors or 6 sliders.
• Capable of detecting touches as low as 0.1 pF, that is, detecting a finger is possible through up to 15 mm of glass or 5mm of plastic.
• Supports capacitive sensors configured as independent buttons and/or as dependent arrays to form sliders.
• Effective number of slider elements can double the number of dedicated I/O pins using diplexing technique.
• For more, see pdf.
   

The Capacitive Sensing using a Sigma Delta Modulator (CSD) User Module is based on the differential capacitive sensing method. This user module uses the Analog MUX Bus for connecting a capacitive sensing analog circuitry to any PSoC pin.

• Scan 1 to 28 capacitive sensors.
• Sensing possible with up to a 15 mm glass overlay.
• Proximity detection to 20 cm with a wire-based sensor.
• High immunity to AC mains noise, EMC noise, and power supply voltage changes.
• Supports different combinations of independent and slide capacitive sensors.
• Double slide sensor physical resolution using diplexing.
• Increase slide sensor resolution using interpolation.
• Touchpad support with two slide sensors.
• Sensing support through high resistive conductive materials (ITO films, for example).
• Shield electrode support for reliable operation in the presence of water film or droplets.
• Guided sensor and pin assignments using the CSD Wizard.
• Integrated baseline update algorithm for handling temperature, humidity, and electrostatic discharge (ESD) events.
• Easily adjustable operational parameters.
• PC GUI application support for raw data monitoring and parameter optimization in real time.
   

The Capacitive Sensing using a Sigma Delta Modulator (CSD) gives CapSense® functionality using a switched capacitor technique with a sigma-delta modulator to convert the sensing switched capacitor current to digital code.

• 16-bit general purpose pulse width modulator uses two PSoC blocks
• Source clock rates up to 48 MHz
• Automatic reload of period for each pulse cycle
• Programmable pulse width
• Input enables/disables continuous counter operation
• Interrupt option on rising edge of the output or terminal count
   

The 16-bit PWM User Module is a pulse width modulator with programmable period and pulse width. The clock and enable signals can be selected from several sources. The output signal can be routed to a pin or to one of the global output buses, for internal use by other user modules. An interrupt can be programmed to trigger on the rising edge of the output or when the counter reaches the terminal count condition.   

• 8 -bit general purpose pulse width modulator uses one PSoC block
• Source clock rates up to 48 MHz
• Automatic reload of period for each pulse cycle
• Programmable pulse width
• Input enables/disables continuous counter operation
• Interrupt option on rising edge of the output or terminal count
   

The 8-bit PWM User Module is a pulse width modulator with programmable period and pulse width. The clock and enable signals can be selected from several sources. The output signal can be routed to a pin or to one of the global output buses, for internal use by other user modules. An interrupt can be programmed to trigger on the rising edge of the output or when the counter reaches the terminal count condition.

• 8-bit general purpose pulse width modulator (PWM) with an 8-bit dead band generator consumes two PSoC blocks
• Phase1 and Phase2 underlapped outputs track the frequency of the generated PWM signal
• Programmable duty cycle
• Programmable dead time
• Dead Band Kill input drives Phase1 and Phase2 outputs low
• Counter clocking up to 48 MHz
• Interrupt option triggered on rising edge of the PWM generated signal or counter terminal count

The 8-bit PWMDB User Module is a pulse width modulator combined with an 8-bit dead band generator. The pulse width modulator provides a programmable period and pulse width input signal to the dead band generator. The dead band generator outputs two under-lapped signals, with programmable dead time at the same frequency as the input signal. When asserted, the Dead Band Kill input drives the Phase1 and Phase2 output signals low. The clock and enable signals can be selected from several sources. The Phase1 and Phase2 output signals can be routed to the external pin ports or to the global output buses for internal use by other user modules. An interrupt can be programmed to effectively trigger on both edges of the pulse width modulator output.

Features and Overview

• Protocol stack that implements node functionality to support a wireless star network consisting of one hub and up to 250 nodes
• Provides reliable two way communication between a hub and node
• Dynamic data rate (up to 1 Mbps) and output power according to the channel noise level and packet loss rate
• Operates in the unlicensed worldwide Industrial, Scientific, and Medical (ISM) band (2.400–2.483GHz)

The CyFi™ Star Network Protocol Stack (CYFISNP) User Module is designed to address up to 250 general purpose nodes; it provides reliable two way communication between the hub and node(s). The hub is assumed to be wall powered, while the nodes may be either wall powered or powered by an alkaline (low impedance) or coin-cell (high impedance) battery.

Features and Overview

• The USBUART Device uses a USB interface to emulate a COM port.
• UART-like high level functions are available on the PSoC device side.
   

Functional Description

Many embedded applications use the RS-232 interface to communicate with external systems such as PCs, especially when debugging. But in the PC world, the RS-232 COM port will soon disappear from most new computers, leaving USB as the replacement for serial communication. The simplest way to migrate a device to USB is to emulate RS-232 over the USB bus. The primary advantage of this method is that PC applications use the USB connection as an RS-232 COM connection, making it very simple to debug. This method uses a standard Windows® driver that is included with all versions Microsoft® Windows from Windows 98SE through Windows XP.

• USB Full Speed device interface driver
• Support for interrupt and control transfer types
• Setup wizard for easy and accurate descriptor generation
• Runtime support for descriptor set selection
• Optional USB string descriptors
• Optional USB HID class support
   

• Industry standard Philips I²C-bus compatible interface (version 2.1)
• Only two pins (SDA and SCL) required to interface several slave I²C devices
• Standard mode data supports rate of 100 kbits/s
• High level API requires minimal user programming
• Low level API provided for flexibility

• Uses the industry standard Hitachi HD44780 LCD display driver chip protocol
• Requires only seven I/O pins
• Routines provided to print RAM or ROM strings
• Routines provided to print numbers
• Routines provided to display horizontal and vertical bar graphs
• Uses a single I/O port
   

The Character LCD User Module is a set of library routines that writes text strings and formatted numbers to a common two- or four-line LCD module. Vertical and horizontal bar graphs are supported, using the character graphics feature of these LCD modules. This module was developed specifically for the industry standard Hitachi HD44780 two-line by 16 character LCD display driver chip, but will work for many other four-line displays. This library uses the 4-bit interface mode to limit the number of I/O pins required.

• Supports Serial Peripheral Interconnect (SPI) Master protocol.
• Supports SPI clocking modes 0, 1, 2, and 3.
• Selectable input sources for clock and MISO.
• Selectable output routing for MOSI and SCLK.
• Programmable interrupt on SPI done condition.
• SPI Slave devices are independently selected.
   

The SPIM User Module is a Serial Peripheral Interconnect Master. It performs full duplex synchronous 8- bit data transfers. SCLK phase, SCLK polarity, and LSB First are available to accommodate most SPI clocking modes. Controlled by user supplied software, the slave select signal is able to control one or more SPI Slave devices. The SPIM PSoC block has selectable routing for the input and output signals and programmable interrupt driven control.

• Supports Serial Peripheral Interconnect (SPI) slave protocol.
• Supports protocol modes 0, 1, 2, and 3.
• Selectable input sources for MOSI, SCLK, and ~SS.
• Selectable output routing for MISO.
• Programmable interrupt on SPI done condition.
• SS may be firmware controlled.
   

The SPIS User Module is a Serial Peripheral Interconnect Slave (SPIS). It performs full duplex synchronous 8 bit data transfers. You can specify SCLK phase, SCLK polarity, and LSB First to accommodate most SPI protocols. The SPIS PSoC block has selectable routing for the input and output signals and programmable interrupt driven control. Application Programming Interface (API) firmware provides a high level programming interface for either assembly or C application software.

• Control of laser navigation engine and on-chip power management
• Resolution (counts per inch) control
• Flexible track and sleep modes
• Automatic laser control for eye-safe operation
• USB 5V, battery, or 3V external power operation, when supported by device.

The LaserNAV User Module enables you to control and configure the settings for the laser navigation and power system. Finger navigation and wired/wireless/hybrid mouse and trackball solutions are all supported.

• Industry standard Philips I2C bus compatible interface
• Emulates common I2C EEPROM interface
• Only two pins (SDA and SCL) required to interface to I2C bus
• Standard data rate of 100/400 kbps
• High level API requires minimal user programming
   

The EzI2Cs user module implements an I2C register-based slave device. The I2C bus is an industry standard, two wire hardware interface developed by Philips® (now NXP).The master initiates all communication on the I2C bus and supplies the clock for all slave devices. The EzI2Cs user module supports the standard mode with speeds up to 400 kbps. No digital or analog PSoC blocks are consumed with this module. The EzI2Cs user module is compatible with multiple devices on the same bus.

• 8 to 10-bit resolution
• Sample rate up to 11.71 ksps (10-bit resolution)
• Sample rate up to 46.875 ksps (8-bit resolution)
• Input range up to reference voltage
• Internal clock divider
   

The ADCINC User Module is part of the System Performance Controller (SPC). SPC is a modular system for product performance compensation over process, voltage, and temperature variations. The system is based on the M8C microcontroller. The heart of the SPC is the microcontroller core, temperature sensor, and the SPC system bus.