Features

• Very high speed: 45 ns
• Wide voltage range: 2.2V to 3.6V and 4.5V to 5.5V
• Ultra low standby power
  • Typical standby current: 1 μA
  • Maximum standby current: 7 μA
• Ultra low active power
  • Typical active current: 2 mA at f = 1 MHz
• Easy memory expansion with CE and OE features
• Automatic power-down when deselected
• Complementary metal oxide semiconductor (CMOS) for optimum speed and power
• Available in Pb-free 44-pin thin small outline package (TSOP) II package
   

Functional Description

The CY62136ESL is a high performance CMOS static RAM organized as 128K words by 16 bits. This device features advanced circuit design to provide ultra low active current. This is ideal for providing More Battery Life™ (MoBL®) in portable applications such as cellular telephones. The device also has an automatic power down feature that reduces power consumption when addresses are not toggling.

Features

• Temperature ranges
  • Industrial: –40°C to 85°C
  • Automotive-A: –40°C to 85°C
  • Automotive-E: –40°C to 125°C
• Pin and function compatible with CY7C1011BV33
• High speed
  • tAA = 10 ns (Industrial and Automotive-A)
  • tAA = 12 ns (Automotive-E)
• Low active power
  • 360 mW (max) (Industrial and Automotive-A)
• For more, see pdf

Functional Description

The CY7C1011CV33 is a high performance complementary metal oxide semiconductor (CMOS) static RAM organized as 131,072 words by 16 bits. This device has an automatic power down feature that significantly reduces power consumption when deselected.

Features

• Temperature Ranges
  • Industrial: –40°C to 85°C
  • Automotive: –40°C to 125°C
• Very high speed: 45 ns
• Wide voltage range: 2.2V to 3.6V
• Pin compatible with CY62127BV
• Ultra-low active power
  • Typical active current: 0.85 mA @ f = 1 MHz
  • Typical active current: 5 mA @ f = fMAX
• For more, see pdf

Functional Description

The CY62127DV30 is a high-performance CMOS static RAM organized as 64K words by 16 bits. This device features advanced circuit design to provide ultra-low active current. This is ideal for providing More Battery Life™ (MoBL^®) in portable applications such as cellular telephones. The device also has an automatic power-down feature that significantly reduces power consumption by 90% when addresses are not toggling.

Features

• High speed: 45 ns
• Wide voltage range: 4.5 V – 5.5 V
• Pin compatible with CY62138V
• Ultra low standby power
  • Typical standby current: 1 μA
  • Maximum standby current: 5 μA
• Ultra low active power
  • Typical active current: 1.6 mA @ f = 1 MHz
• Easy memory expansion with CE1, CE2, and OE features
• Automatic power down when deselected
• complementary metal oxide semiconductor (CMOS) for optimum speed and power
• Available in Pb-free 32-pin SOIC and 32-pin thin small outline package (TSOP) II packages

Functional Description

The CY62138F is a high performance CMOS static RAM organized as 256K words by 8 bits. This device features advanced circuit design to provide ultra low active current. This is ideal for providing More Battery Life™ (MoBL®) in portable applications such as cellular telephones. The device also has an automatic power down feature that significantly reduces power consumption when addresses are not toggling.

Features

• Very high speed: 45 ns
• Temperature ranges
  • Industrial: –40 °C to 85 °C
• Wide voltage range: 2.20 V–3.60 V
• Pin compatible with CY62137CV/CV25/CV30/CV33, CY62137V, and CY62137EV30
• Ultra low standby power
  • Typical standby current: 1 μA
• For more, see pdf
   

Functional Description

The CY62137FV30 is a high performance CMOS static RAM organized as 128K words by 16 bits. This device features advanced circuit design to provide ultra low active current. This is ideal for providing More Battery Life™ (MoBL®) in portable applications such as cellular telephones. The device also has an automatic power down feature that significantly reduces power consumption when addresses are not toggling.

Features
 

• Pin-and function-compatible with CY7C1011CV33
• High speed
  • tAA = 10 ns
• Low active power
  • ICC = 90 mA @ 10 ns (Industrial)
• Low CMOS standby power
  • ISB2 = 10 mA 
• Data Retention at 2.0 V
• Automatic power-down when deselected
• Independent control of upper and lower bits
• Easy memory expansion with CE and OE features
• Available in Pb-free 44-pin TSOP II, and 48-ball VFBGA
   

Functional Description

The CY7C1011DV33 is a high-performance CMOS Static RAM organized as 128 K words by 16 bits.

Features

• Pin-and function-compatible with CY7C1020CV33
• High speed
  • tAA = 10 ns
• Low active power
  • ICC = 60 mA @ 10 ns
• Low CMOS standby power
  • ISB2 = 3 mA
• 2.0V Data retention
• Automatic power-down when deselected
• For more, see pdf
   

Functional Description

The CY7C1020DV33 is a high-performance CMOS static RAM organized as 32,768 words by 16 bits. This device has an automatic power-down feature that significantly reduces power consumption when deselected.

• Very High-speed: 45 ns
• Temperature ranges
  • Industrial: –40 °C to 85 °C
  • Automotive-A: –40 °C to 85 °C
• Wide voltage range: 2.20 V to 3.60 V
• Pin compatible with CY62138CV25/30/33
• Ultra low standby power
  • Typical standby current: 1 μA
  • Maximum standby current: 5 μA
• For more, see pdf

Functional Description

The CY62138FV30 is a high performance CMOS static RAM organized as 256K words by 8 bits. This device features advanced circuit design to provide ultra low active current. This is ideal for providing More Battery Life™ (MoBL®) in portable applications such as cellular telephones. The device also has an automatic power down feature that significantly reduces power consumption. Place the device into standby mode reducing power consumption when deselected (CE1 HIGH or CE2 LOW).

Features

• Fast access time: 15 ns
• Wide voltage range: 5.0 V ± 10% (4.5 V to 5.5 V)
• CMOS for optimum speed and power
• TTL compatible inputs and outputs
• Available in 24-pin DIP and 24-pin SOJ

General Description

The CY7C197BN is a high performance CMOS Asynchronous SRAM organized as 256 K × 1 bits that supports an asynchronous memory interface. The device features an automatic power down feature that significantly reduces power consumption when deselected.

Features

• Temperature ranges
  • Military/Space: -55 °C to 125 °C
• High speed
  • tAA = 12 ns
• Low active power
  • ICC = 95 mA at 12 ns (PMAX = 315 mW)
• Low CMOS standby power
  • ISB2 = 15 mA
• 2.0 V data retention
• Automatic power-down when deselected
• Transistor-transistor logic (TTL) compatible inputs and outputs
• Easy memory expansion with CE and OE features
• Available in Pb-free 36-pin ceramic flat package
   

Functional Description

The CYRS1049DV33 is a high-performance complementary metal oxide semiconductor (CMOS) static RAM organized as 512 K words by 8 bits with RadStop™ technology. Cypress’s state-of-the-art RadStop technology is radiation hardened through proprietary design and process hardening techniques. The 4-Mbit fast asynchronous SRAM with RadStop technology is also QML V certified with Defense Logistics Agency Land and Maritime (DLAM).

Features

• Very high speed: 55 ns
  • Wide voltage range: 2.20 V to 3.60 V
• Temperature range:
  • Automotive-E: –40 °C to +125 °C
• Pin compatible with CY62148DV30
• Ultra low standby power
  • Typical standby current: 3 μA
  • Maximum standby current: 20 μA
• Ultra low active power
  • Typical active current: 2 mA at f = 1 MHz
• For more, see pdf

Functional Description

The CY62148EV30LL Automotive is a high performance CMOS static RAM organized as 512 K words by 8 bits. This device features advanced circuit design to provide ultra low active current. This is ideal for providing More Battery Life™ (MoBL®) in portable applications such as cellular telephones. The device also has an automatic power down feature that significantly reduces power consumption.

Cypress's 90nm technology Asynchronous SRAMs have best-in-class specifications in speed and power making them an ideal choice as memories in a wide variety of applications today.

The application note below discusses how they are suited for present generation processors and controllers while Cypress' older generation SRAMs (250nm and 350nm) are a good fit for interfacing with legacy processors and controllers. The 90nm technology 5V devices are pin compatible with their older technology counterparts. The reason for Cypress continuing to support end users with older generations SRAMs is because of their increased V_OH levels that ensure compliance with CMOS V_IH levels of legacy processors and microcontrollers. While both generations of SRAM's have the same industry standard V_OH spec, the difference in actual V_OH levels enable Cypress to support processors of older and present generations, reiterating Cypress' commitment as the #1 supplier in the industry.

Please see the illustrations and the application note below for details.

Processor receiving data from SRAM on a read operation:

The attached Application Note discusses Design Considerations that need to be taken into account when using Cypress MoBL SRAM's in these battery backed applications.

• Very high speed: 45 ns
• Wide voltage range: 2.20V 3.60 V
• Pin-compatible with CY62137CV30
• Ultra-low standby power
  • Typical standby current: 1μA
  • Maximum standby current: 7μA
• Ultra-low active power
  • Typical active current: 2 mA at f = 1 MHz
• Easy memory expansion with CE, and OE features
• For more, see pdf

• Very high speed: 45 ns
  • Wide voltage range: 2.20V to 3.60V
• Pin-compatible with CY62138CV30
• Ultra-low standby power
  • Typical standby current: 1 μA
  • Maximum standby current: 7 μA
• Ultra-low active power
  • Typical active current: 2 mA at f = 1 MHz
• Easy memory expansion with CE and OE features
• For more, see pdf

• Very High Speed
  • 55 ns
• Wide Voltage Range
  • 2.2V to 3.7V
• Ultra Low Standby Power
  • Typical Standby Current: 8 μA
  • Maximum Standby Current: 48 μA
• Ultra Low Active Power
  • Typical Active Current: 7.5 mA at f = 1 MHz
• Easy Memory Expansion with CE₁, CE₂, and OE Features
• Automatic Power Down when Deselected
• CMOS for Optimum Speed and Power
• Available in Pb-Free 48-Ball FBGA Package
   

Functional Description
 

Features

• Very high speed: 45 ns
  • Wide voltage range: 2.20V to 3.60V
• Temperature range:
  • Industrial: –40°C to 85°C
  • Automotive-A: –40°C to 85°C
• Pin compatible with CY62148DV30
• Ultra low standby power
  • Typical standby current: 1 μA
  • Maximum standby current: 7 μA (Industrial)
• For more, see pdf
   

Functional Description

The CY62148EV30 is a high performance CMOS static RAM organized as 512K words by 8 bits. This device features advanced circuit design to provide ultra low active current. This is ideal for providing More Battery Life™ (MoBL®) in portable applications such as cellular telephones. The device also has an automatic power down feature that significantly reduces power consumption.

Features

• Very high speed: 45 ns
• Temperature ranges
  • Industrial: –40°C to 85°C
• Wide voltage range: 2.20V to 3.60V
• Pin compatible with CY62147DV30
• Ultra low standby power
  • Typical standby current: 1 A
  • Maximum standby current: 7 A (Industrial)
• Ultra low active power
  • Typical active current: 2 mA at f = 1 MHz
• For more, see pdf
   

Functional Description

The CY62147EV30 is a high performance CMOS static RAM (SRAM) organized as 256K words by 16 bits. This device features advanced circuit design to provide ultra low active current. It is ideal for providing More Battery Life™ (MoBL®) in portable applications such as cellular telephones.

• High speed
  • t_AA = 12 ns
• Low active power
  • I_CC = 300 mA
• Low complementary metal oxide semiconductor (CMOS) standby power
  • I_SB2 = 100 mA
• Operating voltages of 3.3 ± 0.3 V
• 2.0-V data retention
• Automatic power-down when deselected
• Transistor-transistor logic (TTL)-compatible inputs and outputs
• Easy memory expansion with CE1 and CE2 features
• Available in Pb-free 48-ball fine ball grid array (FBGA) package

Functional Description

The CY7C1089DV33 is a high-performance CMOS static RAM organized as 8,388,608 words by 8 bits.

• High speed
  • t_AA = 12 ns
• Low active power
  • I_CC = 300 mA at 12ns
• Low complementary metal oxide semiconductor (CMOS) standby power
  • I_SB2 = 100 mA
• Operating voltages of 3.3 ± 0.3 V
• 2.0-V data retention
• Automatic power-down when deselected
• Transistor-transistor logic (TTL)-compatible inputs and outputs
• Easy memory expansion with CE1 and CE2 features
• Available in Pb-free 48-ball fine ball grid array (FBGA) package

Functional Description

The CY7C1081DV33 is a high-performance CMOS static RAM organized as 4,194,304 words by 16 bits.

Features

• Very high speed: 55 ns and 70 ns
• Wide voltage range: 2.20V–3.60V
• Ultra-low active power
  • Typical active current: 2 mA @ f = 1 MHz
  • Typical active current: 15 mA @ f = fmax
• Ultra low standby power
• Easy memory expansion with CE1, CE2 and OE features
• Automatic power-down when deselected
• CMOS for optimum speed/power
• Packages offered in a 48-ball FBGA
   

Functional Description

The CY62177DV30 is a high-performance CMOS static RAM organized as 2M words by 16 bits. This device features advanced circuit design to provide ultra-low active current. This is ideal for providing More Battery Life™ (MoBL®) in portable applications such as cellular telephones.The device also has an automatic power-down feature that significantly reduces power consumption.

Features

• Pin- and function-compatible with CY7C1020V33
• Temperature Ranges
  • Commercial: 0°C to 70°C
  • Industrial: –40°C to 85°C
  • Automotive: –40°C to 125°C
• High speed
  • t_AA = 10 ns
• CMOS for optimum speed/power
• Low active power
  • 325 mW (max.)
• Automatic power-down when deselected
• Independent control of upper and lower bits
• Available in Pb-free and non Pb-free 44-pin TSOP II package
   

Functional Description

The CY7C1020CV33 is a high-performance CMOS static RAM organized as 32,768 words by 16 bits. This device has an automatic power-down feature that significantly reduces power consumption when deselected.

Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O₁ through I/O₈), is written into the location specified on the address pins (A₀ through A₁₄). If Byte High Enable (BHE) is LOW, then data from I/O pins (I/O₉ through I/O₁₆) is written into the location specified on the address pins (A₀ through A₁₄).

Features

• TSOP I package configurable as 1M × 16 or 2M x 8 SRAM
• Very high speed: 45 ns
• Temperature ranges
  • Industrial: –40°C to 85°C
  • Automotive-A: –40°C to 85°C
• Wide voltage range: 2.20 V to 3.60 V
• Ultra-low standby power
  • Typical standby current: 1.5 μA
  • Maximum standby current: 12 μA
• For more, see pdf
   

Functional Description

The CY62167EV30 is a high performance CMOS static RAM organized as 1M words by 16 bits or 2M words by 8 bits. This device features an advanced circuit design that provides an ultra low active current. Ultra low active current is ideal for providing More Battery Life™ (MoBL®) in portable applications such as cellular telephones. The device also has an automatic power down feature that reduces power consumption by 99 percent when addresses are not toggling. Place the device into standby mode when deselected (CE1 HIGH or CE2 LOW or both BHE and BLE are HIGH).

Features

• Temperature Ranges
  • Industrial: –40°C to 85°C
  • Automotive-A: –40°C to 85°C
• Piand Functiocompatible with CY7C1019BV33
• High Speed
  • tAA = 10 ns
• CMOS for optimum Speed and Power
• Data Retentioat 2.0V
• Center Power/Ground Pinout
• Automatic Power Dowwhedeselected
• Easy Memory Expansiowith CE and OE Options
• Available iPb-free and noPb-free 48-Ball VFBGA, 32-PiTSOII and 400-mil SOJ Package
   

Functional Description

The CY7C1019CV33 is a high performance CMOS static RAM organized as 131,072 words by 8 bits. Easy memory expansiois provided by aactive LOW ChiEnable (CE), aactive LOW Output Enable (OE), and tristate drivers. This device has aautomatic power dowfeature that significantly reduces power consumptiowhedeselected.

Features

• High speed
  • tAA = 10 ns
• Low active power
  • 990 mW (max)
• Operating voltages of 3.3 ± 0.3V
• 2.0V data retention
• Automatic power down when deselected
• TTL compatible inputs and outputs
• Easy memory expansion with CE1 and CE2 features
• Available in Pb-free and non Pb-free 54-pin TSOP II package and non Pb-free 60-ball fine pitch ball grid array (FBGA) package

Functional Description

The CY7C1061AV33 is a high performance CMOS Static RAM organized as 1,048,576 words by 16 bits.

To write to the device, enable the chip (CE1 LOW and CE2 HIGH) while forcing the Write Enable (WE) input LOW. If Byte Low Enable (BLE) is LOW, then data from IO pins (IO0 through IO7), is written into the location specified on the address pins (A0 through A19).

Features

• High speed
  • t_AA = 10 ns
• Low active power
  • 990 mW (max.)
• Operating voltages of 3.3 ± 0.3V
• 2.0V data retention
• Automatic power down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE1 and CE2 features
• Available in Pb-free 54-pin thin small outline package (TSOP) II package

Functional Description

The CY7C1069AV33 is a high performance complementary metal oxide semiconductor (CMOS) static RAM organized as 2,097,152 words by 8 bits. Writing to the device is accomplished by enabling the chip (by taking CE1 LOW and CE2 HIGH) and Write Enable (WE) inputs LOW.

Features

• Pin- and function-compatible with CY7C1019CV33
• High speed
  • t_AA = 10 ns
• Low Active Power
  • I_CC = 60 mA @ 10 ns
• Low CMOS Standby Power
  • I_SB2 = 3 mA
• 2.0V Data retention
• Automatic power-down when deselected
• For more, see pdf
   

Functional Description

The CY7C1019DV33 is a high-performance CMOS static RAM organized as 131,072 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE), an active LOW Output Enable (OE), and three-state drivers. This device has an automatic power-down feature that significantly reduces power consumption when deselected.      More...

Features

• Very high speed: 45 ns
  • Wide voltage range: 2.20V–3.60V
• Pin compatible with CY62158DV30
• Ultra low standby power
  • Typical standby current: 2 μA
  • Maximum standby current: 8 μA
• Ultra low active power
  • Typical active current: 1.8 mA at f = 1 MHz
• Easy memory expansion with CE1, CE2, and OE features
• Automatic power down when deselected
• CMOS for optimum speed/power
• Offered in Pb-free 48-ball VFBGA, 44-pin TSOP II packages
   

Functional Description

The CY62158EV30 is a high performance CMOS static RAM organized as 1024K words by 8 bits. This device features advanced circuit design to provide ultra low active current. This  is ideal for providing More Battery Life™ (MoBL?) in portable applications such as cellular telephones. The device also has an automatic power down feature that significantly reduces power consumption.

Features

• Thin small outline package (TSOP) I package configurable as 512 K x 16 or 1 M x 8 static RAM (SRAM)
• High speed: 45 ns
• Temperature ranges
  • Industrial: –40°C to 85°C
  • Automotive-A: –40°C to 85°C
  • Automotive-E: –40°C to 125°C
• Wide voltage range: 2.20V to 3.60V
• Pin compatible with CY62157DV30
• Ultra low standby power
• For more, see pdf
   

Functional Description

The CY62157EV30 is a high performance CMOS static RAM organized as 512K words by 16 bits. This device features advanced circuit design to provide ultra low active current. This is ideal for providing More Battery Life? (MoBL®) in portable applications such as cellular telephones. The device also has an automatic power down feature that significantly reduces power consumption when addresses are not toggling.

Features

• Pin and function compatible with CY7C1049CV33
• High speed
  • tAA = 10 ns
• Low active power
  • ICC = 90 mA @ 10 ns (Industrial)
• Low CMOS standby power
  • ISB2 = 10 mA
• 2.0V data retention
• Automatic power down when deselected
• TTL compatible inputs and outputs
• Easy memory expansion with CE and OE features
• Available in Pb-free 36-pin (400 Mil) Molded SOJ and 44-pin TSOP II packages
   

Functional Description

The CY7C1049DV33 is a high performance CMOS Static RAM organized as 512K words by 8-bits. Easy memory expansion is provided by an Active LOW Chip Enable (CE), an Active LOW Output Enable (OE), and tri-state drivers. You can write to the device by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. Data on the eight IO pins (IO0 through IO7) is then written into the location specified on the address pins (A0 through A18).

Features

• Pin- and function-compatible with CY7C1049B
• High speed
  • tAA = 10 ns
• Low active power
  • ICC = 90 mA @ 10 ns
• Low CMOS Standby power
  • ISB2 = 10 mA
• 2.0V Data Retention
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE and OE features
• Available in lead-free 36-Lead (400-Mil) Molded SOJ package
   

Functional Description

The CY7C1049D is a high-performance CMOS static RAM organized as 512K words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE), an active LOW Output Enable (OE), and tri-state drivers. Writing to the device is  accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. Data on the eight I/O pins (I/O0 through I/O7) is then written into the location specified on the address pins (A0 through A18).

Features

• Temperature ranges
  • Industrial: –40 °C to 85 °C
  • Automotive-A  : –40 °C to 85 °C
  • Automotive-E  : –40 °C to 125 °C
• Pin and function compatible with CY7C1041CV33
• High speed
  • tAA = 10 ns
• Low active power
  • ICC = 90 mA at 10 ns (industrial)
• For more, see pdf
   

Functional Description

The CY7C1041DV33 is a high performance CMOS Static RAM organized as 256 K words by 16-bits. To write to the device, take chip enable (CE) and write enable (WE) inputs LOW. If byte low enable (BLE) is LOW, then data from I/O pins (I/O0 to I/O7) is written into the location specified on the address pins (A0 to A17). If byte high enable (BHE) is LOW, then data from I/O pins (I/O8 to I/O15) is written into the location specified on the address pins (A0 to A17).

Features

• Pin-and function-compatible with CY7C1041B
• High speed
  • tAA = 10 ns
• Low active power
  • ICC = 90 mA at 10 ns (Industrial)
• Low CMOS standby power
  • ISB2 = 10 mA
• 2.0 V Data Retention
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE and OE features
• Available in lead-free 44-Lead (400-Mil) Molded SOJ and 44-Pin TSOP II packages

Functional Description

The CY7C1041D is a high-performance CMOS static RAM organized as 256K words by 16 bits. Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is written into the location specified on the address pins (A0 through A17).

Features

• High speed
  • tAA = 10 ns
• Low active power
  • ICC = 110 mA at 10 ns
• Low CMOS standby power
  • ISB2 = 20 mA
• 2.0V data retention
• Automatic power down when deselected
• TTL-compatible inputs and outputs
• For more, see pdf

Functional Description

The CY7C1059DV33 is a high performance CMOS Static RAM organized as 1M words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE), an active LOW Output Enable (OE), and tri-state drivers. To write to the device, take Chip Enable (CE) and Write Enable (WE) inputs LOW. Data on the eight IO pins (IO0 through IO7) is then written into the location specified on the address pins (A0 through A19).

Features

• Temperature ranges
  • –40 °C to 85 °C
• High speed
  • t_AA = 10 ns
• Low active power
  • I_CC = 110 mA at 10 ns
• Low CMOS standby power
  • I_SB2 = 20 mA
• 2.0V data retention
• Automatic power down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE and OE features
• Available in Pb-free 48-ball fine ball grid array (FBGA) and 44-pin thin small outline package (TSOP) II packages

Functional Description

The CY7C1051DV33 is a high performance CMOS Static RAM organized as 512K words by 16 bits.

To write to the device, take Chip Enable (CE) and Write Enable (WE) inputs LOW. If Byte LOW Enable (BLE) is LOW, then data from IO pins (IO0–IO7), is written into the location specified on the address pins (A0–A18). If Byte HIGH Enable (BHE) is LOW, then data from IO pins (IO8–IO15) is written into the location specified on the address pins (A0–A18).

Features

• Temperature ranges
  • Commercial: 0°C to 70°C
• High speed
  • tAA = 8 ns
• Low active power
  • 360 mW (max)
• 2.0 V data retention
• Automatic power down when deselected
• Transistor-transistor logic (TTL) compatible inputs and outputs
• Easy memory expansion with CE and OE features

Functional Description

The CY7C1049CV33 is a high performance Complementary metal oxide semiconductor (CMOS) Static RAM organized as 524,288 words by eight bits. Easy memory expansion is provided by an active LOW Chip Enable (CE), an active LOW Output Enable (OE), and three-state drivers. Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. Data on the eight I/O pins (I/O₀ through I/O₇) is then written into the location specified on the address pins (A₀ through A₁₈).

Features

• Pin and function compatible with CY7C1010CV33
• High speed
  • tAA = 10 ns
• Low active power
  • ICC = 90 mA at 10 ns
• Low CMOS standby power
  • ISB2 = 10 mA
• 2.0V data retention
• Automatic power down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE and OE features
• Available in Pb-Free 36-pin SOJ and 44-pin TSOP II package

Functional Description

The CY7C1010DV33 is a high performance CMOS Static RAM organized as 256K words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE), an active LOW Output Enable (OE), and three-state drivers. Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. Data on the eight I/O pins (I/O0 through I/O7) is then written into the location specified on the address pins (A0 through A17).

Features

• High speed
  • 25 ns
• CMOS for optimum speed/power
• Low active power
  • 880 mW
• Low standby power
  • 220 mW
• TTL-compatible inputs and outputs
• Automatic power-down when deselected
   

Functional Description

The CY7C197N is a high-performance CMOS static RAM organized as 256K words by 1 bit. Easy memory expansion is provided by an active LOW Chip Enable (CE) and three-state drivers. The CY7C197N has an automatic power-down feature, reducing the power consumption by 75% when deselected.

Features

• Fast access time: 15 ns
• Wide voltage range: 5.0V ± 10% (4.5V to 5.5V)
• CMOS for optimum speed/power
• TTL-compatible inputs and outputs
• CY7C194BN is available in 24 DIP, 24 SOJ packages

General Description

The CY7C194BN is a high-performance CMOS Asynchronous SRAM organized as 64K × 4 bits that supports an asynchronous memory interface. The device features an automatic power-down feature that significantly reduces power consumption when deselected.

Features

• Pin- and function-compatible with CY7C1046CV33
• High speed
  • t_AA = 10 ns
• Low active power
  • I_CC = 90 mA @ 10 ns
• Low CMOS standby power
  • I_SB2 = 10 mA
• 2.0 V data retention
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE and OE features
• Available in lead-free 400-mil-wide 32-pin SOJ package

Functional Description

The CY7C1046DV33 is a high-performance CMOS static RAM organized as 1M words by 4 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE), an active LOW Output Enable (OE), and tri-state drivers. Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. Data on the four I/O pins (I/O0 through I/O3) is then written into the location specified on the address pins (A0 through A19).

Features

• 3.3V operation (3.0V–3.6V)
• High speed
  • t_AA = 10, 12, 15 ns
• CMOS for optimum speed/power
• Low Active Power (L version)
  • 576 mW (max.)
• Low CMOS Standby Power (L version)
  • 1.80 mW (max.)
• Automatic power-down when deselected
• Independent control of upper and lower bits
• Available in 44-pin TSOP II and 400-mil SOJ
• Available in a 48-Ball Mini BGA package
   

Functional Description

The CY7C1021BNV is a high-performance CMOS static RAM organized as 65,536 words by 16 bits. This device has an automatic power-down feature that significantly reduces power consumption when deselected.

Features

• High speed
  • tAA = 12 ns
• Low active power
  • 612 mW (max.)
• Low CMOS standby power
  • 1.8 mW (max.)
• 2.0V Data Retention (660 µW at 2.0V retention)
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE and OE features
   

Functional Description

The CY7C1041BNV33 is a high-performance CMOS Static RAM organized as 262,144 words by 16 bits.

Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is written into the location specified on the address pins (A0 through A17). If Byte High Enable (BHE) is LOW, then data from I/O pins (I/O8 through I/O15) is written into the location specified on the address pins (A0 through A17).

Features

• Temperature Ranges
  • Industrial: –40°C to 85°C
  • Automotive-A: –40°C to 85°C
• Single 3.3V power supply
• Ideal for low-voltage cache memory applications
• High speed: 12 ns
• Low active power
  • 180 mW (max.)
• Low-power alpha immune 6T cell
• Available in Pb-free and non Pb-free Plastic SOJ and TSOP I packages
   

Functional Description

The CY7C1399BN is a high-performance 3.3V CMOS Static RAM organized as 32,768 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE) and active LOW Output Enable (OE) and tristate drivers. The device has an automatic power-down feature, reducing the power consumption by more than 95% when deselected.

An active LOW Write Enable signal (WE) controls the writing/reading operation of the memory. When CE and WE inputs are both LOW, data on the eight data input/output pins (I/O0 through I/O7) is written into the memory location addressed by the address present on the address pins (A0 through A14).

Features

• High speed
  • 15 ns
• Fast t_DOE
• CMOS for optimum speed/power
• Low active power
  • 550 mW (max, 15 ns “L” version)
• Low standby power
• 0.275 mW (max, “L” version)
• 2V data retention (“L” version only)
• Easy memory expansion with CE and OE features
• TTL-compatible inputs and outputs
• Automatic power-down when deselected
   

Functional Description

The CY7C199N is a high-performance CMOS static RAM organized as 32,768 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE) and active LOW Output Enable (OE) and three-state drivers.

Features

• Pin- and function-compatible with CY7C1046B
• High speed
  • t_AA = 10 ns
• CMOS for optimum speed/power
• Low active power
  • I_CC = 90 mA @ 10 ns
• Low CMOS Standby Power
  • I_SB2 = 10 mA
• Data Retention at 2.0 V
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE and OE features
• Available in lead-free 400-mil-wide 32-pin SOJ package

Functional Description

The CY7C1046D is a high-performance CMOS static RAM organized as 1M words by 4 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE), an active LOW Output Enable (OE), and tri-state drivers. Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. Data on the four I/O pins (I/O0 through I/O3) is then written into the location specified on the address pins (A0 through A19).

Features

• High speed
  • t_AA = 8 ns
• Low active power
  • I_CC = 225 mA at 8 ns
• Low CMOS standby power
  • I_SB2 = 25 mA
• Operating voltages of 3.3 ± 0.3V
• 2.0V data retention
• Automatic power down when deselected
• TTL compatible inputs and outputs
• Available in Pb-free standard 119-Ball PBGA

Functional Description

The CY7C1012DV33 is a high performance CMOS static RAM organized as 512K words by 24 bits. Each data byte is separately controlled by the individual chip selects (CE₁, CE₂, and CE₃). CE₁ controls the data on the IO₀ - IO₇, while CE₂ controls the data on IO₈ - IO₁₅, and CE₃ controls the data on the data pins IO₁₆ - IO₂₃. This device has an automatic power down feature that significantly reduces power consumption when deselected.     

Features

• Fast access time: 15 ns and 20 ns
• Wide voltage range: 5.0V ± 10% (4.5V to 5.5V)
• complementary metal oxide semiconductor (CMOS) for optimum speed and power
• Transistor transistor logic (TTL) compatible inputs and outputs
• 2.0 V data retention
• Low CMOS standby power
• Automated power down when deselected
• Available in Pb-free 28-pin Thin Small Outline Package (TSOP)I, 28-pin Molded Small Outline J-Lead (SOJ) and 28-pin DIP packages

General Description

The CY7C199CN is a high performance CMOS Asynchronous SRAM organized as 32K by 8 bits that supports an asynchronous memory interface. The device features an automatic power down feature that reduces power consumption when deselected.

Features

• Pin- and function-compatible with CY7C1019B
• High speed
  • tAA = 10 ns
• Low active power
  • ICC = 80 mA @ 10 ns
• Low CMOS standby power
  • ISB2 = 3 mA
• 2.0 V Data retention
• Automatic power-down when deselected
• For more, see pdf

Functional Description

The CY7C1019D is a high-performance CMOS static RAM organized as 131,072 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE), an active LOW Output Enable (OE), and tri-state drivers. This device has an automatic power-down feature that significantly reduces power consumption when deselected.

Features

• Pin- and function-compatible with CY7C1018CV33
• High speed
  • tAA = 10 ns
• Low Active Power
  • ICC = 60 mA @ 10 ns
• Low CMOS Standby Power
  • ISB2 = 3 mA
• 2.0V Data retention
• Automatic power-down when deselected
• CMOS for optimum speed/power
• Center power/ground pinout
• Easy memory expansion with CE and OE options
• Available in Pb-free 32-pin 300-Mil wide Molded SOJ

Functional Description

The CY7C1018DV33 is a high-performance CMOS static RAM organized as 131,072 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE), an active LOW Output Enable (OE), and tri-state drivers. This device has an automatic power-down feature that significantly reduces power consumption when deselected.

Features

• Temperature Ranges
  • Industrial: –40°C to 85°C
  • Automotive-A: –40°C to 85°C
• Pin-and function-compatible with CY7C1021CV33
• High speed
  • t_AA = 10 ns
• Low active power
  • I_CC = 60 mA @ 10 ns
• For more, see pdf

Functional Description

The CY7C1021DV33 is a high-performance CMOS static RAM organized as 65,536 words by 16 bits. This device has an automatic power-down feature that significantly reduces power consumption when deselected.

Features

• Pin- and function-compatible with CY7C106B/CY7C1006B
• High speed
  • t_AA = 10 ns
• Low active power
  • I_CC = 80 mA @ 10 ns
• Low CMOS standby power
  • I_SB2 = 3.0 mA
• 2.0V Data Retention
• Automatic power-down when deselected
• For more, see pdf

Functional Description

The CY7C106D and CY7C1006D are high-performance CMOS static RAMs organized as 262,144 words by 4 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE), an active LOW Output Enable (OE), and tri-state drivers. These devices have an automatic power-down feature that reduces power consumption by more than 65% when the devices are deselected.

• High speed
• Low active power
• Low CMOS standby power
• 2.0 V data retention (400 µW at 2.0 V retention)
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE and OE features

Functional Description

The CY7C1049BN is a high-performance CMOS static RAM organized as 524,288 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE), an active LOW Output Enable (OE), and three-state drivers. Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. Data on the eight I/O pins (I/O0 through I/O7) is then written into the location specified on the address pins (A0 through A18).

Features

• High speed
  • 15 ns
• Fast tDOE
• Low active power
  • 715 mW
• Low standby power
  • 85 mW
• CMOS for optimum speed/power
• Easy memory expansion with CE1, CE2 and OE features
• TTL-compatible inputs and outputs
• Automatic power down when deselected
• Available in non Pb-free 28-pin (300-Mil) Molded SOJ, 28-pin (300-Mil) Molded SOIC and Pb-free 28-pin (300-Mil) Molded DIP

Functional Description

The CY7C185 is a high-performance CMOS static RAM organized as 8192 words by 8 bits. Easy memory expansion is provided by an active LOW chip enable (CE1), an active HIGH chip enable (CE2), and active LOW output enable (OE) and tri-state drivers. This device has an automatic power down feature (CE1 or CE2), reducing the power consumption by 70% when deselected. The CY7C185 is in a standard 300-mil-wide DIP, SOJ, or SOIC package.      More...

Features

• High speed
  • tAA = 10 ns
• Low active power
  • ICC = 175 mA at f = 100MHz
• Low CMOS standby power
  • ISB2 = 25 mA
• Operating voltages of 3.3 ± 0.3V
• 2.0V data retention
• Automatic power down when deselected
• Fore more, see pdf
   

Functional Description

The CY7C1024DV33 is a high performance CMOS static RAM organized as 128K words by 24 bits. This device has an automatic power down feature that significantly reduces power consumption when deselected.      More...

Features

• Temperature ranges
  • Commercial: 0 °C to 70 °C
  • Industrial: –40 °C to 85 °C
  • Automotive-A: –40 °C to 85 °C
  • Automotive-E: –40 °C to 125 °C
• High speed
  • tAA = 10 ns (Commercial)
  • tAA = 15 ns (Automotive)
• Complementary metal oxide semiconductor (CMOS) for optimum speed/power
• For more, see pdf
   

Functional Description

The CY7C1021BN/CY7C10211BN[1] is a high performance CMOS static RAM organized as 65,536 words by 16 bits. This device has an automatic power down feature that significantly reduces power consumption when deselected.

64K x 4 Static RAM with Separate IO

Features

• High speed
  • 15 ns
• CMOS for optimum speed/power
• Low active power
  • 860 mW
• Low standby power
  • 55 mW
• TTL-compatible inputs and outputs
• Automatic power down when deselected
• Available in Pb-free and non Pb-free 28-Pin Molded SOJ package

Functional Description

The CY7C192 is a high performance CMOS static RAM organized as 65,536 x 4 bits with separate IO. Easy memory expansion is provided by active LOW Chip Enable (CE) and tri-state drivers. It has an automatic power down feature that reduces power consumption by 75% when deselected.

Features

• Temperature ranges
  • Industrial: –40°C to 85°C
  • Automotive-E: –40°C to 125°C
• Pin and function compatible with CY7C199C
• High speed
  • tAA = 10 ns (Industrial)
• Low active power
  • ICC = 80 mA at 10 ns
• Low CMOS standby power
• For more, see pdf

Functional Description

The CY7C199D is a high performance CMOS static RAM organized as 32,768 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE), an active LOW Output Enable (OE) and tri-state drivers. This device has an automatic power down feature, reducing the power consumption when deselected.

Features

• High Speed
  • tAA = 12 ns
• Low Active Power
  • ICC = 250 mA at 12 ns
• Low CMOS Standby Power
  • ISB2 = 50 mA
• Operating Voltages of 3.3 ± 0.3 V
• 2.0 V Data Retention
• Automatic Power Down when Deselected
• TTL Compatible Inputs and Outputs
• Available in Pb-free 48-ball FBGA Package
   

Functional Description

The CY7C1079DV33 is a high performance CMOS Static RAM organized as 4,194,304 words by 8 bits.

To write to the device, take Chip Enable (CE [1]) and Write Enable (WE) input LOW. Data on the eight I/O pins (I/O0 through I/O7) is then written into the location specified on the address pins (A0 through A21). 

Features

• Pin- and function-compatible with CY7C109B/CY7C1009B
• High speed
  • tAA = 10 ns
• Low active power
  • ICC = 80 mA @ 10 ns
• Low CMOS standby power
  • ISB2 = 3 mA
• 2.0V Data Retention
• Automatic power-down when deselected
• For more, see pdf

Functional Description

The CY7C109D/CY7C1009D is a high-performance CMOS static RAM organized as 131,072 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE₁), an active HIGH Chip Enable (CE₂), an active LOW Output Enable (OE), and tri-state drivers.     

Features

• Temperature Ranges
  • Commercial: 0°C to +70°C
  • Industrial: -40°C to +85°C
  • Automotive-A: -40°C to +85°C
  • Automotive-E: -40°C to +125°C
• High Speed: 55 ns
• Voltage Range: 4.5V to 5.5V Operation
• Low Active Power
  • 275 mW (max)
• For more, see pdf
   

Functional Description

The CY62256N is a high performance CMOS static RAM organized as 32K words by 8 bits. Easy memory expansion is provided by an active LOW chip enable (CE) and active LOW output enable (OE) and tristate drivers. This device has an automatic power-down feature, reducing the power consumption by 99.9 percent when deselected.

Features

• High speed
  • tAA = 10 ns
• Low active power
  • ICC = 175 mA at 100 MHz
• Low CMOS standby power
  • ISB2 = 25 mA
• Operating voltages of 3.3 ± 0.3V
• 2.0V data retention
• Automatic power down when deselected
• For more, see pdf
   

Functional Description

The CY7C10612DV33 is a high performance CMOS Static RAM organized as 1,048,576 words by 16 bits. To write to the device, take Chip Enables (CE) and Write Enable (WE) input LOW. If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is written into the location specified on the address pins (A0 through A19). If Byte High Enable (BHE) is LOW, then data from I/O pins (I/O8 through I/O15) is written into the location specified on the address pins (A0 through A19).

Features

• High speed
  • tAA = 10 ns
• Low active power
  • ICC = 175 mA at 10 ns
• Low CMOS standby power
  • ISB2 = 25 mA
• Operating voltages of 3.3 ± 0.3V
• 2.0V data retention
• Automatic power down when deselected
• TTL compatible inputs and outputs
• Easy memory expansion with CE1, CE2, and CE3 features
• Available in Pb-free 119-ball PBGA package

Functional Description

The CY7C1062DV33 is a high performance CMOS Static RAM organized as 524,288 words by 32 bits.      More...

Features

• Very high speed: 45 ns
  • Industrial: –40°C to 85°C
  • Automotive-E: –40°C to 125°C
• Wide voltage range: 4.5V–5.5V
• Ultra low standby power
  • Typical standby current: 2 μA
  • Maximum standby current: 8 μA (Industrial)
• Ultra low active power
  • Typical active current: 1.8 mA at f = 1 MHz
• For more, see pdf
   

Functional Description

The CY62157E is a high performance CMOS static RAM organized as 512K words by 16 bits. This device features advanced circuit design to provide ultra low active current. This is ideal for providing More Battery Life™ (MoBL®) in portable applications such as cellular telephones. The device also has an automatic power down feature that significantly reduces power consumption when addresses are not toggling.

• High speed
  • 20 ns
• Automatic power-down when deselected
• Low active power
  • 935 mW
• Low standby power
  • 83 mW
• CMOS for optimum speed/power
• TTL-compatible inputs and outputs
• Easy memory expansion with CE₁, CE₂, and OE features
• Available in non Pb-free 32-Lead (300-Mil) Molded SOJ
   

Functional Description

Features

• High speed
  • tAA = 10 ns
• Low active power
  • ICC = 175 mA at 10 ns
• Low CMOS standby power
  • ISB2 = 25 mA
• Operating voltages of 3.3 ± 0.3V
• 2.0V data retention
• Automatic power down when deselected
• TTL compatible inputs and outputs
• Easy memory expansion with CE1 and CE2 features
• Available in Pb-free 54-Pin TSOP II and 48-Ball VFBGA packages

Functional Description

The CY7C1069DV33 is a high performance CMOS Static RAM organized as 2,097,152 words by 8 bits.

To write to the device, take Chip Enables (CE1 LOW and CE2 HIGH) and Write Enable (WE) input LOW. Data on the eight IO pins (IO0 through IO7) is then written into the location specified on the address pins (A0 through A20). 

Features

• Very high speed: 45 ns
• Wide voltage range: 2.20 V to 3.60 V
• Ultra low standby power
  • Typical standby current: 1.5 μA
  • Maximum standby current: 12 μA
• Ultra low active power
  • Typical active current: 2.2 mA at f = 1 MHz
• Easy memory expansion with CE1, CE2 and OE features
• Automatic power-down when deselected
• CMOS for optimum speed/power
• Offered in Pb-free 48-ball FBGA package.
   

Functional Description

The CY62168EV30 is a high performance CMOS static RAM organized as 2 M words by 8-bits. This device features advanced circuit design to provide an ultra low active current. This is ideal for providing More Battery Life™ (MoBL®) in portable applications such as cellular telephones. The device also has an automatic power-down feature that significantly reduces power consumption by 90% when addresses are not toggling.

Features

• High speed
  • tAA = 10 ns
• Low active power
  • ICC = 175 mA at 100 MHz
• Low CMOS standby power
  • ISB2 = 25 mA
• Operating voltages of 3.3 ± 0.3 V
• 2.0 V data retention
• Automatic power down when deselected
• TTL compatible inputs and outputs
• Easy memory expansion with CE1 and CE2 features
• Available in Pb-free 54-pin TSOP II and 48-ball VFBGA packages
• Offered in single CE and dual CE options

Functional Description

The CY7C1061DV33 is a high performance CMOS Static RAM organized as 1,048,576 words by 16 bits.

To write to the device, take Chip Enables (CE1 LOW and CE2 HIGH) and Write Enable (WE) input LOW. If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is written into the location specified on the address pins (A0 through A19). If Byte High Enable (BHE) is LOW, then data from I/O pins (I/O8 through I/O15) is written into the location specified on the address pins (A0 through A19).

Features

• Very high speed
  • 55 ns
• Wide voltage range
  • 2.2V – 3.6V
• Ultra-low active power
  • Typical active current: 2 mA @ f = 1 MHz
  • Typical active current: 15 mA @ f = fMax (55 ns Speed)
• Ultra-low standby power
• Easy memory expansion with CE1, CE2 and OE features
• Automatic power-down when deselected
• Complementary metal oxide semiconductor(CMOS) for optimum speed/power
• Available in non Pb-free 48-ball (VFBGA) package
   

Functional Description

The CY62168DV30 is a high-performance CMOS static RAMs organized as 2048Kbit words by 8 bits. This device features advanced circuit design to provide ultra-low active current. This is ideal for providing More Battery Life™ (MoBL®) in portable applications such as cellular telephones.

Features

• Pin- and function-compatible with CY7C107B/CY7C1007B
• High speed
  • tAA = 10 ns
• Low active power
  • ICC = 80 mA @ 10 ns
• Low complementary metal oxide semiconductor (CMOS) standby power
  • ISB2 = 3 mA
• 2.0 V data retention
• Automatic power-down when deselected
• CMOS for optimum speed/power
• Transistor transistor logic (TTL) compatible inputs and outputs
• CY7C107D available in Pb-free 28-pin 400-Mil wide Molded SOJ package. CY7C1007D available in Pb-free 28-pin 300-Mil wide Molded SOJ package
   

Functional Description

The CY7C107D and CY7C1007D are high-performance CMOS static RAMs organized as 1,048,576 words by 1 bit. Easy memory expansion is provided by an active LOW Chip Enable (CE) and tri-state drivers. These devices have an automatic power-down feature that reduces power consumption by more than 65% when deselected.

Features

• Thin small outline package(TSOP I )Configurable as 1M x 16 or as 2M x 8 SRAM
• Wide voltage range: 2.2V – 3.6V
• Ultra-low active power: Typical active current: 2 mA at f = 1 MHz
• Ultra-low standby power
• Easy memory expansion with CE1, CE2 and OE features
• Automatic power-down when deselected
• CMOS for optimum speed/power
• Available in Pb-free and non Pb-free 48-ball VFBGA and 48-pin TSOP I package
   

Functional Description

The CY62167DV30 is a high-performance CMOS static RAM organized as 1M words by 16 bits. This device features advanced circuit design to provide ultra-low active current. This is ideal for providing More Battery Life™ (MoBL®) in portable applications such as cellular telephones. The device also has an automatic power-down feature that significantly reduces power consumption by 99% when addresses are not toggling.

• Very high speed:45ns
• Temperature range
  • Industrial:–40°Cto+85°C
• Wide voltage range:2.20Vto3.60V
• Ultra low standby power
  • Typical standby current:1μA
  • Maximum standby current:7μA(Industrial)
• Ultra low activepower
  • Typical active current:2mAatf=1MHz
• For more, see pdf

The CY621472EV30 is a high performance CMOS static RAM (SRAM) organized as 256K words by 16 bits. This device features advanced circuit design to provide ultra low active current. It is ideal for providing More Battery Life™ (MoBL®) in portable applications such as cellular telephones.

Features

• Configurable as 1 M × 16 or as 2 M × 8 SRAM
• Very high speed: 45 ns
• Wide voltage range: 4.5 V to 5.5 V
• Ultra low standby power
  • Typical standby current: 1.5 μA
  • Maximum standby current: 12 μA
• Ultra low active power
  • Typical active current: 2.2 mA at f = 1 MHz
• Easy memory expansion with CE1, CE2, and OE features
• Automatic power-down when deselected
• CMOS for optimum speed and power
• Offered in 48-pin TSOP I package
   

Functional Description

The CY62167E is a high performance CMOS static RAM organized as 1 M words by 16-bits/2 M words by 8-bits. This device features advanced circuit design to provide an ultra low active current. This is ideal for providing More Battery Life™ (MoBL®) in portable applications such as cellular telephones. The device also has an automatic power down feature that reduces power consumption by 99% when addresses are not toggling.

Features

• Very high speed: 55 ns
• Wide voltage range: 1.65V–2.25V
• Pin Compatible with CY62157DV18 and CY62157DV20
• Ultra low standby power
  • Typical Standby current: 2 μA
  • Maximum Standby current: 8 μA
• Ultra low active power
  • Typical active current: 1.8 mA at f = 1 MHz
• Easy memory expansion with CE1, CE2 and OE features
• Automatic power down when deselected
• CMOS for optimum speed and power
• Available in Pb-free 48-ball VFBGA package
   

Functional Description

The CY62157EV18 is a high performance CMOS static RAM organized as 512K words by 16 bits. This device features advanced circuit design to provide ultra low active current. This is ideal for providing More Battery Life™ (MoBL®) in portable applications such as cellular telephones. The device also has an automatic power down feature that significantly reduces power consumption when addresses are not toggling.

Features

• Very high speed: 45 ns
• Temperature ranges
  • Industrial: –40 °C to 85 °C
  • Automotive-A: –40 °C to 85 °C
  • Automotive-E: –40 °C to 125 °C
• Wide voltage range: 2.20 V to 3.60 V
• Pin compatible with CY62136V, CY62136CV30/CV33, and CY62136EV30
• Ultra low standby power
  • Typical standby current: 1 μA
• For more, see pdf
   

Functional Description

The CY62136FV30 is a high performance CMOS static RAM organized as 128K words by 16 bits. This device features advanced circuit design to provide ultra low active current. This is ideal for providing More Battery Life™ (MoBL®) in portable applications such as cellular telephones. The device also has an automatic power down feature that significantly reduces power consumption by 90 percent when addresses are not toggling.

Features

• Temperature Ranges
  • Commercial: 0°C to 70°C
  • Industrial: –40°C to 85°C
  • Automotive-A: –40°C to 85°C
• High speed
  • t_AA = 15 ns
• Low active power
  • 1540 mW (max.)
• Low CMOS standby power (L version)
• For more, see pdf
   

Functional Description

The CY7C1041BN is a high-performance CMOS static RAM organized as 262,144 words by 16 bits.

Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O₀ through I/O₇), is written into the location specified on the address pins (A₀ through A₁₇).

Features

• Temperature Ranges
  • Commercial: 0°C to 70°C
  • Industrial: –40°C to 85°C
  • Automotive-A: –40°C to 85°C
  • Automotive-E: –40°C to 125°C
• Speed: 70 ns
• Low Voltage Range: 2.7V to 3.6V
• Low Active Power and Standby Power
• Easy Memory Expansion with CE and OE Features
• For more, see pdf
   

Functional Description

The CY62256VN family is composed of two high performance CMOS static RAM’s organized as 32K words by 8 bits. Easy memory expansion is provided by an active LOW chip enable (CE) and active LOW output enable (OE) and tristate drivers. These devices have an automatic power down feature, reducing the power consumption by over 99% when deselected.

Features

• Very high speed: 45 ns
• Wide voltage range: 2.2 V to 3.6 V and 4.5 V to 5.5 V
• Ultra low standby power
  • Typical standby current: 1 μA
  • Maximum standby current: 4 μA
• Ultra low active power
  • Typical active current: 1.3 mA at f = 1 MHz
• Easy memory expansion with CE, and OE features
• Automatic power down when deselected
• Complementary metal oxide semiconductor (CMOS) for optimum speed and power
• Available in Pb-free 44-Pin thin small outline package (TSOP) II package
   

Functional Description

The CY62126ESL is a high performance CMOS static RAM organized as 64K words by 16 bits. This device features advanced circuit design to provide ultra low active current. This is ideal for providing More Battery Life™ (MoBL®) in portable applications such as cellular telephones. The device also has an automatic power down feature that significantly reduces power consumption when addresses are not toggling.

• Automatic power-down when deselected
• Complementary metal oxide semiconductor (CMOS) for optimum speed/power
• High speed
  • t_AA = 20 ns
• Low active power
  • 495 mW
• Low standby power
  • 110 mW
• TTL-compatible inputs and outputs
• V_IH of 2.2V
• Capable of withstanding greater than 2001V electrostatic discharge
   

Functional Description

The CY7C168A is a high-performance CMOS static RAM organized as 4096 by 4-bits. Easy memory expansion is provided by an active LOW chip enable (CE) and three-state drivers. The CY7C168A has an automatic power-down feature, reducing the power consumption by 77% when deselected.

Features

• High speed
  • t_AA = 8 ns
• Low active power
  • 1080 mW (max.)
• Operating voltages of 3.3 ± 0.3V
• 2.0V data retention
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE0, CE1 and CE2 features
• Available in non Pb-free 119 ball PBGA.
   

Functional Description

The CY7C1012AV33 is a high-performance CMOS static RAM organized as 512K words by 24 bits. Each data byte is separately controlled by the individual chip selects (CE0, CE1, CE2). CE0 controls the data on the I/O0–I/O7, while CE1 controls the data on I/O8–I/O15, and CE2 controls the data on the data pins I/O16–I/O23. This device has an automatic power-down feature that significantly reduces power consumption when deselected.

Features

• Very high speed: 45 ns
• Temperature ranges
  • Industrial: –40°C to 85°C
  • Automotive-A: –40°C to 85°C
  • Automotive-E: –40°C to 125°C
• Voltage range: 4.5V to 5.5V
• Pin compatible with CY62128B
• Ultra low standby power
  • Typical standby current: 1 μA
• For more, see pdf

Functional Description

The CY62128E is a high performance CMOS static RAM organized as 128K words by 8 bits. This device features advanced circuit design to provide ultra low active current. This is ideal for providing More Battery Life™ (MoBL®) in portable applications such as cellular telephones.

Features

• Temperature Range
  • Automotive: –40°C to 125°C
• High speed
  • t_AA = 15 ns
• Optimized voltage range: 2.5V – 2.7V
• Low active power: 220 mW (Max.)
• Automatic power-down when deselected
• Independent control of upper and lower bits
• CMOS for optimum speed/power
• Available in Pb-free and non Pb-free 44-pin TSOP II , 44-pin (400-Mil) Molded SOJ and Pb-free 48-ball FPBGA packages
   

Functional Description

The CY7C1021CV26 is a high-performance CMOS static RAM organized as 65,536 words by 16 bits. This device has an automatic power-down feature that significantly reduces power consumption when deselected.

Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O1 through I/O8), is written into the location specified on the address pins (A0 through A15). If Byte High Enable (BHE) is LOW, then data from I/O pins (I/O9 through I/O16) is written into the location specified on the address pins (A0 through A15).

• Temperature Ranges
  • Industrial: –40°C to 85°C
  • Automotive-A: –40°C to 85°C
• Very high speed: 55 ns
  • Wide voltage range: 2.20V – 3.60V
• Pin-compatible with CY62148CV25, CY62148CV30 and CY62148CV33
• Ultra low active power
  • Typical active current: 1.5 mA @ f = 1 MHz
  • Typical active current: 8 mA @ f = fmax(55-ns speed)
• For more, see pdf

Functional Description

The CY62148DV30 is a high-performance CMOS static RAM organized as 512K words by 8 bits. This device features advanced circuit design to provide ultra-low active current. This is ideal for providing More Battery Life™ (MoBL®) in portable applications such as cellular telephones.