Features

• XRES pin to support in-system serial programming (ISSP) and external reset control in CY8C24894
• Powerful Harvard-architecture processor
• Advanced peripherals (PSoC® Blocks)
• Full speed USB (12 Mbps)
• Flexible on-chip memory
• Programmable pin configurations
• Precision, programmable clocking
• Additional system resources
• For more, see pdf

PSoC Functional Overview

The PSoC family consists of many devices with on-chip controllers. These devices are designed to replace multiple traditional MCU-based system components with one low-cost single-chip programmable component. A PSoC device includes configurable blocks of analog and digital logic, and programmable interconnect. This architecture makes it possible for you to create customized peripheral configurations, to match the requirements of each individual application.

PSoC Programmer 3.18 offers the user a simple GUI that connects to programming hardware to program and configure PSoC, Clock, and configurable fixed function devices. Also provided with PSoC Programmer is the Bridge Control Panel, which can be used to debug, graph and log I2C serial communications using various supported Cypress Software. PSoC Programmer also provides a hardware layer for customers to design custom applications or use existing code examples for testing hardware and Firmware designs.

PSoC Programmer 3.18 release shall support both PSoC Creator and PSoC Designer in a single installation.

PSoC Programmer 3.18 is a minor release. For additional information regarding the installation and the new features please see the release notes in the downloads table below.

PSoC Programmer:

PSoC Programmer is a flexible, integrated programming application for programming PSoC devices. PSoC Programmer can be used with PSoC Designer and PSoC Creator to program any design onto a PSoC device. PSoC Programmer supports all PSoC 1, PSoC 3 and PSoC 5LP devices.

Supported PC Operating Systems:

PSoC Programmer currently supports the following windows operating systems:

• Windows XP (32/64 bit)
• Windows Vista (32/64 bit)
• Windows 7 (32/64 bit)

PSoC Programmer does not support installations on Windows 8 machines. We will be adding Windows 8 support by August of 2013.

COM Hardware Layer Supported Languages:

PSoC Programmer provides the user a hardware layer with API’s to design specific applications utilizing the programmers and bridge devices. The PSoC Programmer hardware layer is fully detailed in the COM guide documentation as well as example code across the following languages: C#, C, Perl, and Python.

PSoC Programmer Secondary Software

PSoC Programmer includes additional software beyond just PSoC Programmer. For more information on that additional software please: Click Here

Third Party IDE and Programming Support

PSoC Programmer delivers a number of files and utilities that enable 3^rd party programming and debugging support for PSoC device families. In the downloads table below we include the 3^rd party user guide which will assists the user in configuring and enabling the support in the IDEs or programming utilities. The files and applications can be found in the root installation directory for each programmer installation.

Archived Software:

PSoC Programmer software is archived at the following page: Click Here

Additional Programming Links:
Prototype Programming Hardware:

PSoC Programmer is part of a suite of programming options and programming content available to PSoC users. For customers who are looking for more information on general programming options and information please navigate to the web page linked below. On the General Programming web page we discuss all of the available programming options for customers including Software, Schematics, Programming Specifications, and 3rd party mass programming.

www.cypress.com/go/programming

All PDF documents require at least a PDF reader installed prior to opening.

• Full byte-oriented EEPROM emulation
• Abstracts block-oriented Flash architecture
• Efficient use of memory

This code example incorporates CapSense Sigma Delta (CSD) and I2CHW modules to send the CapSense data to the I2C master. The CapSense module scans all the buttons continuously and stores the raw count, difference count, and baseline details in a structure defined by MyI2CRegs.

Cypress’s PSoC microcontrollers are easy-to-use, flexible, and have a cost-effective mix of reprogrammable analog and digital resources. These features provide many  opportunities for creative designs, one of which is programming the PSoC serially by an on-board host processor. This method is used to install or update firmware in-field or even completely reprogram the PSoC for a different function.

This document helps you to select the proper tool for CapSense sensor data viewing and logging. The two supported communication interfaces are I2C and UART. You should be familiar with CapSense sensing technology before you read this document.

This reference manual provides the information developers and programmer vendors need to create their own in-system programming solutions for CY8C20045, CY8C20055, CY8C20xx6A, and CY8C20xx7 devices. The following topics are covered in this document:

• Information on how to interface a host programmer with CY8C20045, CY8C20055, CY8C20xx6A, and CY8C20xx7 devices
• Description of the ISSP protocol
• AC/DC programming specifications
• Programming vectors
• Introduction to the Intel hex file format

This document is a technical reference manual for all PSoCs with a base part number of CY8C2xxxx, except for the CY8C25122 and CY8C26xxx PSoC devices. It also applies to CY7C64215, CY7C603xx,CY8CNP1xx, and CYWUSB6953.

• 16-bit general purpose pulse width modulator (PWM) with 8-bit dead band generator, two or three PSoC blocks, respectively
• Phase1 and Phase2 underlapped outputs track the frequency of the generated PWM signal
• Programmable duty cycle
• Programmable dead time
• Dead Band Kill input drives Phase1 and Phase2 outputs low
• Counter clocking up to 48 MHz
• Interrupt option triggered on rising edge of the PWM generated signal or counter terminal count

The 16-bit PWMDB User Module is a pulse width modulator combined with an 8-bit dead band generator.The pulse width modulator provides a programmable period and pulse width input signal to the dead band generator. The dead band generator outputs two under-lapped signals, with programmable dead time at the same frequency as the input signal. When asserted, the Dead Band Kill input drives the Phase1 and Phase2 output signals low.  The clock and enable signals can be selected from several sources. The Phase1 and Phase2 output signals can be routed to the external pin ports or to the global output buses for internal use by other user modules. An interrupt can be programmed to effectively trigger on both edges of the pulse width modulator output.

• Output is digital inverted input
• Requires only one digital block
• Can be used to generate an interrupt on the falling edge of the input

The DigInv User Module is a simple digital inverter. The output is a logical NOT of the input signal.

• Two Digital Buffers
• Input1 can be inverted
• Can be used to generate an interrupt on the rising edge of Output1

• Industry standard Philips I2C bus compatible interface
• Master and Slave operation, Multi Master capable
• Only two pins (SDA and SCL) required to interface to I2C bus
• Standard data rate of 100/400 kbps, also supports 50 kbps
• High level API requires minimal user programming
• 7-bit addressing mode
   

The I2C Hardware User Module implements an I2C device in firmware. The I2C bus is an industry standard, two-wire hardware interface developed by Philips®. The master initiates all communication on the I2C bus and supplies the clock for all slave devices. The I2CHW User Module supports the standard mode with speeds up to 400 kbps. No digital or analog user blocks are consumed with this module. The I2CHW User Module is compatible with other slave devices on the same bus.

Features and Overview

• The 32-bit general purpose counter uses four PSoC blocks
• Source clock rates up to 48 MHz
• Automatic reload of period on terminal count
• Programmable pulse width
• Input enables/disables continuous counter operation
• Interrupt option on compare output or terminal count
   

The 32-bit Counter User Module provides a down counter with a programmable period and pulse width. The clock and enable signals can be selected from any system time base or external source. Once started, the counter operates continuously and reloads its internal value from the period register upon reaching terminal count. During each clock cycle, the counter compares the current count to the value stored in the compare register. Each clock cycle, the Counter tests the count against the value of the compare register for either a “less than" or “less than or equal to" condition. The comparator output provides a logic level that may be routed to pins and to other user modules.

Features and Overview

• The 24-bit general purpose counter uses three PSoC blocks
• Source clock rates up to 48 MHz
• Automatic reload of period on terminal count
• Programmable pulse width
• Input enables/disables continuous counter operation
• Interrupt option on compare output or terminal count
   

The 24-bit Counter User Module provides a down counter with a programmable period and pulse width. The clock and enable signals can be selected from any system time base or external source. Once started, the counter operates continuously and reloads its internal value from the period register upon reaching terminal count. During each clock cycle, the counter compares the current count to the value stored in the compare register. Each clock cycle, the Counter tests the count against the value of the compare register for either a “less than" or “less than or equal to" condition. The comparator output provides a logic level that may be routed to pins and to other user modules.

• 8-bit general purpose timer uses one PSoC block
• Source clock rates up to 48 MHz
• Automatic reload of period on terminal count
• Capture for clocks up to 24 MHz
• Terminal count output pulse may be used as input clock for other analog and digital functions
• Interrupt option on terminal count, capture (on some devices), or when counter reaches a preset value
   

The 8-Bit Timer User Modules provides a down counter with programmable period and capture ability. The clock and enable signals can be selected from any system time base or external source. Once started, the timer operates continuously and reloads its internal value from the period register upon reaching terminal count. The output pulses high in the clock cycle following terminal count. Events can capture the current Timer count value by asserting the edge-sensitive capture input signal. Each clock cycle, the Timer tests the count against the value of the compare register for either a “Less Than" or “Less Than or Equal To" condition. Interrupts may be generated based on terminal count and compare signals. Some device families offer two additional features. The interrupt options include “interrupt on capture" and, in addition, the compare signal may be routed onto the row buses. If these options are available on your chosen device they will be shown in the Device Editor.

• 32-bit general purpose timer uses four PSoC blocks
• Source clock rates up to 48 MHz
• Automatic reload of period on terminal count
• Capture for clocks up to 24 MHz.
• Terminal count output pulse may be used as input clock for other analog and digital functions
• Interrupt option on terminal count, capture (on some devices), or when counter reaches a preset value
   

The 32-bit Timer User Module provides a down counter with programmable period and capture ability. The clock and enable signals can be selected from any system time base or external source. Once started, the timer operates continuously and reloads its internal value from the period register upon reaching terminal count. The output pulses high in the clock cycle following terminal count. Events can capture the current Timer count value by asserting the edge-sensitive capture input signal. Each clock cycle, the Timer tests the count against the value of the compare register for either a “Less Than" or “Less Than or Equal To" condition. Interrupts may be generated based on terminal count and compare signals. Some device families offer two additional features. The interrupt options include “interrupt on capture" and, in addition, the compare signal may be routed onto the row buses. If these options are available on your chosen device they will be shown in the Device Editor.  

• 24-bit general purpose timer three PSoC blocks
• Source clock rates up to 48 MHz
• Automatic reload of period on terminal count
• Capture for clocks up to 24 MHz
• Terminal count output pulse may be used as input clock for other analog and digital functions
• Interrupt option on terminal count, capture (on some devices), or when counter reaches a preset value
   

The 24-bit Timer User Module provides a down counter with programmable period and capture ability. The clock and enable signals can be selected from any system time base or external source. Once started, the timer operates continuously and reloads its internal value from the period register upon reaching terminal count. The output pulses high in the clock cycle following terminal count. Events can capture the current Timer count value by asserting the edge-sensitive capture input signal. Each clock cycle, the Timer tests the count against the value of the compare register for either a “Less Than" or “Less Than or Equal To" condition. Interrupts may be generated based on terminal count and compare signals. Some device families offer two additional features. The interrupt options include “interrupt on capture" and, in addition, the compare signal may be routed onto the row buses. If these options are available on your chosen device they will be shown in the Device Editor.

• Supports 1 to 8 Digits
• Any combination of individual displays up to 8 total digits
• Display both hex and integer values
• Supports decimal points built into 7-Segment display
• Supports both common cathode and common anode displays
• Configurable for both active high and active low segment and digit drives
   

The LED7SEG User Module is capable of multiplexing up to eight 7-segment displays. This user module is compatible with common cathode, common anode, or any drive polarity. This allows a wide range of flexibility with various displays. Digits and segments may be driven directly by PSoC pins without the use of transistors or drivers as long as the current sinking and sourcing limits of the PSoC pins are not exceeded.

• Support for both Active High and Active Low circuits
• Works with system shadow registers
• Functions (Switch, Invert, and GetState )

The LED User Module is just a couple simple functions to control an LED or any simple device that is controlled by on and off.

• Uses the industry standard Hitachi HD44780 LCD display driver chip protocol
• Requires only seven I/O pins
• Routines provided to print RAM or ROM strings
• Routines provided to print numbers
• Routines provided to display horizontal and vertical bar graphs
• Uses a single I/O port
   

The Character LCD User Module is a set of library routines that writes text strings and formatted numbers to a common two or four-line LCD module. Vertical and horizontal bar graphs are supported, using the character graphics feature of these LCD modules. This module was developed specifically for the industry standard Hitachi HD44780 two-line by 16 character LCD display driver chip, but works for many other fourline displays. This library uses the 4-bit interface mode to limit the number of I/O pins required.
 

Features and Overview

• Industry standard Philips I2C bus compatible interface
• Only two pins (SDA and SCL) required to interface several slave I2C devices
• Standard mode data supports rate of 100 kbps
• High level API requires minimal user programming
• Low level API provided for flexibility

The I2Cm User Module implements a master I2C device in firmware. The I2C bus is an industry standard,  two-wire interface developed by Philips®. An I2C bus master may communicate with several slave devices  using only two wires. The master initiates all communication on the I2C bus and supplies the clock for all slave devices. The I2Cm User Module supports speeds up to 100 kbps. No digital or analog user blocks  are consumed with this module. 

• Powerful Harvard-architecture processor
• Advanced peripherals (PSoC® blocks)
• Flexible on-chip memory
• Complete development tools
• Precision, programmable clocking
• Programmable pin configurations
• Versatile analog mux
• Additional system resources
• For more, see pdf

The PSoC family consists of many devices with on-chip controllers. These devices are designed to replace multiple traditional MCU-based system components with one low-cost single-chip programmable component. A PSoC device includes configurable blocks of analog and digital logic, and programmable interconnect. This architecture makes it possible for you to create customized peripheral configurations, to match the requirements of each individual application. Additionally, a fast central processing unit (CPU), flash program memory, SRAM data memory, and configurable I/O are included in a range of convenient pinouts.

Features

• Advanced CapSense block with SmartSense Auto-Tuning
• Driven shield
• Powerful Harvard-architecture processor
• Advanced peripherals (PSoC® blocks)
• Flexible on-chip memory
• Complete development tools
• Precision, programmable clocking
• Programmable pin configurations
• Versatile analog mux
• For more, see pdf.
   

PSoC Functional Overview

The PSoC family consists of many devices with on-chip controllers. These devices are designed to replace multiple traditional MCU-based system components with one low-cost single-chip programmable component. A PSoC device includes configurable blocks of analog and digital logic, and programmable interconnect.

PSoC Designer 5.0 SP6 will continue to be available for System Level Design users, and it will co-exist with future PSoC Designer 5.1 releases. However, we are not recommending System Level Design for production designs.

We suggest users to use the latest version of PSoC Designer located here:

www.cypress.com/go/psocdesigner

PSoC Designer 5.0 SP6 supports Internet Explorer 6 through 8, but does not support Internet Explorer 8 Beta or Internet Explorer 9 due to compatibility issues.

To Install PSoC Designer 5.0 SP6 users must first have PSoC Programmer installed first. For the latest release of PSoC Programmer please, Click Here

PSoC Designer 5.0 PS6 was tested using Beta version of Windows 7. PSoC Designer 5.0 SP6 is not supported for Windows 7 systems.

To Install:

Shut Down any currently running instances of PSoC Designer.

If an earlier service pack of PSoC Designer 5.0 is currently installed, uninstall it. To do this please navigate to Start>Control Panel>Add or Remove Programs.

• Install latest PSoC Programmer.
• Install PSoC Designer 5.0 SP6 by running the installed in the downloads table below.”

Note to HI-TECH Compiler Users:

There are new devices in this release. To compile projects containing these devices with the HI-TECH compiler, you must manually update the psoc.ini file. The HI-TECH psoc.ini file is found in the HI-TECH installation folder. The default location of the psoc.ini is here:

C:\Program Files\HI-TECH Software\HCPSOC\PRO\9.61\dat\psoc.ini

The default location of the replacement psoc.ini file that adds support for the new devices is here:

C:\Program Files\Cypress\Common\CypressSemiBuildMgr\tools\psoc.ini

PSoC Programmer: The latest version of PSoC Programmer must be installed along with PSoC Designer. For the latest release please navigate to the PSoC Programmer web page: Click Here

PSoC Designer: User Guides - Click Here

PSoC Designer Archive - Click Here

• QuietZone™ Controller
• Low power CapSense® block with SmartSense™ auto-tuning
• Driven shield available on five GPIO pins
• Powerful Harvard-architecture processor
• Flexible on-chip memory
• Four clock sources
• Programmable pin configurations
• Versatile analog mux
• Additional system resources
• Complete development tools
• Sensor and Package options
• For more, see pdf

PSoC® Functional Overview

The PSoC family consists of many devices with on-chip controllers. These devices are designed to replace multiple traditional MCU-based system components with one low-cost single-chip programmable component. A PSoC device includes configurable blocks of analog and digital logic, and programmable interconnect. This architecture makes it possible for you to create customized peripheral configurations, to match the requirements of each individual application. Additionally, a fast central processing unit (CPU), flash program memory, SRAM data memory, and configurable I/O are included in a range of convenient pinouts.

Counts are calculated using Equation 1.

Where:

Sensitivity is calculated using Equation 2.

The upper limit of the capacitance measurement range is calculated using Equation 3.

For example, given the following User Module settings:

Sensitivity = 184.3 Counts/pF

Capacitance measurement range (upper limit) = 88.9 pF

Note: The “sensitivity” calculated above is the capacitive measurement module sensitivity, not the system sensitivity to button/sensor activation.

Note: It is not possible to measure capacitance values all the way down to zero because there will always be some parasitic capacitance, C_P, and pin capacitance measured by the sensor.

Where:

For example, given the following User Module settings:

Resolution = 0.00543 pF

Note: Although the calculation indicates that a change as small as 0.00543 pF can be detected, raw-count noise limits the use of such high resolution. CapSense is not recommended for measuring absolute capacitances.

Note: The “sensitivity” calculated above is the capacitive measurement module sensitivity, not the system sensitivity to button/sensor activation.

The defect will be fixed in the future versions of PSoC Designer but for the current version the following workaround can be used:

1. Download the attached “SmartSense.asm”.
2. Copy this file (and replace the old SmartSense.asm) to the following folder:
   C:\Program Files\Cypress\PSoC Designer\5.2\Common\CypressSemiDeviceEditor\Data\Stdum\SmartSense\Ver_1_30\CY8C21034

It should be noted that the configuration wizard will still show the R_b connection to P1[1]. But the hardware connection for R_b gets modified when the API SmartSense_Start() is called in “main.c” of the project. This workaround modifies ACE00CR2, ACE00CR1, ALT_CR0, CMP_GO_EN, PRT1DM0, PRT1DM1, and PRT1DM2 registers in the SmartSense_Start() API. The details of these registers can be found in the Technical Reference Manual (TRM) for CY8C21x34.

• Nominal 10-bit resolution
• Selectable resolution from 2-bit to 12-bit
• Input range 0 to Vdd-1
• Allows a coarse temperature measurement: range of -40°C to +125°; accuracy of ± 40°C with resolution ± 2°C
   

The ADC10 User Module implements a Single Slope A/D Converter that generates up to a 12-bit, full scale output (0 to 4095 count range). Although capable of generating a 12-bit output, it has only 10 effective bits of resolution. Further resolution is achieved by averaging multiple samples.

Features

• 1.71-V to 5.5-V operating range
• Low power CapSense® block
• Powerful Harvard-architecture processor
• Flexible on-chip memory
• Precision, programmable clocking
• Programmable pin configurations
• Integrates Immersion TS2000 Haptics technology for ERM drive control
• Versatile analog mux
• Additional system resources
• Complete development tools
• Package options
• For more, see pdf

PSoC® Functional Overview

The PSoC family consists of on-chip controller devices, which are designed to replace multiple traditional microcontroller unit (MCU)-based components with one, low-cost single-chip programmable component. A PSoC device includes configurable analog and digital blocks, and programmable interconnect. This architecture allows the user to create customized peripheral configurations, to match the requirements of each individual application. Additionally, a fast CPU, flash program memory, SRAM data memory, and configurable I/O are included in a range of convenient pinouts.

• Supports Serial Peripheral Interconnect (SPI) Slave protocol
• Supports protocol modes 0, 1, 2, and 3
• Selectable input sources for MOSI, SCLK, and ~SS
• Selectable output routing for MISO
• Programmable interrupt on SPI done condition
• SS may be firmware controlled

The SPIS User Module is a Serial Peripheral Interconnect Slave. It performs full duplex synchronous 8-bit data transfers. SCLK phase, SCLK polarity, and LSB First can be specified to accommodate most SPI protocols. The SPIS PSoC block has selectable routing for the input and output signals, and programmable interrupt driven control. Application Programming Interface (API) firmware provides a highlevel programming interface for either assembly or C application software.

CY8C20246AS_16qfn.ibs
CY8C20346AS_24qfn.ibs
CY8C204x6AS_32qfn.ibs
CY8C20666AS_48qfn.ibs

CY8C20336h_24qfn.ibs
CY8C20446h_32qfn.ibs

cy8c20xx7_16qfn.ibs
cy8c20xx7_16soic.ibs
cy8c20xx7_24qfn.ibs
cy8c20xx7_30wlcsp.ibs
cy8c20xx7_32qfn.ibs
cy8c20xx7_48qfn.ibs

cy8c20xx7s_16qfn.ibs
cy8c20xx7s_24qfn.ibs
cy8c20xx7s_32qfn.ibs
cy8c20xx7s_48qfn.ibs

• 8-bit resolution
• Sample rates up to 8.8 ksps
• Input range 0 to Vdd-1V

The ADC8 User Module implements a Single Slope A/D Converter that generates an 8-bit, full scale output (0 to 255 count range).

• Scan 1 to 37 capacitive sensors
• Sensing possible with up to a 15 mm glass overlay
• Proximity detection to 20 cm with a wire-based sensor
• High immunity to AC mains noise, EMC noise, and power supply voltage changes
• Supports different combinations of independent and slide capacitive sensors
• Double slide sensor physical resolution using diplexing
• Increase slide sensor resolution using interpolation
• Touchpad support with two slide sensors
• Sensing support through high resistive conductive materials (ITO films for example)
• Shield electrode support for reliable operation in the presence of water film or droplets
• Guided sensor and pin assignments using the CSD2x Wizard
• Integrated baseline update algorithm for handling temperature, humidity, and electrostatic discharge (ESD) events
• Easily adjustable operational parameters
• PC GUI application support for raw data monitoring and parameter optimization in real-time
   

The CSD2x User Module (Capacitive Sensing using a Sigma-Delta Modulator) gives capacitance sensing using the switched capacitor technique with a sigma-delta modulator to convert the sensing switched capacitor current to digital code. The CSD2x User Module can support single-channel CapSense scanning and dual-channel CapSense scanning.

• Provides a global shadow register for a selected port data register
• Generates a set of macros for port pin manipulation
• Prevents corruption of GPIO pin settings during CPU control of GPIO
• Cooperates with other user modules that allocate shadow registers.
   

1. Timer resource usage, for CY8C20xx6H devices only.
2. The presented API memory value is for worst case. Used Flash depends on TS2000 configuration selected  and the type of    compiler used.
3. Consumed RAM significantly depends on how many and what effects were enabled in the TS2000 parameters.

Features and Overview

• Haptics effects based on industry proven Immersion TouchSense 2000 Haptics Effect Library
• Selection of up to 14 different effects
• Selection of two actuator models
• Improved user accuracy of CapSense® buttons due to tactile feedback
• Up to 3.3V operation
• Simple API to play haptic effects
   

The TS2000 User Module enables haptic feedback effects based on Immersion TouchSense 2000 technology when added to a project. Haptics is a tactile sensation effect that lets the equipment user know that a touch event has been detected. Input accuracy and user satisfaction with the equipment is improved with haptics.

Features and Overview

• 16-bit general purpose timer uses two PSoC blocks
• Source clock rates up to 48 MHz
• Automatic reload of period on terminal count
• Capture for clocks up to 24 MHz
• Terminal count output pulse may be used as input clock for other analog and digital functions
• Interrupt option on terminal count, capture (on some devices), or when counter reaches a preset value
   

The 16-bit Timer User Modules provides a down counter with programmable period and capture ability. The clock and enable signals can be selected from any system time base or external source. Once started, the timer operates continuously and reloads its internal value from the period register upon reaching terminal count. The output pulses high in the clock cycle following terminal count. Events can capture the current Timer count value by asserting the edge-sensitive capture input signal. Each clock cycle, the Timer tests the count against the value of the compare register for either a “Less Than" or “Less Than or Equal To" condition. Interrupts may be generated based on terminal count and compare signals. Some device families offer two additional features. The interrupt options include “interrupt on capture" and, in addition, the compare signal may be routed onto the row buses. If these options are available on your chosen device they will be shown in the Device Editor. 

• Flexible memory map
• Device reprogramming without engineering tools
• Product resident reprogramability
• Communication interface integrated to minimize code overhead
• Field deployment of firmware upgrades
• USB Full Speed device interface driver
• Support for interrupt and control transfer types
• Setup wizard for easy and accurate descriptor generation
• Runtime support for descriptor set selection
• Optional USB string descriptors
• Optional USB HID class support

• Industry standard Philips I2C-bus compatible interface
• Enables you to reprogram a PSoC device through the I2C system bus instead of  in-system programming pins
   

The I2C Bootloader User Module implements a bootloader that can reprogram the PSoC device over the I2C interface. The PSoC device already gives an in-system serial programming interface (ISSP) that allows downloading new code into the device. However, the bootloader allows a code update to occur through an industry standard communication interface, such as I2C. This User Module can be useful for any device that has to be reprogrammed in the field. The bootloading information can be sent through an I2C master device, such as a CY3240 (USB to I2C bridge) or an in-system host processor.     

• Flexible memory map
• Device reprogramming without engineering tools
• Product resident reprogramability
• Communication interface integrated to minimize code overhead
• Field deployment of firmware upgrades
• USB Full Speed device interface driver
• Support for interrupt and control transfer types
• Setup wizard for easy and accurate descriptor generation
• Runtime support for descriptor set selection
• Optional USB string descriptors
• Optional USB HID class support
• Optional USB-UART (CDC) class support

The USB Bootloader User Module implements a bootloader that can reprogram the PSoC device over the USB interface. The PSoC device already gives an in-system serial programming interface (ISSP) that allows downloading new code into the device. However, the bootloader allows a code update to occur through an industry standard communication interface, such as USB. This User Module can be useful for any device that has to be reprogrammed in the field. The bootloading information can be sent through a Cypress USB Bootloader Host interface.    

• The 8-bit general purpose counter uses one PSoC block
• Source clock rates up to 48 MHz
• Automatic reload of period on terminal count
• Programmable pulse width
• Input enables/disables continuous counter operation
• Interrupt option on compare output or terminal count
   

The 8-Bit Counter User Module provides a down counter with a programmable period and pulse width. The clock and enable signals can be selected from any system time base or external source. Once started, the counter operates continuously and reloads its internal value from the period register upon reaching terminal count. During each clock cycle, the counter compares the current count to the value stored in the compare register. Each clock cycle, the Counter tests the count against the value of the compare register for either a “less than" or “less than or equal to" condition. The comparator output provides a logic level that may be routed to pins and to other user modules. Most PSoC device families also permit the terminal count output to be routed in the same manner.

• The 16-bit general purpose counter uses two PSoC blocks
• Source clock rates up to 48 MHz
• Automatic reload of period on terminal count
• Programmable pulse width
• Input enables/disables continuous counter operation
• Interrupt option on compare output or terminal count
   

The 16-bit Counter User Modules provide a down counter with a programmable period and pulse width. The clock and enable signals can be selected from any system time base or external source. Once started, the counter operates continuously and reloads its internal value from the period register upon reaching terminal count. During each clock cycle, the counter compares the current count to the value stored in the compare register. Each clock cycle, the Counter tests the count against the value of the compare register for either a “less than” or “less than or equal to” condition. The comparator output provides a logic level that may be routed to pins and to other user modules. Most PSoC device families also permit the terminal count output to be routed in the same manner. If your device has this ability, it is shown in the device editor. An interrupt can be programmed to trigger when the counter reaches the terminal count or when the comparator (primary) output is asserted.

• Hardware implementation of IrDA low-speed, physical-layer transmitter
• Data bit rate selectable to a maximum transmit rate of 115.2 kbps
• Optional interrupt on transmit buffer empty

• Hardware implementation of IrDA receiver
• Data format compliant with IrDA data format
• Data bit rate selectable to a maximum receive rate of 115.2 kbps
• Data framing consists of start and stop bits
• Optional interrupt on receive register full
• Overrun and framing error detection

• Burst rates up to 6 Mbits/second
• RS-232 data-format compliant with framing consisting of start, optional parity, and stop bits
• Serial data format with even, odd, or no parity
• Optional interrupt receive register full condition
• Automatic framing, overrun, and parity error detection
   

The RX8 User Module is a RS-232 data-format compliant 8-bit serial receiver with programmable clocking and selectable interrupt or polling control operation. The format of the received data consists of a start bit, an optional parity bit, and a trailing stop bit. Receiver firmware is used to initialize the device, read the received byte, and detect error conditions.

• Allows scanning CapSense sensors and measuring input voltages without using separate loadable configurations
• ADC features:
  • Absolute and ratiometric ADC input modes with run-time mode switching allows you to easily scan different sensor types
  • Single slope ADC for absolute voltage input mode
  • Built-in calibration mechanism for the single-slope ADC
  • Integrating incremental ADC for ratiometric input mode
  • Allows a coarse temperature measurement: range of -40°C to +125°, accuracy of ± 40°C with resolution ± 2°C
• CapSense® features:
  

  • Based on the robust CSD method
  • Scans 1 to 28 capacitive sensors
  • Sensing possible with up to a 15-mm glass overlay
  • Proximity detection to 20 cm with a wire-based sensor
  • For more, see pdf

Functional Description

The CSDADC combines capacitance sensing with ADC functionality for voltage measurement without using separate loadable configurations. It saves code space by reusing modules common to both the CSD and ADC. You should use the CSDADC when you need both capacitance sensing and ADC functionality. Applications that need one or the other should use the CSD User Module or the ADC8 or ADC10.

• Allows scanning CapSense sensors and measuring input voltages without using separate loadable configurations
• Uses a Sinc^N filter fully implemented in hardware to reduce CPU overhead and antialias requirements
• Supports a configuration that uses no digital blocks
• ADC features:
  • Sigma-delta ADC with second order modulator
  • Data in unsigned or signed 2’s complement formats
  • Dynamically changed resolution to 10,12 and 14 bits
  • Maximum sample rates of 31250 sps at 10 bit resolution, 7812 sps at 14-bit resolution
  • Input range defined by internal and external reference options
  • Built in Programmable Gain Amplifier with configurable gain and reference settings.
• CapSense features:
  • Based on the robust CSD method
  • Second order modulator provides superior SNR performance
  • Scans 1 to 46 capacitive sensors
  • Sensing possible with up to a 25 mm glass overlay  
  • For more, see pdf

• Scan 1 to 28 capacitive sensors
• Scan capacitive sliders with 2 to 28 elements
• Slider physical resolution doubling using diplexing
• Slider interpolated resolution up to 1 part in 65535
• Generate touchpad using multiple slider sensors
• Adjustable sensor sensitivity, detection threshold, and sampling rate
• Guided sensor and pin assignments using the CSA_EMC Wizard
• Integrated baseline update algorithm for handling temperature changes
• Compensate for environmental and physical sensor variations
   

The CapSense® Successive Approximation Electromagnetic Compatibility (CSA_EMC) User Module implements an array of capacitive touch sensors using switched capacitor circuitry, an analog multiplexer, digital counting functions, and high level software routines to compensate for environmental and physical sensor variations. The sensor array can consist of combinations of independent sensors, sliding sensors, and touchpads implemented as a pair of orthogonal sliding sensors. High level software routines accommodate slider diplexing. Slider diplexing allows a single pin to measure two electrical sensors in two different physical locations. Diplexing provides resolution enhancement of the slider without the cost of an additional I/O.

• Does not require digital blocks
• Selectable 8, 16, or 32-bit tick counter
• Three types of timer functions.

The SleepTimer User Module provides basic timing functions without the use of valuable digital blocks. This user modules makes use of the standard sleep timer to create a variety of timing functions that are often useful in a project.

• Multiplexed -1/2 bias supported
• 2, 3, and 4 common LCD drive
• 30-150 Hz refresh rate
• LCD Drive technique using analog MUX bus
• Option of 1/2 bias to be generated externally or internally
• Supports Type A waveform only
• Contrast Control
   

The Segment LCD Driver (SLCD) User Module drives the LCD glass directly without using any external components.

• Scan 1 to 28 capacitive sensors.
• Sensing possible with up to a 15 mm glass overlay.
• Proximity detection to 20 cm with a wire-based sensor.
• High immunity to AC mains noise, EMC noise, and power supply voltage changes.
• Supports different combinations of independent and slide capacitive sensors.
• Double slide sensor physical resolution using diplexing.
• Increase slide sensor resolution using interpolation.
• Touchpad support with two slide sensors.
• Sensing support through high resistive conductive materials (ITO films for example).
• Shield electrode support for reliable operation in the presence of water film or droplets.
• Guided sensor and pin assignments using the CSD Wizard.
• Integrated baseline update algorithm for handling temperature, humidity, and electrostatic discharge (ESD) events.
• Easily adjustable operational parameters.
• PC GUI application support for raw data monitoring and parameter optimization in real time.
   

Capacitive sensing using a sigma delta modulator (CSD) provides CapSense® functionality using a switched capacitor technique with a sigma-delta modulator to convert the sensing switched capacitor current to digital code.

• Scan 1 to 46 capacitive sensors.
• Sensing possible with up to a 15 mm glass overlay.
• Proximity detection to 20 cm with a wire-based sensor.
• High immunity to AC mains noise, EMC noise, and power supply voltage changes.
• Supports different combinations of independent and slide capacitive sensors.
• Double slide sensor physical resolution using diplexing.
• Increase slide sensor resolution using interpolation.
• Touchpad support with two slide sensors.
• Sensing support through high resistive conductive materials (ITO films for example).
• Shield electrode support for reliable operation in the presence of water film or droplets.
• Guided sensor and pin assignments using the CSD Wizard.
• Integrated baseline update algorithm for handling temperature, humidity, and electrostatic discharge (ESD) events.
• Easily adjustable operational parameters.
• PC GUI application support for raw data monitoring and parameter optimization in real time.
   

The Capacitive Sensing using a Sigma-Delta Modulator (CSD) provides CapSense® functionality using the switched capacitor technique with a sigma-delta modulator to convert the sensing switched capacitor current to digital code.

• 16-bit general purpose pulse width modulator uses two PSoC blocks
• Source clock rates up to 48 MHz
• Automatic reload of period for each pulse cycle
• Programmable pulse width
• Input enables/disables continuous counter operation
• Interrupt option on rising edge of the output or terminal count
   

The 16-bit PWM User Module is a pulse width modulator with programmable period and pulse width. The clock and enable signals can be selected from several sources. The output signal can be routed to a pin or to one of the global output buses, for internal use by other user modules. An interrupt can be programmed to trigger on the rising edge of the output or when the counter reaches the terminal count condition.   

• 8 -bit general purpose pulse width modulator uses one PSoC block
• Source clock rates up to 48 MHz
• Automatic reload of period for each pulse cycle
• Programmable pulse width
• Input enables/disables continuous counter operation
• Interrupt option on rising edge of the output or terminal count
   

The 8-bit PWM User Module is a pulse width modulator with programmable period and pulse width. The clock and enable signals can be selected from several sources. The output signal can be routed to a pin or to one of the global output buses, for internal use by other user modules. An interrupt can be programmed to trigger on the rising edge of the output or when the counter reaches the terminal count condition.

• 8-bit general purpose pulse width modulator (PWM) with an 8-bit dead band generator consumes two PSoC blocks
• Phase1 and Phase2 underlapped outputs track the frequency of the generated PWM signal
• Programmable duty cycle
• Programmable dead time
• Dead Band Kill input drives Phase1 and Phase2 outputs low
• Counter clocking up to 48 MHz
• Interrupt option triggered on rising edge of the PWM generated signal or counter terminal count

The 8-bit PWMDB User Module is a pulse width modulator combined with an 8-bit dead band generator. The pulse width modulator provides a programmable period and pulse width input signal to the dead band generator. The dead band generator outputs two under-lapped signals, with programmable dead time at the same frequency as the input signal. When asserted, the Dead Band Kill input drives the Phase1 and Phase2 output signals low. The clock and enable signals can be selected from several sources. The Phase1 and Phase2 output signals can be routed to the external pin ports or to the global output buses for internal use by other user modules. An interrupt can be programmed to effectively trigger on both edges of the pulse width modulator output.

Features and Overview

• The USBUART Device uses a USB interface to emulate a COM port.
• UART-like high level functions are available on the PSoC device side.
   

Functional Description

Many embedded applications use the RS-232 interface to communicate with external systems such as PCs, especially when debugging. But in the PC world, the RS-232 COM port will soon disappear from most new computers, leaving USB as the replacement for serial communication. The simplest way to migrate a device to USB is to emulate RS-232 over the USB bus. The primary advantage of this method is that PC applications use the USB connection as an RS-232 COM connection, making it very simple to debug. This method uses a standard Windows® driver that is included with all versions Microsoft® Windows from Windows 98SE through Windows XP.

• USB Full Speed device interface driver
• Support for interrupt and control transfer types
• Setup wizard for easy and accurate descriptor generation
• Runtime support for descriptor set selection
• Optional USB string descriptors
• Optional USB HID class support
   

The CY3217 is the base Miniprog1 kit. This kit will provide the user with a programming tool that can be used to program all PSoC1 devices, except the CY25/26xxx devices. The kit includes a Miniprog1 and USB cable. The Miniprog1 is included with many of the evaluation kits, but the CY3217 is the stand-alone Miniprog1 kit to be used across all Cypress PSoC kits.

Hardware Description

Supports all PSoC Mixed-Signal Array families, included automotive devices, but excluding the CY8C25/26xxx devices.

Kit Includes:

• Miniprog1 Programmer
• USB Cable

www.cypress.com/go/programming

Software Title	Description	Link
PSoC Designer	This kit requires PSoC Designer for development
PSoC Programmer	This kit requires PSoC Programmer for programming

Features and Overview

• Hardware driver for a SPI-based CyFi™ radio transceiver
• Operates in the unlicensed worldwide Industrial, Scientific, and Medical (ISM) band (2.400 GHz–2.483 GHz)
• Supports two transmission modes (8DR and GFSK)
• DSSS data rates up to 250 Kbps, GFSK data rate of 1 Mbps
• DSSS technology provides robust noise immunity
• Selectable frequency, TX power and framing parameters (Length, CRC16, Auto ACK)
• Receive Signal Strength Indication (RSSI)
• Integrated power amplifier provides up to +4 dBm TX power
• Output power control range of 34 dB in 7 steps.
• Supports multiplexing of the IRQ and MOSI functions on the MOSI pin for reduced pin consumption.
   

• Supports Serial Peripheral Interconnect (SPI) Master protocol
• Supports SPI clocking modes 0, 1, 2, and 3
• Selectable input sources for clock and MISO
• Selectable output routing for MOSI and SCLK
• Programmable interrupt on SPI-done condition
• SPI Slave devices can be independently selected

Features and Overview

• Selectable Positive and Negative Inputs
• Direct connection to interrupt controller
• Programmable power consumption
   

The CMP user module provides two comparators, each having an analog comparison of two selectable inputs (one is always a voltage reference). This user module provides flexibility of the inputs and of the function and routing of the outputs. The output of the comparator, and the neighboring comparator, can be combined with any 2-input logic function. This combinatorial output can be optionally combined with a latched value and routed to a pin output or to the interrupt controller. The input multiplexers and the comparator are controlled through the CMP user module. The combinatorial logic is automatically configured for typical operation when the user module is placed and can be changed through the Device Editor. 

Features and Overview

• 16-bit timer uses two PSoC blocks
• Source clock rates up to 24 MHz
• Automatic reload of period on terminal count
• Use terminal count output pulse as input clock for other analog and digital functions
• Interrupt on terminal count and capture
   

The16-bit TachTimer User Module provides down counters with programmable period and capture ability. You can select the clock and enable signals from any system time base or external source. Once started, the timer operates continuously and reloads its internal value from the period register when it reaches terminal count. The output pulses high in the clock cycle after terminal count. Events can capture the current TachTimer16 count value by asserting the edge sensitive capture input signal. In each clock cycle, the TachTimer16 tests the count against the value of the compare register for either a less-than or lessthan- or-equal-to condition. Interrupts are generated based upon terminal count and compare signals. The compare signal may be routed onto the row buses. The main between the TachTimer16 User Module and the Timer16 User Module is that the TachTimer16 provides both terminal count and capture interrupts. Timer16 gives you a choice of one or the other, but not both. The MSB block is the source for terminal count interrupt and the LSB block provides the capture interrupt. Another difference between the Timer 16 and the TachTimer16 is that the TachTimer16 has no parameter to choose the interrupt type. Interrupt types for both MSB and LSB are hard coded.

Features and Overview

• 2 to 16-bit general purpose pseudo-random number generator uses two PSoC blocks
• Data input clocking up to 48 MHz
• Programmable polynomial and seed values
• Serial output bit stream
• Computed pseudo-random number can be read directly from the LFSR
   

The PRS User Module is a modular linear feedback shift register (LFSR) that generates a pseudo random bit stream. The polynomial and starting seed values can be specified to define its output number sequence.

• High impedance input
• Input signals may be rail-to-rail
• May be used with RefMux to multiplex input signals to switch capacitor block
• Programmable control of input source

The AMux4 User Module provides a four input analog signal multiplexer to a Continuous Time (CT) block that can be controlled programmatically by way of an API. One of four input signals may be selected to the input of the amplifier in the CT block. These input signals are connected to fixed ports, depending on which column this user module is placed. This module can also be used in conjunction with a RefMux to route the multiplexed signals to the analog column bus. 

Features and Overview

• 2 to 24-bit general purpose pseudo-random number generator uses three PSoC blocks
• Data input clocking up to 48 MHz
• Programmable polynomial and seed values
• Serial output bit stream
• Computed pseudo-random number can be read directly from the LFSR
   

The PRS User Module is a modular linear feedback shift register (LFSR) that generates a pseudo random bit stream. The polynomial and starting seed values can be specified to define its output number sequence.

Features and Overview

• 2 to 8-bit general purpose pseudo-random number generator uses one PSoC block
• Data input clocking up to 48 MHz
• Programmable polynomial and seed values
• Serial output bit stream
• Computed pseudo-random number can be read directly from the LFSR

The PRS User Module is a modular linear feedback shift register (LFSR) that generates a pseudo random bit stream. The polynomial and starting seed values can be specified to define its output number sequence.

Features and Overview

• 2 to 32-bit general purpose pseudo-random number generator uses four PSoC blocks
• Data input clocking up to 48 MHz
• Programmable polynomial and seed values
• Serial output bit stream
• Computed pseudo-random number can be read directly from the LFSR
   

The PRS User Module is a modular linear feedback shift register (LFSR) that generates a pseudo random bit stream. The polynomial and starting seed values can be specified to define its output number sequence.

• High impedance input
• Input signals may be rail-to-rail
• Can be used with RefMux to multiplex input signals to switch capacitor block
• Programmable control of input source

The AMUX8 User Module provides an eight-input-analog-signal-multiplexer to a Continuous Time (CT) block, controlled by an API. One of four input signals may be selected to the input of the amplifier in the CT block. These input signals are connected to fixed ports, depending on which column the user module is placed. The module is also used in conjunction with a RefMux to route the multiplexed signals to the analog column bus.

The AMUX8 User Module is used when the application needs to dynamically select from two or more ports during operation.

• Industry standard Philips I2C bus compatible interface
• Emulates common I2C EEPROM interface
• Only two pins (SDA and SCL) required to interface to I2C bus
• Standard data rate of 100/400 kbps
• High level API requires minimal user programming
   

The EzI2Cs User Module implements an I2C register-based slave device. The I2C bus is an industry standard, two wire hardware interface developed by Philips®. The master initiates all communication on the I2C bus and supplies the clock for all slave devices. The EzI2Cs User Module supports the standard mode with speeds up to 400 kbps. No digital or analog PSoC blocks are consumed with this module. The EzI2Cs User Module is compatible with multiple devices on the same bus.

• 7/8-bit software serial transmitter
• Data framing consists of start, optional parity, and one or two stop bits
• RS-232 serial-data compatible format with optional parity
   

The TX8SW User Module is an 7- or 8-bit RS-232 data-format compliant serial transmitter. The data transmitted is framed with a leading start bit and a final one or two stop bits. Transmitter firmware is used to start and stop device and control transmission of complex structures like strings, HEX value representations, and so on.

• 8-bit serial transmitter with selectable clocking to 48 MHz, yielding maximum 6 Mbit data rate
• Data framing consists of start, optional parity, and stop bits
• RS-232 serial-data compliant format with even, odd, or no parity
• Optional interrupt on transmit buffer empty condition
   

The TX8 User Module is an 8-bit RS-232 data-format compliant serial transmitter with programmable clocking and selectable interrupt or polling style operation. The data transmitted is framed with a leading start bit, an optional parity bit, and a stop bit. Transmitter firmware is used to initialize, start, stop, read status, and write data to the TX8.

• Asynchronous receiver and transmitter
• Data-format compliant with RS-232 serial-data format
• Burst rates up to 6 Mbits/second
• Data framing consists of start, optional parity, and stop bits
• Optional interrupt on receive register full and/or transmit buffer empty
• Parity, overrun, and framing error detection
• High level transmit and receive functions
   

The UART User Module is an 8-bit Universal Asynchronous Receiver Transmitter that supports duplex RS-232-compliant, data format serial communications over two wires. Received and transmitted data format includes a start bit, optional parity, and a stop bit. Programmable clocking and selectable interrupt or polling style operation is supported. Application Programming Interface (API) firmware routines are provided to initialize, configure, and operate the UART. An additional high level API is also given to support background command receiving and string printing.
 

The CY3207ISSP PSoC In-System Serial Programmer programs PSoC ICs with HEX files created with Cypress' PSoC Designer software.

The ISSP programs a single PSoC IC in one of three ways:

1. mounted on your PCB.
2. inserted into the ISSP socket.
3. via a test fixture.

The ISSP connects to your PC via USB and connects to your PCB with a 5-wire cable. Programming software includes Windows« GUI and command line capability. ISSP kit contains programmer, software, power supply, 5-wire programming cable, and USB cable.

 

Software Title	Description	Link
CY3207ISSP	Latest CY3207ISSP software

 

• Water tolerant buttons and sliders,  
• Buttons and sliders in presence of metal objects and  
• Proximity sensors.