Cypress.com: Documentation http://www.cypress.com/?app=search&searchType=advanced&id%3D3057 Cypress Introduces $49 SuperSpeed Explorer Kit to Accelerate USB 3.0 Designs http://www.cypress.com/?rID=99997 Kit Leverages Cypress’s Programmable EZ-USB® FX3™ Solution;
Demonstrations and Kit Giveaways Upcoming at IDF 2014

San Jose, Calif., September 8, 2014 – Cypress Semiconductor Corp. (NASDAQ: CY) today introduced a low-cost, easy-to-use development platform that enables designers to add high-performance USB 3.0 throughput to virtually any system. The new SuperSpeed Explorer Kit, now available for $49 online, is based on Cypress’s programmable EZ-USB® FX3™ USB 3.0 peripheral controller, which offers the flexibility to address a broad range of applications. Cypress will demonstrate the kit in booth number 780 at the Intel Developer Forum (IDF) in San Francisco from September 9-11, and 100 attendees will receive free kits.

EZ-USB FX3 is the industry’s only programmable USB 3.0 peripheral controller. It is equipped with a highly configurable General Programmable Interface (GPIF™ II), which can be programmed in 8-, 16-, and 32-bit configurations. GPIF II allows FX3 to communicate directly with application processors, FPGAs, storage media, and image sensors and provides a data transfer rate of up to 400 Megabytes per second, while using lower power than alternative solutions. The SuperSpeed Explorer Kit easily interfaces with external devices via three accessory boards that connect to Aptina image sensors, Altera FPGAs and Xilinx FPGAs, respectively. The kit also includes an integrated debugger with a standard USB interface to further simplify designs and speed time to market.

Cypress will also be giving away advance copies of the book “SuperSpeed Device Design by Example” by USB expert John Hyde at IDF. The book provides a practical approach to designing and implementing SuperSpeed USB peripherals and includes a series of examples using the SuperSpeed Explorer Kit. Hyde will be signing copies of the book in the Cypress booth and will present on SuperSpeed design on September 10 at 12:30 p.m. at the IDF Networking Plaza Theater.

“With the unique programmability of Cypress’s FX3 solution, our new $49 SuperSpeed Explorer kit makes it easier and more cost-efficient than ever before for designers to add USB 3.0 to their next-generation products,” said Mark Fu, senior marketing director of the USB 3.0 Business Unit at Cypress. “We look forward to showcasing the kit at IDF, along with our leading USB 3.0 portfolio.”

“I have been working with many of Cypress’s FX3 customers and wrote my book to address their most common concern of ‘getting started,’” said Hyde, who’s also a principal at USB Design By Example. “The book covers the end-to-end development process including Windows examples, FX3 firmware examples, GPIF II examples, and even Verilog examples for a CPLD plug-on board that enables you to try a variety of high-performance interfaces to your own hardware. I wanted to make SuperSpeed USB technology more accessible and believe that the book, along with the new Cypress kit, is a good first step in that direction.”

In addition to FX3, Cypress will feature other solutions from its USB 3.0 portfolio at IDF, including:

  • The USB-IF Certified, 4-port EZ-USB HX3 USB 3.0 hub controller, which offers robust interoperability, support for Battery Charging v1.2 and Apple charging standards, and full configurability. HX3 targets docking stations, monitors, Ultrabook™ devices, digital TVs, set-top boxes, printers and servers.
  • The EZ-USB CX3™ camera controller, which enables developers to add USB 3.0 to image sensors supporting the Mobile Industry Processor Interface (MIPI) Camera Serial Interface Type 2 (CSI-2) standard. CX3 provides four CSI-2 data lanes with speed up to 1 Gbps per lane, and it supports uncompressed video streams.
  • The EZ-USB FX3S™ RAID-on-Chip controller, which integrates storage host controllers that enable developers to add support for SD/eMMC memories and SDIO devices to their system.
     

About EZ-USB FX3
EZ-USB FX3 provides SuperSpeed USB 3.0 connectivity to virtually any system. The on-chip ARM9 CPU core with 512 KB RAM delivers 200 MIPS of computational power and is available for applications that require local data processing. Additionally, FX3 provides SPI, UART, I2C and I2S interfaces to connect to serial peripherals. In short, FX3 provides highly flexible and integrated features that enable developers to add USB 3.0 connectivity to any system.

EZ-USB FX3 is in volume production now and is available in two packages: a 121-ball BGA (10 mm x 10 mm) and a space saving 131-ball Wafer-Level Chip Scale Package (WLCSP) with dimensions of 4.7 mm x 5.1 mm. More information on Cypress’s USB 3.0 portfolio is available at www.cypress.com/usb or by contacting Cypress at usb3@cypress.com.

Follow Cypress Online


About Cypress
Cypress delivers high-performance, mixed-signal, programmable solutions that provide customers with rapid time-to-market and exceptional system value. Cypress offerings include the flagship PSoC® 1, PSoC 3, PSoC 4 and PSoC 5LP programmable system-on-chip families. Cypress is the world leader in capacitive user interface solutions including CapSense® touch sensing, TrueTouch® touchscreens, and trackpad solutions for notebook PCs and peripherals. Cypress is a world leader in USB controllers, which enhance connectivity and performance in a wide range of consumer and industrial products. Cypress is also the world leader in SRAM and nonvolatile RAM memories. Cypress serves numerous major markets, including consumer, mobile handsets, computation, data communications, automotive, industrial and military. Cypress trades on the NASDAQ Global Select Market under the ticker symbol CY. Visit Cypress online at www.cypress.com.

 

# # #

Cypress, the Cypress logo, EZ-USB, TrueTouch, PSoC and CapSense are registered trademarks and FX3, GPIF, CX3 and FX3S are trademarks of Cypress Semiconductor Corp. All other trademarks are the property of their respective owners.

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Lattice and Cypress Team Up to Simplify USB 3.0 Video Bridge Designs with New Development Kit http://www.cypress.com/?rID=100049 Kit Offers Complete HD Video Reference Design Based on the LatticeECP3 FPGA
And the Cypress FX3 USB 3.0 Peripheral Controller; Demonstrations at IDF 2014


SAN FRANCISCO, September 9, 2014 – Lattice Semiconductor Corporation (NASDAQ: LSCC) and Cypress Semiconductor Corp. (NASDAQ: CY) today introduced at the Intel Developer Forum (IDF) a low-cost development kit that provides a complete reference design for USB 3.0-enabled video bridges. The new Lattice USB 3.0 Video Bridge Development Kit simplifies integration of USB 3.0 audio and High-Definition (HD) video connectivity for a wide range of applications, leveraging the LatticeECP3™ FPGA family and the Cypress EZ-USB® FX3™ USB 3.0 peripheral controller. Cypress and Lattice will demonstrate the kit at IDF in Cypress booth number 780 from September 9-11.

USB 3.0 delivers 5-Gbps bandwidth that enables streaming of HD video without requiring compression, which degrades image quality. The Lattice USB 3.0 Video Bridge Development Kit includes all of the hardware and software needed to develop USB 3.0 cameras, frame grabbers, machine vision systems, surveillance equipment, and other audio/video USB 3.0 converter systems. With the LatticeECP3 FPGA, the kit supports high speed reception and packing of video and audio data into USB 3.0 UVC and UAC data frames without the use of external memory buffers. The kit leverages the flexibility of the FX3 solution to support parallel, MIPI CSI-2, and LVDS camera interfacing, as well as HDMI and SDI audio/video formats.  The kit is available now for purchase at the Lattice store.

“This new Lattice video bridge solution offers a complete reference design that will help designers get top-performance HD video products to market faster,” said Mark Fu, senior marketing director of the USB 3.0 Business Unit at Cypress. “USB 3.0 has opened up robust HD video for a broad range of applications. Our programmable FX3 solution delivers unmatched design flexibility to integrate USB 3.0 into next-generation products.”

“The key benefits of the Lattice USB 3.0 Video Bridge Development Kit include flexibility in terms of supported audio and video interface standards, scalability of input- and pre-processing options, and the production readiness of a small form factor, low cost reference design,” said Jim Tavacoli, senior director of product and segment marketing at Lattice.

About EZ-USB FX3
EZ-USB FX3 is the industry’s only programmable USB 3.0 peripheral controller. It is equipped with a highly configurable General Programmable Interface (GPIF™ II), which can be programmed in 8-, 16-, and 32-bit configurations. GPIF II allows FX3 to communicate directly with application processors, FPGAs, storage media, and image sensors and provides a data transfer rate of up to 400 Megabytes per second, while using lower power than alternative solutions. FX3 provides SuperSpeed USB 3.0 connectivity to virtually any system. The on-chip ARM9 CPU core with 512 KB RAM delivers 200 MIPS of computational power and is available for applications that require local data processing. Additionally, FX3 provides SPI, UART, I2C and I2S interfaces to connect to serial peripherals. In short, FX3 provides highly flexible and integrated features that enable developers to add USB 3.0 connectivity to any system.

EZ-USB FX3 is in volume production now and is available in two packages: a 121-ball BGA (10 mm x 10 mm) and a space saving 131-ball Wafer-Level Chip Scale Package (WLCSP) with dimensions of 4.7 mm x 5.1 mm. More information on Cypress’s USB 3.0 portfolio is available at www.cypress.com/usb or by contacting Cypress at usb3@cypress.com.

Follow Cypress Online
•    Join the Cypress Developer Community.
•    Follow @CypressSemi on Twitter.
•    Visit us on Facebook and LinkedIn.
•    View Cypress videos on our Video Library or YouTube.

About Lattice Semiconductor
Lattice Semiconductor (NASDAQ: LSCC) is the leader in low power, small form factor, low cost, customizable solutions for a quickly changing connected world. From making smart consumer devices smarter, to enabling intelligent automation in industrial, or connecting anything to everything in communications, electronics manufacturers around the world use Lattice’s solutions for fast time to market, product innovation, and competitive differentiation. For more information, visit www.latticesemi.com. You can also follow us via LinkedIn, Twitter, Facebook or RSS.

About Cypress
Cypress delivers high-performance, mixed-signal, programmable solutions that provide customers with rapid time-to-market and exceptional system value. Cypress offerings include the flagship PSoC® 1, PSoC 3, PSoC 4 and PSoC 5LP programmable system-on-chip families. Cypress is the world leader in capacitive user interface solutions including CapSense® touch sensing, TrueTouch® touchscreens, and trackpad solutions for notebook PCs and peripherals. Cypress is a world leader in USB controllers, which enhance connectivity and performance in a wide range of consumer and industrial products. Cypress is also the world leader in SRAM and nonvolatile RAM memories. Cypress serves numerous major markets, including consumer, mobile handsets, computation, data communications, automotive, industrial and military. Cypress trades on the NASDAQ Global Select Market under the ticker symbol CY. Visit Cypress online at www.cypress.com.

# # #

Cypress, the Cypress logo, EZ-USB, TrueTouch, PSoC and CapSense are registered trademarks and FX3 and GPIF are trademarks of Cypress Semiconductor Corp. Lattice Semiconductor Corporation, Lattice Semiconductor (& design), L (& design), LatticeECP3, and specific product designations are either registered trademarks or trademarks of Lattice Semiconductor Corporation or its subsidiaries in the United States and/or other countries. All other trademarks are the property of their respective owners.

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New Cypress TrueTouch Gen4X Capacitive Touchscreen Controller Prevents Accidentally Hanging up Calls with Face Detection Feature http://www.cypress.com/?rID=100051 Gen4X Solution Delivers Best-in-Class Performance with Support for Gloved Finger Tracking
And Single-Layer Sensors for Low-Cost Smartphones


SAN JOSE, Calif., September 9, 2014 – Cypress Semiconductor Corp. (NASDAQ: CY) today announced a TrueTouch® Gen4X touchscreen controller with a face detection feature that prevents unintended touches from accidentally hanging up a call. The face detection feature of the new Gen4X TMA445A controller eliminates the need for infrared sensors in smartphones, reducing bill-of-material costs. Additionally, the TMA445A offers Cypress’s industry-leading tracking of multiple fingers in gloves.

The TrueTouch Gen4X TMA445A controller enables compact smartphone form factors by leveraging Cypress’s Single-Layer Independent Multi-touch (SLIM®) sensor structures. The controller delivers best-in-class accuracy and linearity for fingers of different sizes and gloves of various materials and thicknesses, including ski gloves. In addition, it automatically switches between glove and finger tracking without requiring the user to switch settings. Gen4X controllers also provide industry-leading water rejection and wet finger tracking with best-in-class immunity to electronic noise from aftermarket chargers and displays. The TMA445A controller offers the fastest refresh rates in the Gen4X family, delivering robust touchscreen performance.

“Cypress has been building up our TrueTouch Gen4X touchscreen controller family to bring even better system value and performance to smartphones in China and other cost-competitive markets,” said Yi Hang Wang, Director of TrueTouch Marketing for Cypress. “Our newest controller improves the end-user experience with support for face-detection and gloved-finger tracking, and its SLIM support enables our customers to create thinner, sleeker mobile devices.”

Cypress’s TrueTouch Gen4X family delivers immunity to charger noise of up to 35V peak-to-peak (Vpp) from 1-500 kHz, with a 0.5-mm cover lens and a 9-mm-wide finger. With Cypress’s unique and patented DualSense™ technology to execute both self-capacitance and mutual-capacitance measurements in the same device, the family offers the industry’s best water rejection and wet finger tracking for seamless performance in real-world conditions, including the presence of rain, condensation, or sweat. The TrueTouch portfolio’s unique features are backed by an industry-leading portfolio of more than 100 capacitive touch sensing patents.

The Gen4X family is based on a 32-bit ARM® Cortex™ M-Core processor that is known for high-efficiency MIPS/mW. The TMA445A controller averages low power consumption of 12 mW in active mode and 15 uW in deep-sleep mode.

Availability
The Gen4X TMA445A controller is currently sampling, with production expected in the fourth quarter of 2014. The controller is available in mobile-friendly 44-pin and 48-pin QFN packages.  

About TrueTouch
Cypress’s TrueTouch technology provides the industry’s best noise immunity, highest SNR, best waterproofing, fastest refresh rates, lowest power consumption, and world’s best accuracy and linearity. The flexible TrueTouch solution allows customers to rapidly develop leading-edge solutions without having to buy turnkey modules. They have a choice of using touch sensors (glass or film) and LCDs from preferred partners, and can develop innovative mechanical designs ranging from flat to curved surfaces of varying thickness. The patented capacitive sensing technology of TrueTouch devices offers robust noise immunity that enables flawless operation in noisy RF and LCD environments. Additional TrueTouch information is available at touch.cypress.com.

Follow Cypress Online
•    Join the Cypress Developer Community.
•    Follow @CypressSemi on Twitter.
•    Visit us on Facebook and LinkedIn.
•    View Cypress videos on our Video Library or YouTube.

About Cypress
Cypress delivers high-performance, mixed-signal, programmable solutions that provide customers with rapid time-to-market and exceptional system value. Cypress offerings include the flagship PSoC® 1, PSoC 3, PSoC 4 and PSoC 5LP programmable system-on-chip families. Cypress is the world leader in capacitive user interface solutions including CapSense® touch sensing, TrueTouch touchscreens, and trackpad solutions for notebook PCs and peripherals. Cypress is a world leader in USB controllers, which enhance connectivity and performance in a wide range of consumer and industrial products. Cypress is also the world leader in SRAM and nonvolatile RAM memories. Cypress serves numerous major markets, including consumer, mobile handsets, computation, data communications, automotive, industrial and military. Cypress trades on the NASDAQ Global Select Market under the ticker symbol CY. Visit Cypress online at www.cypress.com.

# # #

Cypress, the Cypress logo, TrueTouch, SLIM, PSoC and CapSense are registered trademarks and DualSense is a trademark of Cypress Semiconductor Corp. All other trademarks are property of their owners.

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PSoC Today! ARM Architecture Part I http://www.cypress.com/?rID=63244 PSoC Today!
ARM Architecture Part I
Today kicks off the start of a four part series on ARM Architecture with ARM Guru, Ata Khan.
Part I in a series of IV

 

View more PSoC Today! Webisodes now

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PSoC Today! Brushless Sensorless DC Motors Part II http://www.cypress.com/?rID=61823 Webisode 7

Robert Murphy continues his discussion on brushless, sensorless DC motors using PSoC to reduce costs Part II in a series of IV

 

View more PSoC Today! Webisodes now

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Re: 'R' is not recognized as an internal or external command, operable program or batch file. http://www.cypress.com/?rID=41231 -0600 Re: 'R' is not recognized as an internal or external command, operable program or batch file. http://www.cypress.com/?rID=41232
If I'm guessing correctly, the problem is because the project is in "My Documents", or something such.

I usually just have a folder named "C:\src" with all my projects. Also, it's better to avoid folder names with spaces(I use "_" instead) because some compilers/linkers/IDEs are badly written and can not understand them.

Good luck!]]>
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Re: 24x94 IO Analog Multiplexer http://www.cypress.com/?rID=41410
I am not sure what you are looking for, but there are two methods for capsense: CSD and CSA.

In CSD, you need to add external capacitor.

The recommended value is given in respective device CSD user module datasheet.

I have attached one for your reference.

Cheers,
Brijesh]]>
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Re: 24x94 IO Analog Multiplexer http://www.cypress.com/?rID=41411
I hope the attached project will help in answering your query.]]>
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Re: ADC PSoc 3 Noise? http://www.cypress.com/?rID=41701
Thank You,

Philip]]>
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Re: ADC hangs during data valiable check http://www.cypress.com/?rID=41371
I was using a shifting register in the tmp_read routine.
Instead of clearing the carry flag like

and F, 0xFB

I did "and F, 0x00".

Problem solved ;-)]]>
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Re: ANALOG BLOCKS ARCHITECTURE http://www.cypress.com/?rID=41435 -0600 Re: ANALOG BLOCKS ARCHITECTURE http://www.cypress.com/?rID=41437 -0600 Re: ANALOG BLOCKS ARCHITECTURE http://www.cypress.com/?rID=41438
No more about that PsOC master.]]>
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Re: ANALOG BLOCKS ARCHITECTURE http://www.cypress.com/?rID=41439
As the data sheet says "Some of the more common PSoC analog functions (most available as user modules) are listed below".

The PGA which is available as an user module can only be placed in a CT block, of which there are only 4. To create amplifiers using SC Blocks, you have to use the SCBLOCK user module and configure the parameters on your own. As an SC Block amplifier is not available as an user module, maybe the data sheet does not mention this.]]>
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Re: ANALOG BLOCKS ARCHITECTURE http://www.cypress.com/?rID=41442 paper, etc to start from basics?]]> -0600 Re: ANALOG BLOCKS ARCHITECTURE http://www.cypress.com/?rID=41443 You can find them design support >> technical training >> on demand training

If you wanna read about PSoC, read any datasheet of a part.

There is an old app note too on Getting Started with PSoC ..... that can also be a good starting point .. here is the link http://www.cypress.com/?rID=2848

Have a nice time with PSoC !]]>
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Re: ANALOG BLOCKS ARCHITECTURE http://www.cypress.com/?rID=41444 That only talks about the architecture.
I would like some pdf training as many I found by LabView.
The olnly I reached was a Cypress video training.

Anyway thanks a lot.]]>
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Re: ANALOG BLOCKS ARCHITECTURE http://www.cypress.com/?rID=41445 -0600 Re: ATOI For PSOC 3 http://www.cypress.com/?rID=41697
int ADCResult;
char OutputString[7];

sprintf(OutputString, "%i", ADCResult);
LCD_Position(1,0);
LCD_PrintString(OutputString);


The sprintf function converts the integer into ASCII string and stores it in OutputString. LCD_PrintString can be used to print it to the LCD.]]>
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Re: ATOI For PSOC 3 http://www.cypress.com/?rID=41698
Thank you


Philip Nielsen]]>
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Re: Access variable declared in C from asm. http://www.cypress.com/?rID=41293
inc [_seconds]

Some more points to remember.

1. The variables in PSoC Designer are in Big Endian format. So, to increment the LSB of seconds, use [_seconds + 3]
2. If you are dealing with a device with more than 256 bytes of RAM, you may also have to set the CUR_PP register to point to the currect RAM page. Check out the document on Large Memory model in the Help >> Documentation section of PSoC Designer for details about.]]>
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Re: Access variable declared in C from asm. http://www.cypress.com/?rID=41294 I've got to look in to the CUR_PP register stuff because although it compiles it doesn't seem to be incrementing the seconds variable.

Cheers,
James.]]>
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Re: Access variable declared in C from asm. http://www.cypress.com/?rID=41295
There is one more approach you can try. This is to define the variable in assembly and then access it in C. You can place the variable in RAM Page-0 so that inside the interrupt, you do not have to change the CUR_PP register. Below is the procedure.

1. In the Timer ISR, define the variable like this.

area InterruptRAM(ram)
_seconds:
seconds: BLK 4

This will place the seconds variable in Page-0. Make sure that you place the above instructions inside the custom user code area in the Timer's ISR file

2. To access this variable from a C file, add the following declaration either in a header file that is included in the source file or directly in the source file

extern long seconds;

Now you can access the seconds variable in C as well. Also, as the variable is now placed in Page-0 and as all the memorey operations are by default done on Page-0 inside an interrupt, you can access the variable inside the ISR without changing the CUR_PP register.]]>
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Re: Access variable declared in C from asm. http://www.cypress.com/?rID=41296 ]]> -0600 Re: Are you using Windows 2000 on your machine? http://www.cypress.com/?rID=41243
]]>
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Re: Are you using Windows 2000 on your machine? http://www.cypress.com/?rID=41244
I mean, JAVA!

I am using http://www.sip-communicator.org/ which is a singel program and it runs on ANY operating Systems runing JAVA 1.5 and higher

I am using for 11 years EXCLUSIVELY Debian GNU/Linux and have never had the need to run a proprietary OS which eat my resources and laks of stability. Even VariCAD and Eagle are runing under Linux and I use Blender, Povray and the Gimp too, to fullfill my Professionel needs.

Are there Plans for Linux-Develper stuff?

Thanks in Advance
Michelle Konzack
Owner and Chefdeveloper
Tamay Dogan Network
]]>
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Re: Are you using Windows 2000 on your machine? http://www.cypress.com/?rID=41245 -0600 Re: Best way to get AGND? http://www.cypress.com/?rID=41355 BTW, the first of the two links didn't work (the one to cypress.com).]]> -0600 Re: Bootloader http://www.cypress.com/?rID=41097 -0600 Re: CY PLC Transformer http://www.cypress.com/?rID=41623
No problem. The Myrra transformer seems like a good option.

What is your application? Would you want a sales or marketing person from Cypress to contact you? It would help getting support faster. If so, send me your contact details at rarp [at] cypress [dot] com

Yours truly,

Rahul]]>
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Re: CY PLC Transformer http://www.cypress.com/?rID=41624
Thank you for your assistance, for now we are doing our prototype with a company that will do everything from pcb manufacturing to components buying, but it could be interesting when we'll pass to the production phase. I'll contact you surely.
BTW, our application is an automation device for offices .
Thank you again


Federico
]]>
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Re: CY3210 MiniProg1 Kit http://www.cypress.com/?rID=41225
I don't find any attachment here.

-Brijesh]]>
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Re: CY3210 MiniProg1 Kit http://www.cypress.com/?rID=41226
Thank you very much for your reply. Now i have attached the JPG file so please refer it once and describes me what they are?


Regards,
Shaik]]>
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Re: CY3210 MiniProg1 Kit http://www.cypress.com/?rID=41227

Please find the attached schematic of this board.

Connector J1-------port 2 is brought out
Jumper JP1--------Vcc selection for 8 pin or 20 pin device
Connector J2------ISSP connector for programming purpose
R6 is trim pot

Cheers,
Brijesh
]]>
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Re: CY3210 MiniProg1 Kit http://www.cypress.com/?rID=41228
Thank you Brijiesh. Now i have cleared about what they are but I don't know what's the functionalities of those.

1) You have specified that

Connector J1-------port 2 is brought out
Jumper JP1--------Vcc selection for 8 pin or 20 pin device
Connector J2------ISSP connector for programming purpose
R6 is trim pot

but what It's actual purpose or functionality of those "Connector J1" , "Jumper JP1" , "R6"?

2) What do you mean by "POT" ? Is there any abbreviation for "POT"? and what is the core functionality of "POT"?

3) Can i directly connect to "Connector J2 (ISSP)" without using "PSoC MiniProg"? I mean can i connect the board directly from my PC? If so how can i do that?


Regards,
Shaik Baji]]>
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Re: CY3271-EXP1 Enviromental Sensing Kit http://www.cypress.com/?rID=41557 -0600 Re: CY3271-EXP1 Enviromental Sensing Kit http://www.cypress.com/?rID=41559
I am not sure if there are any example projects other than the ones provided in the Kit CD. Check out the following link.

http://www.cypress.com/?rID=17672]]>
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Re: CY3271-EXP1 Enviromental Sensing KitH http://www.cypress.com/?rID=41558
Thanks for your quickly support is correct I reload the hex file and nowthe kit working fine , I have a question for You ; where I can find examples for cypress firstouch
Saludos

FG]]>
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Re: CY4672 RDK and PSoC Designer 5 http://www.cypress.com/?rID=41632
It is a known issue that CY4672 RDK firmware gives errors when you try to build the code in PD5.0. Cypress Engineers are working on a permanent fix for these issues. However, you should be successfully able to build the code in PD4.4 if you have installed it properly after reading the release notes. Can you try installing the PD4.4 again from this location?
http://www.cypress.com/?rid=36833

Regards,
Anitha
]]>
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Re: CY4672 RDK and PSoC Designer 5 http://www.cypress.com/?rID=41633 The software archive was exactly was I needed. Thanks for the link.
However, now I try to build the project using PD4.4 and it's complaining about my compiler license.
I've come across other posts that in PD5.0, the ImageCraft compiler is free and comes bundled with the installer. This seems to be separate for PD4.4, am I s*** out of luck once again?]]>
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Re: CY4672 RDK and PSoC Designer 5 http://www.cypress.com/?rID=41634
You did the right thing by creating a technical support case for this. We cannot provide you the compiler license in forum. I will give you the compiler license in the tech support case itself since I am handling that case :-)

Regards,
Anitha]]>
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Re: CY7C1472BV25 SRAM Chip Migration http://www.cypress.com/?rID=41266
As I know, NC pins should left unconnected and should not be used for any purpose.

But to increase the depth of memory, chip select pin should be used as one extra address line and address, data bus can be connected togather for two chips.

Cheers,
Brijesh]]>
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Re: CYWUSB6934 http://www.cypress.com/?rID=41599
here's one such example:
CYWM6934/CYWM6935 RF Module Code Snippets]]>
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Re: CYWUSB6934 http://www.cypress.com/?rID=41600 -0600 Re: CYWUSB6934 http://www.cypress.com/?rID=41601 * SERDES isn't enabled, see REG_SERDES_CTL default
* REG_TX_VALID defaults to 00h meaning to transmit preamble bits instead of your data bits
* various clocks aren't setup properly by default, etc.]]>
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Re: CYWUSB6934 http://www.cypress.com/?rID=41602 -0600 Re: CYWUSB6934 http://www.cypress.com/?rID=41603 ]]> -0600 Re: CYWUSB6934 http://www.cypress.com/?rID=41605 -0600 Re: CYWUSB6934 http://www.cypress.com/?rID=41606 -0600 Re: CYWUSB6934 http://www.cypress.com/?rID=41607 -0600 Re: CYWUSB6934 http://www.cypress.com/?rID=41608
EOF fields allow you to define the condition for terminating a transaction on the receiver.]]>
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Re: CYWUSB6934 http://www.cypress.com/?rID=41609 -0600 Re: CYWUSB6934 http://www.cypress.com/?rID=41610 -0600 Re: CYWUSB6934 http://www.cypress.com/?rID=41611
all being:
64kbps (DDR32)
16kbps (SDR64)]]>
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Re: CYWUSB6934 http://www.cypress.com/?rID=41612 -0600 Re: CYWUSB6934 http://www.cypress.com/?rID=41613
if interrupts are not "enabled" then the important events to process will not cause the IRQ pin to assert. in this case, your firmware will need to poll the various status registers looking for these important events to process. the later case, is more difficult to debug, IMO, as there are tons of unnecessary / unwanted SPI transactions to analyze, etc.

typically, 99% of the time, you'll want to use/port one of the kit's radio driver implementations:

CY3635's radio driver implements 16kbps mode
CY3632's radio driver implements 64kbps mode

both are written in "C" and easy to follow, well tested, etc.

the best advise one could offer, is to tell you to not get too caught up in the lowest-level details, as there's much more to do other than the radio driver level in order to make a robust radio link...

also, you may want to use/port the protocol layer, as well:
CY3635's protocol implements N:1, think temperature sensors, etc.
CY3632's protocol implements HID, think mice and keyboards, etc.

again, both are written in "C" and easy to follow, well tested, etc.

rolling your own everything could easily take months on end of hard labor implementing, then months on end of hard labor testing...

generally best to forego rolling your own everything, especially if all you want to accomplish is moving your own data.]]>
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Re: CYWUSB6934 http://www.cypress.com/?rID=41614 //----------------------------------------------------------------------------
// C main line
//----------------------------------------------------------------------------
//nhiem vu cua chuong tirnh nay la phai thu cac module sau
//thu truyen 1 byte giua 2 con vi dieu khien thong qua module CYWM6934
//dieu khient tat car cac chan cua
//thu trinh phuc vu ngat ngoai
//thu luon che do sleep cua con ni luon
//co gang ngay 22/11 phai hoan thanh
//config pin of PSOC
//P2_0->MOSI (20)
//P2_2->SCLK (21)
//P2_3->MISO (7)
//P2_7->nPD (8)
//P2_6->nRESET (23)
//P2_4->IRQ (22)
//P2_5->nSS (6)
/////////////////////////////////////
//led debug
//P1_1->LED1_transmit (13)
//P1_2->LED_transmit_mode
//P1_3->LEDexINT (12)
//P1_5->LED2_receive (11)
//P1_7->LED4 (10)
//P1_0->LED_WAIT
////////////////////////
//P0_7->BUTTON (15)
//////////////////////////////
//this program is used for both receiver and transmiter module
//when it is used for chuong trinh nao then can remove serveral subprogram
//
#include // part specific constants and macros
#include "PSoCAPI.h" // PSoC API definitions for all User Modules
#include "ports.h"
#include "define_radio.h"
BYTE data[];

//char read_byte();
BYTE wait_complete()
{
while( ! (SPIM_1_bReadStatus() & SPIM_1_SPIM_RX_BUFFER_FULL ) );
return SPIM_1_bReadRxData();
}
void main()
{
// Insert your main routine code here.
char x;
SPIM_1_Start(SPIM_1_SPIM_MODE_0 | SPIM_1_SPIM_MSB_FIRST);

radio_init();

set_transmit_mode();
write_radio_reg(REG_TX_INT_STAT,0);
M8C_EnableGInt;

while(1)
{
//PRT2DR |=0b01000000;
//radio_init(); //thiet lap ban dau cho module
//PRT1DR &=0b11111011;
PRT1DR |=0b00000001; //indentify that programme is waiting transmit data

delay(10);
PRT0DR=read_radio_reg(REG_TX_INT_STAT);
if((PRT1DR&0x80)==0) //wait P0_7 is pressed
{
while((PRT1DR&0x80)==0); //test again
write_radio_reg(REG_DATA_TX,0b10101010); //ok
while(read_radio_reg( REG_TX_INT_STAT)==0);
PRT0DR=read_radio_reg(REG_TX_INT_STAT);
//while((PRT2DR&0b00010000)==0);
PRT1DR ^=0b00000010;

}

}

}
//////////////////////////////////////////////////////////////////
//////////////CHUONG TRINH THIET LAP CHO MODULE///////////////////
//////////////////////////////////////////////////////////////////
void radio_init(void)
{
////////////////////////////////////
// microcontroller pins initialization
PRT2DR |=nPD; // set high power to the radio; P2_7=1
delay(1);
PRT2DR &=(~nRESET); // reset radio device xoa P2_6=0;
delay(1);
PRT2DR |=nRESET; // reset radio device //P2_6=1;
PRT2DR |=nSS; // deassert SS pin P2_5=1;
delay(1);
//PRT2DR &=(~nSS); //assert module
delay(1);
write_radio_reg(REG_CLOCK_MANUAL,0x41); //this reg is must be write =value 0x41 to
write_radio_reg(REG_CLOCK_ENABLE,0x41); //the same for this reg
write_radio_reg(REG_SERDES_CTL,0x3|0x8); //enable SERDES mode and EOF=0b..011;

write_radio_reg( REG_CHANNEL, 2 ); // Use channel 42
//write_radio_reg(REG_SERDES_CTL,7);
}
void delay(int n)
{
int i;
for (i=0;i<200;i++);
}
void set_transmit_mode(void)
{
//LED_receive(0);LED_transmit(1); //turn on transmit LED and turn off receive LED
//PRT1DR |=0b00000100;
write_radio_reg(REG_CONTROL,bTX_ENABLE); // Set transmit mode
write_radio_reg(REG_SERDES_CTL,bSERDES_ENABLE | mEND_OF_FRAME_LEN); // Set SERDES mode and 7 EOF bits
write_radio_reg(REG_TX_INT_EN,bTX_EMPTY); // Set TX interrupt upon Empty
write_radio_reg(REG_PA,mPA_BIAS); // Set max power amplifier coefficient
//write_radio_reg(REG_TX_INT_EN,0x1); //cho phep ngat khi bo thanh ghi serdes rong
write_radio_reg(REG_VALID_TX,0xFF);
}
void set_receive_mode(void)
{
//LED_transmit(0);LED_receive(1); //invest transmit mode
write_radio_reg(REG_CONTROL,bRX_ENABLE); // Set receive mode
write_radio_reg(REG_SERDES_CTL,bSERDES_ENABLE | mEND_OF_FRAME_LEN); // Set SERDES mode and 7 EOF bits
// write_radio_reg(REG_RX_INT_EN,bRX_FULL_A); // Set RX interrupt upon Full A
}
///////////////////////////////////////////////////////////////
////////////
void write_radio_reg(char reg, char value){
PRT1DR ^=0b00000100;
PRT2DR&=(~nSS); //assert signal MCU

send_byte(0x80 | reg); wait_complete(); //gui dia chi cua than h ghi va bat bit 7=1 de chi thi qua trinh viet
send_byte(value); wait_complete(); //gui data ra thanh ghi

PRT2DR|=nSS;
}
BYTE read_radio_reg(char reg){
BYTE x;
PRT2DR&=(~nSS);

send_byte(reg); wait_complete();
send_byte(0); x=wait_complete();

PRT2DR|=nSS;
return x;
}


void send_byte(char x)
{
while( ! (SPIM_1_bReadStatus() & SPIM_1_SPIM_TX_BUFFER_EMPTY ) );
SPIM_1_SendTxData( x ); /* load the byte */
}



//extern char TimeOut_condition;
]]>
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Re: CYWUSB6934 http://www.cypress.com/?rID=41615 -0600 Re: CYWUSB6934 FCC question http://www.cypress.com/?rID=41584
Regards,
Jim]]>
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Re: Can I clone "downward"? http://www.cypress.com/?rID=41251
Are there any specific issues/gotchas to watch out for when "downgrading" like this?

Thanks!]]>
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Re: Cannot Read the hub pinouts in CyFi101 http://www.cypress.com/?rID=41116
-Pushek]]>
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Re: Cannot Read the hub pinouts in CyFi101 http://www.cypress.com/?rID=41118
I believe this document will help.

Thanks,
Pushek]]>
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Re: Cannot Read the hub pinouts in CyFi101 http://www.cypress.com/?rID=41119
Thanks,

Tom]]>
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Re: Cannot make a LED work http://www.cypress.com/?rID=41288 -0600 Re: Cant place user modules sometimes! http://www.cypress.com/?rID=41282
Best regards,
Sachin]]>
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Re: Cant place user modules sometimes! http://www.cypress.com/?rID=41283


** FILENAME:USB.xml
** Version: 1.5, Updated on 2009/7/13 at 14:8:29
**
** DESCRIPTION: USB User Module Topology Selection Data for the
** CY8C24090 family of devices.
**
** - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
** Copyright (c) Cypress Semiconductor 2004-2007. All Rights Reserved.
it seems that i cant put all the page here

regards!!!]]>
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Re: Cant place user modules sometimes! http://www.cypress.com/?rID=41284 will be included.]]> -0600 Re: Cant place user modules sometimes! http://www.cypress.com/?rID=41285 I tried Internet Explorer 8 and 7 but nothing changed!
Please help...]]>
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Re: Capsense design hangs I2C http://www.cypress.com/?rID=41357
This problem should not have occurred because once the I2C UM is placed it will be listed in the devices provided interrupts are enabled. Since, you are using System Level Design, so this thing is taken care of automatically. Please zip your project and attach it here.]]>
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Re: Capsense design hangs I2C http://www.cypress.com/?rID=41358 I'm having a similar problem,
Im using the 24894 with I2C on the ISSP pins,

Capsense with 16 buttons works fine transmitting the 16 raw values (12bit) if im using the CSD with PRS8 as clock source.
But if i use PRS16 or PRS8 with Prescaler the I2C bus never communicates.

With a demo board I ran into the same problem (well I think it was) a while back with the Bootloader I2C UM, I remember changing the I2C port to the other one (forget which one) and it worked.

I have tried starting from scratch but no luck.

I want more Resolution...
Cheers]]>
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Re: Capsense design hangs I2C http://www.cypress.com/?rID=41359
I'll provide you an example project and let me know if that helps or not]]>
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Re: Capsense design hangs I2C http://www.cypress.com/?rID=41360 In addition, I've just noted that changing the Module from PRS8 (working fine) to PRS16 (I2C dies) and back to PRS8 does not revive the I2C...
I'm not changing anything else but the Module using Right Click on UM -> Selection Options...]]>
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Re: Capsense design hangs I2C http://www.cypress.com/?rID=41361 Found it,
I ran a file differences check and notices Port 1 (where my I2C is was being set up differenly after changing the CSD Module)
The PSoC Designer still had the port on the screen labled, but in the properties it had reverted back to default, so my I2C SCL pin was not working at all.
So i changed the EzI2C Pin parameter to the other port, then back again, and it fixed the problem.


Cheers!]]>
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Re: CyFi PSoC Creator and PSOC 3/5 http://www.cypress.com/?rID=41596
Regards,
Sai]]>
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Re: CyFi development platforms http://www.cypress.com/?rID=41637
Regards,
Sai]]>
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Re: DAC offset http://www.cypress.com/?rID=41429
2. Check the Analog Power setting in global resources. The power should be equal to or greater than the power at which you run the DAC. For example, if you start the DAC at medium power, the Analog Power parameter should be "SC On / Ref Med" or "SC On / Ref High"]]>
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Re: DAC offset http://www.cypress.com/?rID=41430 Tnx for the suggestions. I managed to lower the offset to 40mV by lowering the DAC power setting to medium and lowering the buf setting to low.

Now i founded that i have another problem. My DAC pin has at startup a spike to 4V. Any idea how i can fix this?]]>
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Re: DAC offset http://www.cypress.com/?rID=41431
1. In the device editor, do not connect the analog output pin to the analog buffer. Just connect the output of the DAC to the analog bus and leave the buffer off.
2. In main.c first start the DAC and write 0x00. This will set the output of the DAC to AGND.
3. Now switch on the Analog buffer using the ABF_CR register.]]>
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Re: DAC offset http://www.cypress.com/?rID=41432 -0600 Re: DAC responds on UART interrupt http://www.cypress.com/?rID=41455 -0600 Re: DAC responds on UART interrupt http://www.cypress.com/?rID=41456 -0600 Re: DELETING USER MODULES. http://www.cypress.com/?rID=41465
Regarding diffAmp, there is no user module as such as a diffAmp, but an SCBLOCK user module can be configured as a Differential Amplifier.

#pragma directives are special keywords, used for various operations. For example:

1. #pragma abs_address and #pragma end_abs_address can be used to place specific values in the Flash in specific locations. Check out my below blog post which has details of this pragma
http://www.cypress.com/?rID=38632

2. #pragma fastcall16 - This pragma is used to tell the compiler that certain assembly functions follow the fastcall16 rule of passing variables and returning results. When compiler sees this pragma, it will use certain methods to pass variables when calling the function.

All other pragmas will also have similar uses depending on the situation.]]>
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Re: Datalogging from the FirstTouch Kit http://www.cypress.com/?rID=41124
The simplest method I can think of is using the test points and utilizing them for transmitting data to PC via hyper terminal. If you'll look at the schematic of the FTPC bridge, then you'll observe there are some test voltage points: TV2, TV3, TV4, TV5. These are connected to P0[2:5]. You can pull out wires and implement UART protocol on these lines. Hope this will help.


]]>
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Re: Datalogging from the FirstTouch Kit http://www.cypress.com/?rID=41126
You can not use program any other device apart from CY8C21434. The programming dongle is programmed in such a way that it'll program only and only CY8C21434. For programming other devices you have to use either Miniprog, CY32107 ISSP Programmer or CY3215 ICE Cube kit.]]>
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Re: Difference between http://www.cypress.com/?rID=41252 > Clean " menu. That should remove any references to the missing user module. If this does not work, then this should be a bug with the PSoC Designer. Please let me know the results so that a bug report may be created to fix this.]]> -0600 Re: Difference between "Clone" and "Save As" options of PSoC Designer 5.0 sp2 http://www.cypress.com/?rID=41247
Clone: This option is used to create same project with another device.

e.g.: you created one project with CY8C27443 and now you want to move to CY8C29466. You can "CLONE" your project for CY8C29466.


Save As: This option is used to save project with different name.


Cheers,
Brijesh
]]>
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Re: Difference between "Clone" and "Save As" options of PSoC Designer 5.0 sp2 http://www.cypress.com/?rID=41248
Thank you very much for your response.

Kind Regards,
Trainee]]>
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Re: Difference between "Clone" and "Save As" options of PSoC Designer 5.0 sp2 http://www.cypress.com/?rID=41249
My Pleasure!

Clonnig is cool stuff.

If you are interested to know more, here you go:

http://www.cypress.com/?app=se...0&applicationID=0&l=0

Cheers,
Brijesh]]>
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Re: Difficulty in Debugging http://www.cypress.com/?rID=41218 -0600 Re: Difficulty in Debugging http://www.cypress.com/?rID=41219 -0600 Re: Difficulty in Debugging http://www.cypress.com/?rID=41220
Thanks graa and sgup. Turns out I was using SP4a. Have switched to SP4.5. Problem Solved]]>
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Re: Downloading PSoC firmware in the field http://www.cypress.com/?rID=41321 -0600 Re: Downloading PSoC firmware in the field http://www.cypress.com/?rID=41322
I have written a small but powerfull UART bootloader. It is still in development phase, and I am writing an application note for it.

You can have a preview of the bootloader application note:
www.nooteboom.biz/downloads/PSoC1 UART Bootloader Application Note.pdf

Please PM me if you have any questions.

Best regards,

Rolf]]>
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Re: Downloading PSoC firmware in the field http://www.cypress.com/?rID=41323 http://www.psocdeveloper.com/f...wtopic.php?f=3&t=5658

Regards,
Rolf]]>
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Re: ERROR: C:\DESIGN01\DESIGN01.CYDSN\GENERATED_SOURCE\PSOC3\ADC_DELSIG_2.C:70: 'CyIntSetPriority': requires ANSI-style prototype http://www.cypress.com/?rID=41765
We made an error in Beta 3 where the ADC became incompatible with the cy_boot component. The cy_boot is a hidden component that is always present in your designs. The tool puts it there for you and does not allow you to delete it. It allows us to support version control over the boot code we generate during a build.

If you use the Project menu you'll see an item to "Update Components (Design01)". Click on that and use the dialog to update your cy_boot component to the latest. Rebuild and, with luck, the problem will go away.

FYI - guessing from the name of the component I suspect you may have two ADCs in the design. If so, you'll get a build error as there is only one delta sigma available in the device.

-- yfs]]>
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Re: FILES TO COMPILE IN PSOC DESIGNER http://www.cypress.com/?rID=41458
1. Open PSoC Designer
2. Create a New Project using File >> New Project menu
3. Select System Level / Chip Level designing.
4. Give a name to the project and select a device. Select programming language
5. Now, PSoC Designer will create boot.asm and main.c or main.asm according to the programming language selected.
6. Also, the PSoC Designer will open device editor.
7. Select and place user modules. Configure user modules, global resources
8. Generate Application. This will generate all the user module source files
9. Open main.c and add application code
10. Build application.
11. Connect the MiniProg (or any other programmer) to the PC. Using the Program Device menu, download the program to the device

If you want to add your own source file other than main.c, then use the File >> New File menu, select .c or .h file and provide a name. This will create the required source file. Then you can write code in this source file.

The below video shows the complete project creation / programming cycle for the PSoC.

http://www.youtube.com/watch?v=XhJxlZkFf7s

Let me know if you have any issues.]]>
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Re: Finger press at start up. http://www.cypress.com/?rID=41336
Method #1: By knowing the approx. difference between the raw counts (without finger) of buttons in advance and then using this to detect the finger press at the start up. Limitation: It won't be able to detect if both the buttons are pressed.

Method #2: Instead of using the physical button, use a dummy sensor which will be placed in software not in hardware. Then applying the above mentioned method.

Method #3: Instead of detecting the finger press, detect the finger release. Whenever the finger will be released the baseline will snap down to a lower value. If this difference is greater than finger threshold then it can be inferred as that there was a finger press. Limitation: We need to decide the time that till when we are going to check this baseline.

Is there any other idea?]]>
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Re: Finger press at start up. http://www.cypress.com/?rID=41337
It is possible to check finger press on power up in CapSense Express device also.

Normally CapSesne Express device are used with Host controller. Host controller can read the register and compare the raw count of different buttons to check finger press on power up. It is prerequisite to have both button size same, so in normal condition they give same raw counts.

Cheers,
Brijesh]]>
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Re: From FirstTouch Kit programming http://www.cypress.com/?rID=41125 I have some quarries :
1. what is the minimum connection require?
2.Can I able to Program cypress CY8C21234 using cypress first Touch 3270?
3.when I try to program one message is come "device ID 00 FF 01 FF is not
in Data base" What's the meaning of these?

Please suggest me how to solve the problem.

regards
piyush]]>
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