• Flexible input sources
• Output signal latching
• Flexible functionality configuration

The Comparator User Module (COMP) provides a digital output representation of the comparison of two signal levels. The input signals can be external signals multiplexed through the analog column mux, internal signals, and fixed or adjustable reference voltages. It provides a number of standard structural options with considerable flexibility in connection, threshold limits, and noise rejection.

The COMP user module is constructed as a MUM (multi user module). The MUM lists the name, brief description, simplified schematic, and input/output waveforms. The MUM schematic is at the "system" level. It does not show physical interconnections.

In Figures 1 and 2, points A and B are the Rsense pads and points C and D are the input pins to the current sensing amplifier, CSPx (+ve) and CSNx (-ve) respectively.

Figure 1 shows a correct design.The sense lines are connected to the inner edges of the Rsense pads. Also, traces A-C and B-D are symmetrical with the same length and thickness This ensures that the voltage across Rsense is the same as the difference between. CSPx and CSNx.

Figure 1: Correct Design

Figure 2 shows an incorrect design. If you tried to maintain 100mV across the sense lines, the actual voltage across Rsense would be less than 100 mV due to the voltage drop across A-X and B-Y. The measured current would be less than actual.

Figure 2: Incorrect Design

For further information refer to PowerPSoC(R) – Hardware Design Guidelines.

Please contact Innovatech Switching Power India Pvt. Ltd. to buy evaluation boards shown in this applicaiton note. Please refer http://ispipl.com/contact_us for more information.

The video demonstrates a PowerPSoC based battery charger and LED controller for standalone solar electric systems.

PowerPSoC product family provides a highly integrated platform for designing intelligent LED driver circuits that can be used in small form factors such as MR-16. This application note describes the design of a DMX512-enabled LED driver circuit for MR-16 using PowerPSoC. The application note also gives a top level description of the MR-16 fixture and the LED driver board reference design. It also briefly explains the board bring up and operation procedure. The application has an associated code example, which has sample firmware for multicolor lamps and tunable white light systems with DMX512 interface using PowerPSoC. A brief descirpion of the code example is also included in the applicaiton note.

PowerPSoC(R) - Designing LED Driver Circuits For MR-16 Lamps With DMX-512 Interface

Features and Overview

• 6-bit to 14-bit resolution
• Data in unsigned or signed 2’s complement formats
• Maximum sample rates of 65,500 sps at 6 bit resolution, 7812 sps at 14-bit resolution
• Sinc2 filter fully implemented in hardware reduces CPU overhead and anti-alias requirements
• 1st-Order or 2nd-Order modulator for improved signal-to-noise ratio, user selectable
• Input range defined by internal and external reference options
• Requires no digital blocks

• 6-bit resolution with 32X oversampling to 14-bit resolution with 256X oversampling
• Data in unsigned or signed 2’s complement formats
• Maximum sample rates of 65,500 sps at 6 bit resolution, 7812 sps at 14-bit resolution
• Sinc² filter fully implemented in hardware reduces CPU overhead and anti-alias requirements
• 1st-Order or 2nd-Order modulator, user selectable
• Input range defined by internal and external reference options
• Optional synchronized PWM Output

The DelSig is an integrating converter, requiring from 32 to 256 integration cycles to generate a single output sample. Changing multiplexed inputs, invalidates the first two samples following the change.

• The 8-bit general purpose counter uses one PSoC block
• Source clock rates up to 48 MHz
• Automatic reload of period on terminal count
• Programmable pulse width
• Input enables/disables continuous counter operation
• Interrupt option on compare output or terminal count
   

The 8-Bit Counter User Module provides a down counter with a programmable period and pulse width. The clock and enable signals can be selected from any system time base or external source. Once started, the counter operates continuously and reloads its internal value from the period register upon reaching terminal count. During each clock cycle, the counter compares the current count to the value stored in the compare register. Each clock cycle, the Counter tests the count against the value of the compare register for either a “less than" or “less than or equal to" condition. The comparator output provides a logic level that may be routed to pins and to other user modules. Most PSoC device families also permit the terminal count output to be routed in the same manner.

• Scan 1 to 46 capacitive sensors.
• Sensing possible with up to a 15 mm glass overlay.
• Proximity detection to 20 cm with a wire-based sensor.
• High immunity to AC mains noise, EMC noise, and power supply voltage changes.
• Supports different combinations of independent and slide capacitive sensors.
• Double slide sensor physical resolution using diplexing.
• Increase slide sensor resolution using interpolation.
• Touchpad support with two slide sensors.
• Sensing support through high resistive conductive materials (ITO films for example).
• Shield electrode support for reliable operation in the presence of water film or droplets.
• Guided sensor and pin assignments using the CSD Wizard.
• Integrated baseline update algorithm for handling temperature, humidity, and electrostatic discharge (ESD) events.
• Easily adjustable operational parameters.
• PC GUI application support for raw data monitoring and parameter optimization in real time.
   

The Capacitive Sensing using a Sigma-Delta Modulator (CSD) provides CapSense® functionality using the switched capacitor technique with a sigma-delta modulator to convert the sensing switched capacitor current to digital code.

Features

• Integrated power peripherals
• M8C CPU core
• Advanced peripherals (PSoC® Blocks)
• Programmable pin configurations
• Flexible on-chip memory
• Complete development tools
• Applications
• Device options
• 56-pin QFN package
• For more, see pdf
   

PowerPSoC® Functional Overview

The PowerPSoC family incorporates programmable system-on-chip technology with the best in class power electronics controllers and switching devices to create easy to use power-system-on-chip solutions for lighting applications.

All PowerPSoC family devices are designed to replace traditional MCUs, system ICs, and the numerous discrete components that surround them. PowerPSoC devices feature high performance power electronics including 1 ampere 2 MHz power FETs, hysteretic controllers, current sense amplifiers, and PrISM/PWM modulators to create a complete power electronics solution for LED power management.

The CY3268 PowerPSoC™ Lighting Starter Kit demonstrates the ability of PowerPSoC to create scalable LED management solutions. The PowerPSoC family of devices features high performance power electronics including 1A, 32V rated power FETs, hysteretic controllers, current sense amplifiers, and PrISM™ technology to create a complete solution for LED power management. PowerPSoC also features Cypress’ CapSense technology that can be used to design differentiated lighting applications.

This kit also enables designers to test and evaluate preliminary designs using PowerPSoC and understand the design flow using PSoC Designer™ software for the PowerPSoC device family.

Kit Contents

The CY3268 PowerPSoC Lighting Starter Kit contains:

• CY3268 PowerPSoC board
• 12 V, 1 A power supply
• Two jumper shunts
• Five PowerPSoC CY8CLED04D01-56LTXI samples
• Kit CD, which includes:
  • PSoC Designer
  • PSoC Programmer
  • Demo firmware
  • Design files
  • Related documents

Featuring:

• Kit default firmware demonstrates HB-LED control with intelligent color mixing using PowerPSoC
• Debug capability provided by the PowerPSoC On Chip Debugger (OCD) device and RJ-45 jack that connects to CY3215DK ICE Cube Emulation Kit (sold separately)
• Access to all Function I/O pins of PowerPSoC for additional design and debug capability
• Cypress CapSense technology with 5 on-board capsense buttons
   

Software Title	Description	Link
PSoC Designer	This kit requires PSoC Designer for development
PSoC Programmer	This kit requires PSoC Programmer for programming

The attached document describes how to implement software compensation to minimize the temperature-dependent drift of the Internal Main Oscillator (IMO) frequency in a PowerPSoC^® device.  Two Point Oscillator Trim algorithm, which improves the accuracy of the PowerPSoC’s IMO frequency across a wide temperature range is described. It explains the algorithm’s basic operation, including the generation of a dynamic trim code.

Also attached is an example project ‘IMOTrimProject’ which implements the Two Point Oscillator Trim algorithm.

The CY3267 PowerPSoC^® evaluation board has two devices – CY8CLED04D01 (PowerPSoC) and CY8C24894 (CapSense^® enabled PSoC^® 1). The CapSense buttons on the board are connected to the CY8C24894 and the LEDs on the daughter card are controlled by the CY8CLED04D01. The communication between these two chips is through I²C.

The attached example projects aim to configure the CapSense buttons to control the LEDs. I²C communication is used between the two devices to communicate the status of the CapSense buttons. For a detailed explanation of the projects and the instructions to use the same, refer the attached document.

The PowerPSoC^® controllers contain the analog input multiplexer (AINX) block which provides the capability to route the output of current sense amplifiers (CSA) to the analog blocks. The analog blocks can be configured as an ADC and used to measure the current through the channels.

The attached example project demonstrates how the current through any of the channels can be monitored using the AINX block, using the CY3268 PowerPSoC demonstration kit. For a detailed explanation of the projects and the instruction to use the same, refer the attached document.

The CY3267 PowerPSoC Lighting Evaluation Kit contains:

• CY3267 PowerPSoC main board
• CY3267 LED daughter board
• 12 V, 2 A power supply
• Optical diffuser
• Retractable USB cable
• CY3217-MiniProg1 Programmer
• 5 PowerPSoC CY8CLED04D01-56LTXI samples
• Quick Start Guide
• Kit CD which includes
  • PSoC Designer
  • PSoC Programmer
  • Intelligent Lighting Control GUI
  • Demo firmware
  • Design files
  • Related documents

Featuring:

• Out-of-box evaluation experience using the PowerPSoC Main Board, RGBA LED daughter card and Intelligent Lighting Control GUI, all included in the kit
• Kit default firmware demonstrates HB-LED control with intelligent color mixing using PowerPSoC
• Interface to custom LED daughter boards through screw terminals from the PowerPSoC mother board
• Flexible  input voltage options (7 V to 32 V)
• Debug capability provided by the PowerPSoC On Chip Debugger (OCD) device and RJ-45 jack that connects to CY3215DK ICE Cube Emulation Kit (sold separately)
• PC USB connectivity through on-board USB controller
• CY3271 FirstTouch RF Kit* Connector
• CyFi Radio Module* Connector
• Access to all Function I/O pins of PowerPSoC for additional design and debug capability

While the Main Board provides connectors for CY3271 FirstTouch RF Kit and the CyFi Radio Module, these are not enabled in the kit default firmware. You can also develop firmware to add a DMX512* or DALI* interface to PowerPSoC and use the 5-pin header J12 to connect to a suitable external interface circuit.

* - Communications hardware not included; contact applications support for assistance

Software Title	Description	Link
PSoC Designer	This kit requires PSoC Designer for development
PSoC Programmer	This kit requires PSoC Programmer for programming

Please refer CY3267 BOM at www.cypress.com/?rID=36571 to check the inductor to use for built-in switching regulator.

You can also refer to Switching Regulator section of the TRM at www.cypress.com/?rID=35366 for more information on the built-in switching regulator for PowerPSoC devices.

Current sense traces routed differentially will have similarly length and similar voltage loss due to bias current into the CSA pins on the PowerPSoC. The traces routed differentially will also minimize any effect from signal crosstalk or coupling. Any coupling will affect differentially routed traces equally as the coupling net couples equally to the differential traces.

For PowerPSoC , no pods are available. Instead, the OCD[On Chip Debugger] part CY8CLED04DOCD1 has to be used.

1. AN52525 : Implementing a DALI Receiver System Using PowerPSoC

2. AN47615 : Implementing DALI Receiver using EZ-Color(TM) Intelligent Lighting Controllers

When the Built-in Switching Regulator is used, it is imperative to connect the output of the 5V regulator to Vdd and AVdd externally to power up the PowerPSoC device. This is when the PowerPSoC device gets its power on the Vdd and AVdd pins.

The component values for the schematic are given below. Please find the schematic in attached document.

CIN = 1 μF, X7R
L = 47 μH, +/-10%, 1.5 A rated saturation current
Rsense = 0.5 Ω, 0.1W
Rfb1 = 2 KΩ, 1%, 0.1W
Rfb2 = 698 Ω, 1%, 0.1W
Rcomp = 20 KΩ, 5% or better, 0.1W
Ccomp = 2200 pF,
C1 = 10 μF, X7R with ESR >= 0.1Ω

In the event of fast power supply ramp (faster than 15V/ms), or with small LED loads, the parasitic capacitances could cause the internal MOSFET to be in an ON state for short periods of time at system startup. This is because the PowerPSoC MOSFET is at an interface between the multiple power supply domains (GDVDD, HVDD), and the differences between these respective ramp rates is the potential reason for this condition.

For more information, please refer to the sub-section “Power Supply Sequencing” in Technical Reference Manual for the CY8CLED family.  This TRM can be found in the Help >> Documentation menu inside PSoC Designer.  The file name is TechnicalReferenceManual_CY8CLED04DXX.pdf.

The input power supply (HV domain) should not ramp to its final state faster than 1 μs.

The component values for the schematic are below. 

CIN = 1 μF, X7R

L = 47 μH, +/-10%, 1.5 A rated saturation current

Rsense = 0.5 Ω, 0.1W

Rfb1 = 2 KΩ, 1%, 0.1W

Rfb2 = 698 Ω, 1%, 0.1W

Rcomp = 20 KΩ, 5% or better, 0.1W

Ccomp = 2200 pF,

C1 = 10 μF, X7R with ESR >= 0.1Ω

 So I_avg = 300 mA.

 Hence I_peak = 1.2 x I_avg = 360 mA and I_valley = 0.8 x I_avg = 240 mA

 Let the,

sense resistance value R_sense = 0.22 W

gain of CSA be 20 and,

the 8-bit DAC be set at a resolution of 2.6V/10mV.

 Current sense voltage V_peak = I_peak x R_sense = 360 x 0.22 = 79.2 mV.

 Similarly V_valley= I_valley x R_sense = 240 x 0.22 = 52.8 mV.

 Corresponding to V_peak and V_valley, the output of CSA would be the gain multiplied by the voltage.

 Hence,

                        V’_peak = V_peak x 20 = 1.584 V and

                        V’_valley= V_valley x 20 = 1.056 V.

Now, the peak or upper limit DAC reference is calculated as,

REF_upper = (V’_peak/2.6) x 256 = 156

Similarly, valley or lower DAC reference is,

REF_lower = (V’_valley/2.6) x 256 = 104

Bits 5 to 4: PAMUX_S4:

‘00’ CSA_OUT0 input is multiplexed to AINX.

‘01’ CSA_OUT1 input is multiplexed to AINX.

‘10’ CSA_OUT2 input is multiplexed to AINX.

‘11’ CSA_OUT3 input is multiplexed to AINX.

For more info on this register, refer the PowerPSoC Technical Reference Manual.

The default value of this register results in CSA0 being multiplexed to the AINX. If the intent is to scan only one CSA input and not monitor more than one dynamically, then the input to the AINX Mux can be setup in the Global Resources Tab in the Chip Editor View of PSoC Designer.

1.   It acts as the interface between the PC based Intelligent Lighting Control GUI and the PowerPSoC, by acting as an USB-I2C bridge. It takes the instructions from the PC over the USB interface and communicates the same to PowerPSoC over I2C.

2.   The two Capsense buttons on the board are connected to the CY8C24894 .

The Hex file provided with the kit for CY8C24894 implements both the functionalities.

To measure the value place an ADC and route the signal from the column to it for further digitization. Please refer "CE62288 - PowerPSoC® - Measuring channel current using the Analog Input Multiplexer (AINX)" at http://www.cypress.com/?rID=49579 for details.

Therefore, a PowerPSoC based system must be brought up in a deterministic manner that gradually increases the system voltages and currents, after ensuring that the microcontroller and PSoC core in the PowerPSoC device have been verified to be functioning. The attached document discusses the necessary steps and precautions to perform such a system bring-up on a general level.

1. Go to www.cypress.com.  On the top right, you will see a “Keyword / Part Number” search box (adjacent to “Contact Us.”) 

2. Select the “Part Number” tab above this text box.

3. Type the exact part number, for example CY8C29466-12PVXE.

4. The part number will be listed in the search results page.

5. Click on the part number link (1st column starting from the left). This will open a new web page.

Moisture Sensitivity Level (MSL) can be found by clicking the “Quality & Pb-free Data” link on the top, or by just scrolling down to the Quality & Pb-free Data” section about half way down the page.

All other Quality information for this part number (e.g., RoHS compliance, Lead/Ball Finish, Qualification Reports, IPC reports) can also be found on this web page. 

In case of any questions, or if the information is not available for a particular part number, please create a support case at www.cypress.com/support

If you do not know the Cypress part number: 

1. Go to www.cypress.com.  Browse the different products (“Products” tab on the top navigation menu) by family.

2. Once you choose the relevant product family (e.g., “Clocks and Buffers->Clock Distribution,” “Memory->FIFOs”), scroll down the particular page to get to the “Parametric Product Selector.”

3. Use this tool to find the part number by function/feature, and click on the part number you are interested in. This will lead you directly to step # 5 above.

Figure 1. MR-16 Lamp & Fixture Internals

Cypress has developed a reference design for a compact LED driver solution, made to fit inside the MR-16 fixture, as shown in the figure above. The solution includes support for up to four channels of LEDs, such as in tunable white light systems. The driver board uses PowerPSoC for providing a constant current power supply for the LEDs and integrated intelligence for multi-channel LED control. The solution also integrates DMX512 communication, which provides flexibility to network multiple fixtures but maintaining individual control for each fixture.

The following table lists the specifications of the four-channel PowerPSoC solution. Figure 2 below shows pictures of the reference design board.

Table 1. PowerPSoC MR16 Fixture Controller Specifications

Figure 2. Fixture Controller Board

Complete design files for the reference design board shown above are available along with the application note AN56581. The design files include schematics, netlist, gerber files, BOM and sample firmware code examples.

There is a specific lot of the CY3267/CY3268 kits where in these two issues are encountered, which is due to a minor discrepancy in the SROM of the PowerPSoC on the board. Please note this issue is seen only on a small percentage of the CY3267/CY3268 and except for the issue with the OCD and the EEPROM, the rest of the functionalities work fine on these boards. 

If you have one such CY3267/CY3268, please raise a Technical support case, preferably specifying the below details :

1.When was the kit purchased?

2. Where was the kit ordered from?

3. What is the lot number of the kit?

The lot number information can be found at the bottom side of the kit. We will cross check if the kit belongs to the affected lot and replace it as soon as possible.

After power cycling the CY3267, the PC-based application triangle and black dot intermittently relocate to the bottom of the x and y axis.

Workaround: None needed. PC-based application will continue to function.

Unhandled Exception error by hitting the Color CapSense button multiple times.

Workaround: Hit Continue at the error dialog. The application will continue to work OR Restart PC application.

The PC-based application does not support 64-bit versions of XP and Vista.

Workaround: Check http://www.cypress.com for availability of 64-bit USB support.

PC restart/standby/hibernation breaks communication with the CY3267.

Workaround: Power cycle CY3267.

Disconnecting and reconnecting the USB cable to the CY3267 can cause small gaps to appear in the black triangle on the color gamut on the PC.

Workaround: None needed. PC-based application will continue to function. 

Figure 1. Solar powered street light

Solar panels consist of photovoltaic cells that use light energy from the sun to generate electricity through photovoltaic effect. Maximum Power Point Tracking, referred to as MPPT, is an electronic system that operates the photovoltaic modules in solar panels to produce maximum power. MPPT varies the electrical operating point of the modules and enables them to deliver maximum available power. MPPT can be used in conjunction with a mechanical tracking system, but the two systems are completely different.

Cypress’ MPPT Solar Charge Controller is a battery charger and load controller with integrated LED driver, which features a smart tracking algorithm that maximizes energy harvest from solar panels. It is designed using Cypress’ PowerPSoC and uses the device’s integrated hysteretic controllers, its dedicated modulators, and PSoC core to implement the MPPT smart tracking algorithm, as well as the constant current LED driver circuit.

Table 1 below shows the specifications of the MPPT Solar Charge Controller Reference Design:

The block diagram of the integrated solar charger and LED driver is shown in Figure 2. Power delivered by the solar panel is converted to a voltage level that can drive charging current into the battery. PowerPSoC generates the necessary control signal to drive a synchronous buck converter that converts the solar panel power to charge the battery. The MPPT algorithm embedded in the PowerPSoC takes voltage and current feedback from the panel and adjusts the control signals to operate the panel at its peak power. The PowerPSoC also monitors the battery charging process and provides status information based on battery condition and load switch status.
 
The application described below also integrates two channels of LED drivers. The first channel is configured in a floating load buck topology rated at 8V, 1A. The second channel is configured in a boost topology rated at 40V, 1A. The user can select between these two LED driver channels to drive LEDs with power from the batteries. The firmware in the attached code example is designed to operate one LED driver channel at a time. The solar charge controller also has board-level protection features that protect the board from battery short circuits, battery open, and battery/panel reverse connections.

Figure 2. MPPT Solar Charge Controller Block Diagram

Please contact Innovatech Switching Power India to purchase samples of this reference design board.
Please refer http://ispipl.com/contact_us for more information.

Cypress' application note AN52209 - PCB Guidelines for PowerPSoC as a LED Driver is a very good document to review. Even if you are familiar with PCB design for power electronics, AN52209 is a good knowledge refreasher.

1) The power blocks are not populated or started - In this case, the internal FET will remain off and the external gate driver will be pulled to ground thereby keeping any external FET connected off.

2) The power blocks are populated and started - If the hysteretic controller is started before the Current Sense Amplifier (CSA), then for a brief period, there is an indeterminate signal going as feedback into the hysteretic controller. This could possibly switch the FET ON (or keep the external gate driver on) for a long period until the CSA powers up and the correct feedback is received. This is potentially a dangerous situation as the current could rapidly increase through the FET.

For this reason, the CSA should always be turned on before the hysteretic controller and the hysteretic controller should never be turned on without a proper feedback connection.

asm (“mov A, 05”);

For more info on inline assembly, refer the ‘C Language User Guide’ in the Help >> Documentation menu in PSoC Designer.

First location at: Tools->Options->Build->Compiler
Second location at: Project->Settings->Build->Compiler

please go to http://www.cypress.com/?app=distiInventory&source=header  or www.cypress.com -> Buy -> navigate to Device(Distributors), search by typing "CY3250-Flexcable" in the Part Number field, the available inventory will be there.

Response:

PSoC Programmer 3.12 (Beta and Production) and beyond underwent a minor database restructuring to accommodate updates from PSoC Designer 5.1 Beta and FCS releases. This update will cause errors when programming using PSoC Programmer 3.12 coupled with PSoC Designer SP6 and earlier versions.

Impacted Devices:

The following table details the device families that the user will experience this error:

Solution:

The customer can perform three tasks to solve this issue.

First, the customer may upgrade their designer installation to PSoC Designer 5.1 Beta 2 or FCS and later.

Second, the user may use the stand alone version of PSoC Programmer instead of the Embedded programmer.

Third, the user may roll back the PSoC Programmer installation to version 3.11. The user may roll back from the PSoC Programmer 3.12 Beta or greater release by using the CyInstaller Update Manager. The user can perform the following steps:

• Open up the CyInstaller Update Manager from the Start Menu.
• Select Configure
• Navigate CyInstaller to the installation type section and select, Custom, and click, next.
• From the drop menu select PSoC Programmer 3.11 and click next.

CyInstaller will roll back the user’s installation to the PSoC Programmer 3.11.

Summary:

This knowledge based article details to the user the solution to the embedded programmer programming failures when using PSoC Designer 5.0 SP6 with versions of PSoC Programmer 3.12 Beta and older.

See the attached Hirose20PinDescription.jpg file for the pin description of this connector.

The schematic of CY3250 flex cable can be viewed at this link:- http://www.cypress.com/?docID=2975

These connections can also be verified by checking the continuity between pin nos. 4,5,8,9,12,13,16,17 as all of them are grounded. 

This problem may be because of slow internet connection.

The workaround is to use ISO file of the Designer, it can be downloaded by clicking on "PSoC Designer" under "Software" from our website.

After downloading the ISO file, burn it on a CD and this CD can be used for installing Designer without the need of internet connection.

Solutions Enable Tunable White Lighting with Highest-lumen LEDs

SAN JOSE Calif., January 12, 2009 - Cypress Semiconductor Corp. (NYSE: CY) is greatly simplifying design of RGB-based white lighting LED systems with Cree XLamp® LEDs. Using Cypress's PSoC Designer™ 5.0 visual design software and the CY3265C-RGB evaluation kit, designers can simply input the selected XLamp device; select bin specifications through easy-to-use drop-down menus; and select white light temperature points as well as specific color points for optimal reproduction of any type of desired light output - without having to write a single line of firmware. Lighting designers no longer need to be experts in LED binning and temperature specifications. Instead they can focus on desired lighting effects, bringing solutions to market more quickly and efficiently.

Cypress's intelligent lighting solutions simplify white lighting designs by giving users the ability to select white light temperatures points on a gamut in PSoC Designer 5.0 software. Cypress has integrated the XLamp device specifications and temperature characteristics into the content library of PSoC Designer 5.0 software, which supports Cypress's EZ-Color™ LED controllers. With other LED controllers, engineers must input specific device binning and temperature performance data. Cypress has introduced the CY3265C-RGB evaluation kit enabling designers to begin simplified system design with XLamp LEDs.

"We are pleased to support Cree's XLamp portfolio with our intelligent lighting solutions," said Curt Davis, vice president of Cypress's PowerPSoC™ Business Unit, which includes Intelligent Lighting Solutions.  "Cree has earned a leadership position in bringing LED lighting to the mainstream, and our intelligent lighting solutions can simplify general illumination designs with the XLamp offerings."

Availability
The CY3265C-RGB evaluation kit provides the firmware to support XLamp LEDs. The kit comes with a daughter card featuring XLamp LEDs, and includes a MiniProg, a 5v LCD display, a USB cable, a CD with PSoC Designer 5.0, Gerber files and schematics. The kit is available on the Cypress Online Store at www.cypress.com and from authorized distributors.

About Cypress's Intelligent Lighting Solutions
LED lighting design requires a complex set of calculations with custom firmware to deliver consistent color. The two biggest problems that LED lighting engineers face are having to account for differing LED performance specifications based on manufacturing bins and the LEDs' degradation (such as output flux, wavelength etc.) over different temperatures. With PSoC Designer 5.0, designers simply select a color from a gamut presented on-screen. Pre-loaded manufacturers' bin specifications and choice of either temperature or optical feedback algorithms are automatically applied to the selected design and programmed into an EZ-Color controller. This can save anywhere from weeks to months of design time for a complex design.

EZ-Color LED controllers can support up to 16 LED strings, compared to four or five strings for competitive devices. The additional strings can mean a savings of dozens or even hundreds of controllers in very large designs, cutting design complexity, power consumption and board space. The EZ-Color LED controllers are powered by Cypress patent pending PrISM™ (Precise Illumination Signal Modulation) technology. The PrISM modulation technology significantly reduces low-frequency flicker and radiated electro-magnetic interference (EMI)-common problems in LED lighting designs. Designers also have the flexibility to add additional functionality to the EZ-Color controllers, including battery charging, motor control, thermal feedback, programmable control gear and other features.

About Cypress
Cypress delivers high-performance, mixed-signal, programmable solutions that provide customers with rapid time-to-market and exceptional system value. Cypress offerings include the PSoC® programmable system-on-chip, USB controllers, general-purpose programmable clocks and memories. Cypress also offers wired and wireless connectivity technologies ranging from its CyFi™ Low-Power RF solution, to West Bridge® and EZ-USB® FX2LP controllers that enhance connectivity and performance in multimedia handsets. Cypress serves numerous markets including consumer, computation, data communications, automotive, and industrial. Cypress trades on the NYSE under the ticker symbol CY. Visit Cypress online at www.cypress.com.

# # #

Cypress, the Cypress logo, PSoC, West Bridge and EZ-USB are registered trademarks, and PowerPSoC, EZ-Color, PrISM, PSoC Designer and CyFi are trademarks of Cypress Semiconductor Corporation. All other trademarks are the property of their respective owners.

This article will explore several examples of differentiating what appears at face value to be a simple LED design. Each of these examples deserves far more space than can be devoted to here, but should serve as a starting point for additional creativity. The key to this step is the addition of basic intelligence to the circuit, generally in the form of a microcontroller. Intelligence is necessary to take advantage of what LEDs offer as much to white light designs as to color. To read more, click the download link below or visit Embedded.com.