Cypress.com: Documentation http://www.cypress.com/?app=search&searchType=advanced&id%3D2232 PSoC 3 Device Programming http://www.cypress.com/?rID=40740 Thu, 29 Jan 2015 00:07:12 -0600 PSoC Creator Training http://www.cypress.com/?rID=40547 PSoC 3 and PSoC 5 Workshops:

Introduction to PSoC 3
This half day workshop will give you hands-on experience using and developing PSoC3 and PSoC5 solutions utilizing Cypress's PSoC® Creator™ Software development environment and the PSoC Development Kit (CY8CKIT-001)

Introduction to PSoC 5
This half day workshop will give you hands-on experience using and developing PSoC 5 solutions utilizing Cypress's PSoC® Creator™ Software development environment and the PSoC Development Kit (CY8CKIT-001)

PSoC 3 and PSoC 5 Intermediate Workshop
This full day workshop provides in depth training on how to use the high precision and programmable analog, programmable digital and advanced CPU subsystems in your embedded designs. This workshop builds off of the first, half-day, Introduction to PSoC 3 and PSoC 5 Workshop and provides more in depth and hands-on training for you to fully understand these features and how to use them with the PSoC Creator integrated development environment.

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PSoC Videos:

PSoC Creator: Made for Engineers
Meet Alan Hawse, Executive Vice President of Software for Cypress, and his vision for PSoC Creator.

PSoC Today! Introducing PSoC 4 Part I
Special Guest Max Kingsbury kicks off a series introducing the PSoC 4 and the Pioneer kit.

PSoC 5LP Analog Design
Jim Davis, Product Marketing Manager for PSoC, introduces you to the analog design methodology of PSoC and PSoC Creator

For more PSoC videos visit our video library at video.cypress.com

PSoC On-Demand Training:

PSoC Creator 101 Lesson 1: Introduction to PSoC Creator 101
PSoC Creator 101 Lesson 2: Introduction to PSoC
PSoC Creator 101 Lesson 3: Getting to Know PSoC Creator
PSoC Creator 101 Lesson 4: Let's Get an LED to Blink Part 1
PSoC Creator 101 Lesson 5: Let's Get an LED to Blink Part 2
PSoC Creator 101 Lesson 6: Let's Get CapSense Working
PSoC Creator 101 Lesson 7: IDE Export
PSoC Creator 101 Lesson 8: PSoC Resources
PSoC Creator 101: PSoC Creator File Structure
PSoC Creator 101: PSoC 4200 Low Power Modes
PSoC Creator 101: PSoC 4200 Low Power Modes - Tips and Tricks
PSoC Creator 101: PSoC 4200 Low Power Modes - Using the Sleep Mode

Getting Started

Using the UDB Editor

Component Creation Tutorials


Component Development Training For PSoC using PSoC Creator

PSoC Creator 110: Schematic Components
PSoC Creator 111: Component Parameters
PSoC Creator 112: Intro to Component API Generation
PSoC Creator 113: PLD Based Verilog Components
PSoC Creator 210: Intro to Datapath Components
PSoC Creator 211: Datapath Computation
PSoC Creator 212: Datapath FIFOs
PSoC Creator 213: Multi-Byte Datapath Components
PSoC Creator 214: Datapath API Generation
PSoC Creator: Custom Components
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Wed, 28 Jan 2015 00:41:58 -0600
EZI2C Slave http://www.cypress.com/?rID=48917 Features
  • Industry standard NXP® I2C bus interface
  • Emulates common I2C EEPROM interface
  • Only two pins (SDA and SCL) required to interface to I2C bus
  • Standard data rates of 50/100/400/1000 kbps
  • High level APIs require minimal user programming
  • Supports one or two address decoding with independent memory buffers
  • Memory buffers provide configurable Read/Write and Read Only regions
Symbol Diagram

General Description

The EZI2C Slave component implements an I2C register-based slave device. It is compatible with I2C Standard-mode, Fast-mode, and Fast-mode Plus devices as defined in the NXP I2C-bus specification. The master initiates all communication on the I2C bus and supplies the clock for all slave devices. The EZI2C Slave supports standard data rates up to 1000 kbps and is compatible with multiple devices on the same bus.

The EZI2C Slave is a unique implementation of an I2C slave in that all communication between the master and slave is handled in the ISR (Interrupt Service Routine) and requires no interaction with the main program flow. The interface appears as shared memory between the master and slave. Once the EZI2C_Start() function is executed, there is little need to interact with the API.
 

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Tue, 27 Jan 2015 03:45:55 -0600
AN89611 - PSoC<sup>®</sup> 3 and PSoC 5LP – Getting Started With Chip Scale Packages (CSP) http://www.cypress.com/?rID=90919 This application note provides guidelines for using Cypress PSoC® 3 and PSoC 5LP devices in wafer-level chip scale packages (CSP). Included are instructions for using the I2C bootloader that is factory installed in these devices.

Introduction

Cypress is now offering its PSoC 3 and PSoC 5LP family of products in wafer-level chip scale packages (WLCSP, or CSP for short). These devices are designed to pack the maximum mixed-signal SoC capability per cubic millimeter. They feature package sizes as small as 4.25 × 4.98 × 0.6 mm to fit into tiny spaces on very small PCBs or flexible printed circuits (FPC). However, their small size mandates special manufacturing techniques and design considerations.

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Tue, 27 Jan 2015 03:12:52 -0600
SC/CT Comparator (SCCT_Comp) http://www.cypress.com/?rID=82358 Features Symbol Diagram
  • Output routable to digital logic blocks or pins
  • Selectable output polarity

General Description

The SC/CT Comparator (SCCT_Comp) component provides a hardware solution to compare two analog input voltages. The implementation uses a mode of the Switched Capacitor / Continuous Time (SC/CT) analog block to implement the comparator. The output can be digitally routed to another component. A reference or external voltage can be connected to either input. You can also invert the output of the comparator using the Polarity parameter.

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Tue, 27 Jan 2015 01:23:44 -0600
Power Monitor http://www.cypress.com/?rID=63922 Features

  • Interfaces to up to 32 DC-DC power converters
  • Measures power converter output voltages and load currents using a DelSig-ADC
  • Monitors the health of the power converters generating warnings and faults based on user-defined thresholds
  • Support for measuring other auxiliary voltages in the system
  • Support 3.3V and 5V chip power supply
Symbol Diagram


General Description

Power Converter Voltage Measurements:

For power converter voltage measurements, the ADC can be configured into single-ended mode (0-4.096 V range or 0-2.048 V range). The ADC can also be configurable into differential mode (±2.048 V range) to support remote sensing of voltages where the remote ground reference is returned to PSoC over a PCB trace. In cases where the analog voltage to be monitored equals or exceeds Vdda or the ADC range, external resistor dividers are recommended to scale the monitored voltages down to an appropriate range.

Power Converter Current Measurements:

For power converter load current measurements, the ADC can be configured into differential mode (+/- 64 mV or +/- 128 mV range) to support voltage measurement across a high-side series shunt resistor on the outputs of the power converters. Firmware APIs convert the measured differential voltage into the equivalent current based on the external resistor component value used. The ADC can also be configured into single-ended mode (matching the selected voltage measurement range) to support connection to external current sense amplifiers (CSAs) that convert the differential voltage drop across the shunt resistor into a single ended voltage or to support power converters or hot-swap controllers that integrate similar functionality.

PSoC Creator Power Monitor Component Video  

use for camtasia screencasts

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Tue, 27 Jan 2015 01:18:39 -0600
Mixer http://www.cypress.com/?rID=48920 Features
Symbol Diagram
  • Single-ended mixer
  • Continuous-time up mixing:
    • Input frequencies up to 500 kHz
    • Sample clock up to 1 MHz
  • Discrete-time, sample-and-hold down mixing:
    • Input frequencies up to 14 MHz
    • Sample clock up to 4 MHz
  • Adjustable power settings
  • Selectable reference voltage

General Description

The Mixer component provides a single-ended modulator. The Mixer component can be used for frequency conversion of an input signal using a fixed Local Oscillator (LO) signal as the sampling clock. The manipulations of signal frequencies that a mixer performs can be used to move signals between frequency bands or to encode and decode signals. A mixer can be used to convert signal power at one frequency into power at another frequency to make signal processing easier, typically shifting higher frequencies to baseband.

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Tue, 27 Jan 2015 01:13:45 -0600
Thermocouple Calculator http://www.cypress.com/?rID=69779 Features
  • Supports B, E, J, K, N, R, S, and T Type Thermocouples
  • Provides functions for thermo-emf to temperature and temperature to voltage conversions
  • Displays Calculation Error Vs. Temperature graph
Symbol Diagram

General Description

In thermocouple temperature measurement, the thermocouple temperature is calculated based on the measured thermo-emf voltage. The voltage to temperature conversion is characterized by the National Institute of Standards and Technology (NIST), and NIST provides tables and polynomial coefficients for thermo-emf to temperature conversion. The NIST tables and polynomial coefficients can be found in the following link:

http://srdata.nist.gov/its90/download/download.html

Thermocouple temperature measurement also involves measuring the thermocouple reference junction temperature and converting it into a voltage. The Thermocouple Calculator component simplifies the thermocouple temperature measurement process by providing APIs for thermo-emf to temperature conversion and vice versa for all thermocouple types mentioned above, using polynomials generated at compile time. The thermocouple component evaluates the polynomial in an efficient way to reduce computation time.

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Fri, 23 Jan 2015 07:25:54 -0600
Thermistor Calculator http://www.cypress.com/?rID=69783 Features
  • Adaptable for majority of negative temperature coefficient (NTC) thermistors
  • Look-Up-Table (LUT) or equation implementation methods
  • Selectable reference resistor, based on thermistor value
  • Selectable temperature range
  • Selectable calculation resolution for LUT method
Symbol Diagram

General Description

The Thermistor Calculator component calculates the temperature based on a provided voltage measured from a thermistor. The component is adaptable to most NTC thermistors. It calculates the Steinhart-Hart equation coefficients based on the temperature range and corresponding user-provided reference resistances. The component provides API functions that use the generated coefficients to return the temperature value based on measured voltage values.

This component doesn't use an ADC or AMUX inside and thus requires those components to be placed separately in your projects.

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Fri, 23 Jan 2015 07:21:22 -0600
Sample/Track and Hold Component (Sample_Hold) http://www.cypress.com/?rID=56758 Features Symbol Diagram
  • Two operating modes: Sample and Hold, Track and Hold
  • Four power mode settings

General Description

The Sample/Track and Hold component provides a way to sample a continuously varying analog signal and to hold or freeze its value for a finite period of time. It supports both Track and Hold and Sample and Hold functions, which can be selected in the customizer.

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Fri, 23 Jan 2015 07:15:35 -0600
8-Bit Current Digital to Analog Converter (IDAC8) http://www.cypress.com/?rID=48914 Features
Symbol Diagram
  • Three ranges 2040 μA, 255 μA, and 31.875 μA
  • Current sink or source selectable
  • Software- or clock-driven output strobe
  • Data source may be CPU, DMA, or Digital components

General Description

The IDAC8 component is an 8-bit current output DAC (Digital to Analog Converter). The output can source or sink current in three ranges. The IDAC8 can be controlled by hardware, software, or by a combination of both hardware and software.

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Fri, 23 Jan 2015 07:09:47 -0600
Digital Filter Block (DFB) Assembler http://www.cypress.com/?rID=60720 Features Symbol Diagram
  • Provides an editor to enter the assembler instructions to configure the DFB block and an assembler that converts the assembly instructions to instruction words.
  • Supports simulation of the assembly instructions.
  • Supports a code optimization option that provides a mechanism to incorporate up to 128 very large instruction words inside the DFB Code RAM.
  • Provides hardware signals such as DMA requests, DSI inputs and outputs, and interrupt lines.
  • Supports semaphores to interact with the system software and the option to tie the semaphores to hardware signals.

General Description

The digital filter block (DFB) in PSoC 3 and PSoC 5LP can be used as mini DSP processor and allows you to configure the DFB using assembly instructions. The component assembles the instructions entered in the editor and generates the corresponding hex code words, which can be loaded into the DFB. It also includes a simulator, which helps the user to simulate and debug the assembly instructions.

The DFB consists of a programmable 24*24 multiplier/accumulator (MAC), an arithmetic logic unit (ALU), shifter, and various program and data memory to store instructions and data. The DFB runs on the bus clock, and can interface with both CPU and DMA. It can be used to offload the CPU and can speed up arithmetic calculations that involve intensive multiply accumulate operations. Typical operations you can use the DFB component to implement include: vector operations, matrix operations, filtering operations, and signal processing.

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Fri, 23 Jan 2015 06:48:06 -0600
Controller Area Network (CAN) http://www.cypress.com/?rID=46443

Features
 

  • CAN2.0A and CAN2.0B protocol implementation, ISO 11898-1 compliant
  • Programmable bit rate up to 1 Mbps at 8 MHz (BUS_CLK)
  • Two-wire or three-wire interface to external transceiver (Tx, Rx, and Enable)
  • Extended hardware message filter that covers Data Byte 1 and Data Byte 2 fields
  • Programmable transmit priority: Round Robin and Fixed

 

Symbol Diagram

General Description

The Controller Area Network (CAN) controller implements the CAN2.0A and CAN2.0B specifications as defined in the Bosch specification and conforms to the ISO-11898-1 standard.

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Fri, 23 Jan 2015 06:25:40 -0600
AN84783 - Accurate Measurement Using PSoC® 3 and PSoC 5LP Delta-Sigma ADCs http://www.cypress.com/?rID=82678 AN84783 shows how to increase the accuracy of measurements using the 20-bit Delta-Sigma ADC in PSoC 3 and PSoC 5LP. You will learn effective resolution, gain and offset errors, nonlinearity, and accuracy improvement techniques. A spreadsheet is provided to help analyze ADC performance and optimize ADC Component configuration.

Introduction

Accurate measurement of physical quantities is important for many applications. In most measurement systems, you use a transducer to convert a physical quantity to a voltage. This voltage is sent through signal conditioning circuitry, if necessary, and then to an analog-to-digital converter (ADC).

The following table indicates the PSoC devices, PSoC Creator versions, compilers, and development kits that will work with this application note project:



Project
Device
PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Compiler
Architecture
Silicon
Revision
V2.2
V2.1/
2.0
001
DVK
030/050
DVK
003/014
FTK
Keil
GCC
RVDS
MDK

AN84783.zip

Prod
YES
NO
NO
YES
NO
YES
N/A
N/A
N/A
Prod
YES
NO
NO
YES
NO
N/A
YES
YES
YES
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Wed, 21 Jan 2015 06:04:03 -0600
CY8CKIT-017 CAN/LIN Expansion Board Kit http://www.cypress.com/?rID=40215

 

 

Features:

  • 1 CAN transceiver circuit
  • 2 LIN transceiver circuits
  • Communication status LED indicators

Kit Contents:

  • CY8CKIT-017 Quick Start Guide
  • CY8CKIT-017 CAN/LIN Expansion Board

Hardware Requirements:

IMPORTANT: This kit is an expansion kit that requires the user to have prerequisite hardware to use this kit. Therefore, please read over the hardware prerequisites carefully to ensure that all necessary prerequisite hardware is already available.

Hardware Prerequisites
Minimum
Recommended
CY8CKIT-001 PSoC Development Kit
CY8CKIT-001B **
 
One of the following:
  • Second CY8CKIT-001 kit and second CY8CKIT-017 kit
  • Third-party CAN bus analyzer or emulator tool
 
CY8CKIT-001B **
CY8CKIT-017 *A
 
Third-party LIN bus analyzer
 
Male-to-male straight-through DB9 cable
 

System Requirements and Recommendations:

Hardware/Operating System Requirements Minimum Recommended
Processor Speed 2 GHz 2 GHz Dual Core
RAM 2 GB 3 GB
Free hard drive space 1 GB 1 GB
Screen resolution 1024x768 1280x1024
CD/DVD drive
USB Full Speed 2.0 Hi-Speed
Windows XP (SP2 or higher), Vista, or Windows 7
Software Prerequisites Minimum Recommended
PSoC® Creator™ 2.1 Build 607 2.1 Build 607 or later
Microsoft Internet Explorer 7 7
Adobe Reader (for viewing PDF Documentation) 7 7 or later
Windows Installer 3.1  
.NET Framework 2.0 SP1  
PSoC Programmer 3.15.2 3.15.2 or later
Keil Compiler 8.16
8.16 or later
Software Title Description Link
PSoC Creator This kit requires PSoC Creator for development
PSoC Programmer This kit requires PSoC Programmer for programming
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Tue, 20 Jan 2015 15:03:04 -0600
AN57294 - USB 101: An Introduction to Universal Serial Bus 2.0 http://www.cypress.com/?rID=39327 AN57294 is a foundation for understanding the USB protocol, specifically focusing on the USB 2.0 specification. It is intended for those who are new to using USB in embedded designs, and for those who need to use and understand more advanced Cypress application notes.

Introduction

USB is an interface that connects a device to a computer. With this connection, the computer sends or retrieves data from the device. USB gives developers a standard interface to use in many different types of applications. A USB device is easy to connect and use because of a systematic design process.

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Mon, 19 Jan 2015 18:49:06 -0600
PSoC® 3 and PSoC® 5LP CapSense® Design Guide http://www.cypress.com/?rID=58549 This document provides guidance for designing CapSense® applications with the PSoC® 3 and PSoC® 5LP family of devices. It is intended for design engineers who are familiar with capacitive sensing technology and have chosen the PSoC 3 and PSoC 5LP family of devices for their applications.

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Mon, 19 Jan 2015 09:34:29 -0600
PSoC 3/4/5 Code Examples http://www.cypress.com/?rID=101641 The code examples linked in the table below are compatible with PSoC Creator 3.0 SP2. To access the latest code examples, follow the path File -> Example Projects in PSoC Creator. To build with a different version of PSoC Creator, first update the project components in Creator by following the path Project -> Update Components.

CE# Title Part# Description
CE95271 Delta Sigma ADC in Differential Mode with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP The ADC Differential project contains an example for the use of the ADC_DelSig component in differential mode. The input analog voltage fed to the ADC input terminal is converted to the corresponding digital value and this is displayed on the LCD module.
CE95272 SAR ADC in Differential Mode using Pre-Amplifier with PSoC 4 PSoC 4 (PSoC 4100, PSoC 4200) This code example demonstrates how to sample four different channels with Sequencing ADC, use Opamps to form a Differential preamplifier, and send results to HyperTerminal (PC) using UART.
CE95273 Delta Sigma ADC in single-ended mode using DMA and VDAC with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP This code example shows the usage of DMA with ADC and VDAC components. The ADC is configured in default single ended mode. The ADC EOC signal is connected to DRQ input of DMA. On each rising edge of EOC signal, ADC output is transferred to VDAC input register. VDAC converts this digital value to analog signal which can be measured using a multimeter.
CE95274 SAR ADC and PrISM with PSoC 5LP PSoC 5LP This datasheet code example demonstrates operation of the ADC_SAR (ADC Successive Approximation Register) and PrISM (Precision Illumination -Signal Modulation) components with the PSoC Creator Software. The ADC_SAR measurements are transferred using ISR and DMA to the PrISM and Character LCD components.
CE95275 Sequencing SAR ADC and Die temperature sensor with PSoC 4 PSoC 4 (PSoC 4100, PSoC 4200) This project demonstrates two channel measurements by the PSoC 4 sequencing SAR ADC, transferring results to the LCD and PWM using an ISR.
CE95276 Sequencing SAR ADC with PSoC 5LP PSoC 5LP This datasheet code example demonstrates the operation of the PSoC 5LP ADC SAR Sequencer.
CE95277 Delta Sigma ADC in single-ended mode with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP The ADC Single Ended mode code example demonstrates use of the ADC_DelSig component in single ended mode. The input analog voltage fed to the ADC input terminal is converted to the corresponding digital value and this is displayed on the LCD module.
CE95278 Basic Design project with PSoC 3/5LP PSoC 3, PSoC 5LP The BasicDesign project contains an example for use with the PSoC Creator Help tutorials: "Basic Design" and "Debugging a Design." This project and tutorials provide more details about working with a design, including pins, clocks, and interrupts. They also provide a simple example that can be used with the debugger.
CE95279 Boost Converter with PSoC 3/5LP PSoC 3, PSoC 5LP This datasheet code example demonstrates operation of the BoostConv (Boost Converter) -component with the PSoC Creator Software. code example demonstrates the usage of the Boost Converter component as a power source for a PSoC chip.
CE95280 Bootloadable Project with PSoC 4 PSoC 4 This code example demonstrates the basic operation of the Bootloader and Bootloadable components. This is the bootloadable application project. Refer to the Bootloader_PSoC4_code example for the bootloader application.
CE95281 Bootloader Project with PSoC 4 PSoC 4 This code example demonstrates the basic operation of the Bootloader and Bootloadable components. This is the bootloader application project. Refer to the Bootloadable_PSoC4_code example for the bootloadable application.
CE95282 CAN as Control Node with PSoC 3/5LP PSoC 3, PSoC 5LP The CANExampleControl code example demonstrates use of the CAN Component. CAN Configuration, transmitting and receiving Full messages, and handling Tx and Rx errors are demonstrated. For additional information on use of the CAN component also refer to the CANExampleRemote project.
CE95283 CAN as Remove Node with PSoC 3/5LP PSoC 3, PSoC The CANExampleRemote code example demonstrates use of the CAN Component.CAN Configuration, transmitting and receiving Full messages, handling Tx and Rx error is demonstrated. This is only one part of code example, for getting entire example you should also find CANExampleControl project.
CE95284 CapSense CSD with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP This CapSense_CSD_Design code example demonstrates operation of the CapSense CSD component with the PSoC Creator Software and DVK hardware. The component is configured with 2 buttons and linear slider. Visual feedback of a Button/Slider touch can be observed via LEDs/LCD.
CE95285 CapSense CSD with PSoC 4 PSoC 4 This CapSense_CSD_P4_Design code example demonstrates operation of the CapSense CSD component with the PSoC Creator Software and PSoC 4 Pioneer Kit (CY8CKIT-042) or PSoC 4 S0 Kit (CY8CKIT-040) hardware. The component is configured with a linear slider. Visual feedback of a Slider touch can be observed via LEDs.
CE95286 CapSense CSD using Tuner with PSoC 4 PSoC 4 (PSoC 4100, PSoC 4200) This CapSense_CSD_P4 Tuner Design code example demonstrates operation of the CapSense CSD component with the PSoC Creator software, CapSense Tuner software and PSoC 4 Pioneer Kit hardware (CY8CKIT-042). The component is configured with a linear slider. The CapSense Tuner software is used for displaying scanning results. Visual feedback of a Slider touch can be observed via LEDs.
CE95287 CapSense CSD using Tuner with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP This CapSense_CSD Tuner Design code example demonstrates operation of the CapSense CSD (Capacitive Sensing using a Delta-Sigma Modulator) component with the PSoC Creator Software and CapSense Tuner software. The component is configured with 2 buttons and linear slider. The CapSense Tuner software is used for displaying scanning results.
CE95288 CapSense Low Power with PSoC 4 PSoC 4 (PSoC 4000) For PSoC 4000 devices only, this code example demonstrates a low power CapSense system. Any battery driven equipment requires very low system power consumption, while maintaining the required performance. The PSoC 4000 family supports a capacitive touch sensing known as CapSense® and two device low power modes: Sleep and Deep-Sleep. These low power modes enable PSoC 4 to achieve the required performance while operating at very low system power consumption.
CE95289 CapSense Proximity with PSoC 4 PSoC 4 (PSoC 4000) For PSoC 4000 devices only, this project demonstrates a CapSense based proximity sensing design to control brightness of a LED. It will help user learn how to design a proximity sensor in their design using a PSoC 4 (4000 family) device and see how an approaching hand controls the intensity of a LED. It will employ the CapSense auto tuning ability, SmartSense®, to tune the proximity sensor of any wire/trace length. The project will also help user understand and design a simple Sleep-scan routine using the proximity sensor where the device will enter a periodic scan mode at a configurable rate and sleep once the sensor scan is complete to save power.
CE95290 Char LCD using Custom Font with PSoC 4 PSoC 3, PSoC 5, PSoC 5LP,
PSoC 4 (PSoC 4100, PSoC 4200)
This code example demonstrates the use of available custom font with the LCD component. It displays "CYPRESS" in custom font on 2 X 16 LCD available with CY8CKIT-001 kit.
CE95291 Char LCD using Horizontal Bar Graph (Hbar) with PSoC 4 PSoC 3, PSoC 5, PSoC 5LP,
PSoC 4 (PSoC 4100, PSoC 4200)
The CharLCD Hbar design project contains an example for the use of the CharLCD component. A series of horizontal bar graphs are drawn, left to right. Bars move towards the right, becoming shorter and shorter.
CE95292 Analog Voltage Comparator with PSoC 3/5LP PSoC 3, PSoC 5LP This code example demonstrates use of the Comparator components.
CE95293 Analog Voltage Comparator with PSoC 4 PSoC 4 (PSoC 4100, PSoC 4200) This code example demonstrates the PSoC 4 Comparator in Non-Inverting mode.
CE95294 7-bit Down Counter with PSoC 3/4/5LP PSoC 3, PSoC 4 (PSoC 4200),
PSoC 5LP
This code example demonstrates functionality of the Count7 component.
CE95295 8-bit UDB Counter with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP This project contains an example for the use of the Counter, ISR and clock components. A clock is connected to Count input of Counter via a Sync block. On each rising edge of this clock signal, the Counter will be decremented by one count. The Counter is configured to trigger interrupt on terminal count event. This simple example reads the Counter Period, Count and Compare values and displays them on the LCD module.
CE95296 Cyclic Redundancy Check with PSoC 3/4/5LP PSoC 3, PSoC 4 (PSoC 4200),
PSoC 5, PSoC 5LP
This datasheet code example demonstrates operation of the CRC (Cyclic Redundancy Check) component with the PSoC Creator Software. The CRC-16 polynomial, 16 bit resolution and single cycle configuration is demonstrated.
CE95297 1.2 Volt Comparator (CSD Comp) using Analog Multiplexer with PSoC 4 PSoC 4 (PSoC 4000) This code example demonstrates how the comparator's input can be multiplexed using the Amux component.
CE95298 Switch Debouncer with PSoC 3/4/5LP PSoC 3, PSoC 4 (PSoC 4200),
PSoC 5LP
This code example shows how to do switch debouncing in hardware using the PSoC Creator Debouncer component.
CE95299 Delta Sigma ADC using 16 multiplexed single-ended inputs with PSoC 3/5LP PSoC 3, PSoC 5LP This code example demonstrates a convenient way to implement a multi-channel ADC completely in PSoC hardware
CE95300 Delta Sigma ADC and I2C Master with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP This Starter Design provides an 8-channel multiplexed Delta Sigma ADC with sequencing logic. The analog inputs to the ADC are converted to digital sequentially and then made available through an I2C Master interface. This design additionally makes use of the LCD character display to provide a debugging output interface.
CE95301 Delta Sigma ADC and I2C Master testbench with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP This is the test project for the 8-ch DelSig ADC and I2C master code example
CE95302 Delta Sigma ADC and I2C Slave with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP This Starter Design provides an 8-channel multiplexed Delta Sigma ADC with sequencing logic. The analog inputs to the ADC are converted to digital sequentially and then made available through an I2C Slave interface. This design additionally makes use of the LCD character display to provide a debugging output interface.
CE95303 Delta Sigma ADC and I2C Slave testbench with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP This is the test project for the 8-ch DelSig ADC and I2C Slave Example
CE95304 Delta Sigma and SPI Master with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP This Starter Design provides an 8-channel multiplexed Delta Sigma ADC with sequencing logic. The analog inputs to the ADC are converted to digital sequentially and then made available through a SPI Master interface. This design additionally makes use of the LCD character display to provide a debugging output interface.
CE95305 Delta Sigma and SPI Master testbench with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP This is the test project for the 8-ch DelSig ADC and SPI Master Example
CE95306 Digital Filter Block Assembler with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP This code example demonstrates the use of the Digital Filter Block (DFB) Assembler component for matrix multiplication by a scalar. It also demonstrates the DFB interaction with DMA.
CE95307 Die Temperature sensor with PSoC 3/5LP PSoC 3, PSoC 5LP The DieTemp basic design project contains an example for the use of Die Temp. This simple example uses a Character LCD to display the current Die Temperature value.
CE95308 Digital Utility Components with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP This project contains an example of the use of some of the Digital Utility components. Using an Edge Detector and a Basic Counter, falling edge events on a pin are counted and driven to a Status Register. Using a Digital Comparator and a Digital Constant, the Basic Counter is reset whenever the count value reaches 100.
CE95309 Dithered Voltage DAC with PSoC 3/5LP PSoC 3, PSoC 5LP This code example demonstrates the basic functionality of the DVDAC component. The Delta Sigma ADC component is used to measure the output voltage.
CE95310 EEPROM memory with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP The EEPROM basic design project contains an example for the use of the EEPROM component. This simple example uses a Character LCD to display data written to EEPROM memory.
CE95311 Emulated File System with PSoC 3/4/5LP PSoC 3, PSoC 5, PSoC 5LP This code example demonstrates emFile component operation
CE95312 External Memory Interface (EMIF) with PSoC 3/5LP PSoC 3, PSoC 5LP This data sheet code example demonstrates operation of the EMIF (External Memory Interface) component with the PSoC Creator Software. The Asynchronous External Memory Type, 24 bits Address Width, 8 bits Data Width, 30 ns External Memory Speed configuration is demonstrated.
CE95313 Emulated EEPROM memory with PSoC 3/4/5LP PSoC 3, PSoC 4 (PSoC 4100,
PSoC 4200), PSoC 5LP
The code example demonstrates the basic functionality of the Emulated EEPROM component.
CE95314 EZI2C design with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP This datasheet code example demonstrates operation of the EZI2C (EZ I2C Slave) and I2C (Inter-Integrated Circuit Master/Multi-Master/Slave) components communication. The EZI2C component is configured as one slave device with the 8 bit sub-address size and 100 kbps data rate.
CE95315 Auto Firmware Fan Control with Alert with PSoC 4 PSoC 4 (PSoC 4200) This data sheet code example demonstrates operation of the Fan Controller component in Automatic (Firmware) mode with the PSoC Creator Software.
CE95316 Filter from ADC to VDAC using DFB with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP The Filter_ADC_VDAC contains an example for the use of the Filter component. FIR Low pass filter with Blackman window is used to filter the 8-bit ADC output. The filtered output is converted into an unsigned value, then fed via an ISR to VDAC to convert it to analog signal.
CE95317 Filter from ADC to VDAC using DFB in polling mode with PsoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP The Filter_ADC_VDAC_poll contain a polling example for the Filter component. FIR Low pass filter with Blackman window is used to filter the 8-bit ADC output. The filtered output is converted into an unsigned value, then fed via an ISR to VDAC to convert it to analog signal.
CE95318 Firmware Fan Control with PSoC 3/4/5LP PSoC 3, PSoC 4 (PSoC 4200),
PSoC 5LP
This project demonstrates the Fan Controller component configured for firmware based Fan Control enabling designers to customize the control algorithm.
CE95319 Hardware Glitch Filter with PSoC 3/4/5LP PSoC 3, PSoC 4 (PSoC 4200),
PSoC 5LP
This code example shows how to do glitch filtering in hardware using the PSoC Creator GlitchFilter component.
CE95320 Hello World and Blinky LED with 3/5LP PSoC 3, PSoC 5, PSoC 5LP This project provides an introduction into the process of creating a design in PSoC Creator. It accomplishes the simple tasks of printing "Hello World" on an LCD, and blinking an LED using a PWM component.
CE95321 Hibernate and Stop Power Modes with PSoC 4 PSoC 4 (PSoC 4100, PSoC 4200) This code example demonstrates how to enter and wake up from hibernate and stop low power modes, and how to retain SRAM variables in hibernate mode.
CE95322 Hibernate and Wake Up with PSoC 4 PSoC 4 (PSoC 4100, PSoC 4200) This System Reference Guide code example demonstrates operation of the Power Manager API with the PSoC Creator Software. The Hibernate low power mode entry and wake up on external event are implemented.
CE95323 Hardware Fan Control with PSoC 3/5LP PSoC 3, PSoC 5LP This project demonstrates the Fan Controller component configured for hardware (UDB) based Fan Control. This method completely frees-up the CPU for other system tasks. This example also demonstrates how to handle FanController exceptions such as fan stall/rotor lock etc. through the use of the alert pin and CPU interrupts.
CE95324 I2C LCD with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP This code example demonstartes functionality of I2C LCD component.
CE95325 I2C LCD with PSoC 4 PSoC 4 (PSoC 4100, PSoC 4200) This code example demonstartes functionality of I2C LCD component.
CE95326 8-Bit Current Digital to Analog Converter (IDAC8) with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP The IDAC8_Example design project contains an example to demonstrate the use of IDAC8 component. This simple example sets the IDAC range to 255µA and the current value to 100µA. The output can be verified using a Multimeter.
CE95327 8-Bit Current Digital to Analog Converter (IDAC8) with PSoC 4 PSoC 4 (PSoC 4100, PSoC 4200) This code example demonstartes basic functionality of PSoC4 IDAC8.
CE95328 1kHz ILO Trimming with PSoC 3/5LP PSoC 3, PSoC 5LP This code example demonstrates 1kHz ILO trimming for PSoC3 and PSoC5LP.
CE95329 Compensation of ILO Trimming with PSoC 4 PSoC 4 (PSoC 4100, PSoC 4200) This code example demonstrates the compensation operation of the ILO Trim component for PSoC 4.
CE95330 Inter-IC Sound Bus (I2S) with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP This datasheet code example demonstrates operation of the I2S (Inter-IC Sound Bus) component with the PSoC Creator Software. The operation of I2S, configuring a DMA transfer and displaying results on LCD screen are described and implemented.
CE95331 External 8 digit 7-Segment Display with PSoC 3/5LP PSoC 3, PSoC 5LP This code example demonstrates driving an external 8 digit 7-segment display
CE95332 Local Interconnect Network (LIN) Slave with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP This datasheet code example demonstrates the LIN Slave component operation: signal interaction APIs, Transport Layer and Configuration services usage.
CE95333 Low Power Comparator with PSoC 4 PSoC 4 (PSoC 4100, PSoC 4200) This is code example demonstrates the PSoC 4 LP Comparator.
CE95334 Lookup table (LUT) with PSoC 3/4/5LP PSoC 3, PSoC 4 (PSoC 4200),
PSoC 5, PSoC 5LP
The LUT Example design project contains an example for the use of the LUT component. This simple example sets the input and output to 2. Output is verified using a Character LCD.
CE95335 Management Data Input/Ouput (MDIO) Interface in Advance Mode with PSoC 3/5LP PSoC 3, PSoC 5LP This code example demonstrates the advanced mode of the MDIO Interface component by letting the hardware process the frames, and concurrently prints the derived information on the LCD.
CE95336 Management Data Iinput/Output (MDIO) Interface in Basic Mode with PSoC 3/5LP PSoC 3, PSoC 5LP This code example demonstrates the basic mode of the MDIO Interface component by processing the received frame in firmware, and then prints the derived information on the LCD
CE95337 Analog Signal Mixer with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP The Mixer_SampleProject contains an example for the use of the Mixer component. The mixer type used is Up mixer or Multiply mixer which multiplies the input signal frequency with the local oscillator frequency. The resultant output waveform can be viewed using an oscilloscope.
CE95338 Multiplexed Analog Comparator with PSoC 4 PSoC 4 (PSoC 4200) This code example demonstrates how to monitor multiple input signals using multiplexed analog comparator without any CPU intervention.
CE95339 Operational Amplifier (OpAmp) with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP This code example contains an example for the use of the OpAmp component in Non-inverting Mode.
CE95340 Amplifier with Dynamic Gain Switching with PSoC 4 PSoC 4 (PSoC 4200) This code example demonstrates how to multiplex three different channels with ADC using Analog Mux and send results to HyperTerminal (PC) using UART. The ADC input and gain can be changed on the fly by pressing a switch.
CE95341 Operational Amplifier (OpAmp) with PSoC 4 PSoC 4 (PSoC 4100, PSoC 4200) This is code example demonstrates the functionality of the PSoC 4 OpAmp.
CE95342 Programmable Gain Amplifier (PGA) with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP This design project contains an example for the use of the PGA component. This simple example sets the PGA gain to 1 and outputs a Voltage set in the firmware to a fixed pin. This voltage can be verified using a Multimeter.
CE95343 Inverting Programmable Gain Amplifier with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP This design project contains an example for the use of the PGA_Inv component. This simple example sets the PGA_Inv gain to 1 and outputs a Voltage set in the firmware to a fixed pin. This voltage can be verified using a Multimeter.
CE95344 PMBus Slave in Power Supervision Application with PSoC 3/5LP PSoC 3, PSoC 5LP This code example demonstrates usage of the PMBus Slave component in a simulated Power Supervision application.
CE95345 PMBus Slave in Thermal Management Application with PSoC 4 PSoC 4 (PSoC 4100, PSoC 4200) This code example demonstrates usage of the PMBus Slave component in a simulated Thermal Management application.
CE95346 Power Management and Hibernate with PSoC 3/5LP PSoC 3, PSoC 5LP This System Reference Guide code example demonstrates operation of the Power Manager API with the PSoC Creator Software. The Hibernate low power mode entry and wake up on external event are implemented.
CE95347 Power Monitoring with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP This project demonstrates the PowerMonitor component configured for using with 035-Power Management EBK development kit.
CE95348 Precise Illumination Signal Modulation (PrISM) with PSoC 3/4/5LP PSoC 3, PSoC 4 (PSoC 4200),
PSoC 5, PSoC 5LP
This datasheet code example demonstrates operation of the PrISM component with the PSoC Creator Software. The LED blinking is demonstrated.
CE95349 Pseudo Random Sequence (PRS) generator with PSoC 3/4/5LP PSoC 3, PSoC 4 (PSoC 4200),
PSoC 5, PSoC 5LP
This datasheet code example demonstrates operation of the PRS (Pseudo Random Sequence) component with the PSoC Creator Software. The clocked and API Single Step run modes, 16 bit resolution and single cycles implementation configuration is demonstrated.
CE95350 Pulse Counter with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP This project contains an example of the use of the Pulse Converter component. 2 Basic Counter components, clocked slower than BUS_CLK, count the number of DMA nrq pulses. One uses the nrq output directly, so it misses pulses. The other uses a Pulse Converter component to guarantee that it does not miss pulses.
CE95351 Fixed Function PWM with PSoC 4 PSoC 4 This data sheet code example demonstrates operation of the TCPWM (PWM Mode) component with the PSoC Creator Software.
CE95352 Fixed Function PWM with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP This code example demonstrates operation of the PWM Fixed Function component. This simple example uses a Character LCD to display the current PWM Period, Compare values and status of PWM output on the LCD module.
CE95353 Quadrature Decoder with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP This datasheet code example demonstrates operation of the QuadDec (Quadrature Decoder) component with the PSoC Creator Software. The quadrature counts handling and index input usage is demonstrated.
CE95354 Quadrature Decoder with PSoC 4 PSoC 4 This data sheet code example demonstrates operation of the TCPWM (Quadrature Decoder Mode) component with the PSoC Creator Software.
CE95355 Real Time Clock (RTC) with PSoC 3/5LP PSoC 3, PSoC 5LP This datasheet code example demonstrates operation of the RTC (Real Time Clock) component with the PSoC Creator Software. The operation with full time, data and alarm features, including Daylight Savings Time (DST) is -implemented.
CE95356 Resistance Temperature Detector (RTD) with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP This data sheet code example demonstrates operation of the RTD (resistance temperature detector) calculator component with the PSoC Creator Software. The PT100 RTD type, [-50, 150] Temperature Range, minimal calculation error budget, IEC60751 Coefficients is demonstrated.
CE95357 Sample and Hold with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP This code example demonstrates operation of the Sample/Track and Hold component in Sample and Hold mode. This simple example uses a Character LCD to display the Sample and Hold value which is converted using an ADC.
CE95358 SAR sampling with SPI and USBUART communication with PSoC 5LP PSoC 5, PSoC 5LP This Starter Design provides two 4-channel SAR ADCs with two analog muxes to choose input channels. The channel to be read is dictated by the USB host device. The ADC then processes the input and then outputs it to a SPI Slave and to the USB host. This design will additionally make use of the LCD character display to provide a debugging output interface.
CE95359 SAR sampling with SPI and USBUART communication testbench with PSoC 5LP PSoC 5, PSoC 5LP This is the test project for the 4ch dual SAR with SPI master and USBUART code example
CE95360 Scanning Comparator using common mode with PSoC 3/4/5LP PSoC 3, PSoC 4 (PSoC 4200),
PSoC 5LP
This data sheet code example demonstrates operation of the Scanning Comparator (Common Mode) component with the PSoC Creator Software.
CE95361 Scanning Comparator using Internal VDAC with PSoC 3/5LP PSoC 3, PSoC 5LP This data sheet code example demonstrates operation of the Scanning Comparator (Internal VDAC Per channel Mode) component with the PSoC Creator Software.
CE95362 Cypress EzI2C communication using a Serial Communication Block (SCB) with PSoC 4 PSoC 4 This code example demonstrates the basic operation of the EZI2C slave (SCB mode) component. The EZI2C slave accepts packet with command from I2C master to control RGB LED color. The EZI2C slave updates its buffer with status packet in response to the accepted -command.
CE95363 I2C Master using a Serial Communication Block (SCB) with PSoC 4 PSoC 4 This code example demonstrates the basic operation of the I2C master (SCB mode) component. I2C master sends packet with command to I2C slave to control RGB LED color. The packet with status is read back.
CE95364 I2C Slave using a Serial Communication Block (SCB) with PSoC 4 PSoC 4 This code example demonstrates the basic operation of the I2C slave (SCB mode) component. The I2C slave accepts packet with command from I2C master to control RGB LED color. The I2C slave updates its buffer with status packet in response to the accepted command.
CE95365 SPI Transmit and Receive using a Serial Communication Block (SCB) with PSoC 4 PSoC 4 (PSoC 4100, PSoC 4200) This datasheet code example demonstrates operation of the SCB component configured in SPI. The first instance of SCB is configued as SPI master and the second as SPI Slave mode. The SPI master communicates with slave (bit rate 1Mbps).
CE95366 UART Transmit and Receivce using a Serial Communication Block (SCB) with PSoC 4 PSoC 4 (PSoC 4100, PSoC 4200) This datasheet code example demonstrates operation of the SCB component configured in UART Tx+Rx mode. Data typed on the HyperTerminal is sent through serial port to the DVK and displayed on the LCD.After that this data is sent back and displayed on the HyperTerminal.
CE95367 Segment LCD with PSoC 5 PSoC 5 This code example demonstrates the Segment Display component operation in Always Active mode. In this code example, Bar graph, 7 Segment and 14 Segment helpers handle data processing and proper pixel reflection output on the LCD's Bar graph, 7 segments or 14 Segment digits.
CE95368 Segment LCD in Low Power mode with PSoC 3/5LP PSoC 3, PSoC 5LP The SegLCD Low Power design project contains an example for the use of the Segment LCD component. This example features the Segment LCD in Low Power (ILO) mode at a 62Hz refresh rate. It displays 14 Segment helper.
CE95369 Segment LCD with PSoC 4 PSoC 4 (PSoC 4100, PSoC 4200) This code example demonstrates the PSoC 4 Segment LCD.
CE95370 My first PSoC Creator Component Library with PSoC 3 PSoC 3 The My1stLib project contains an example of a library project for use with the PSoC Creator Help tutorial "Library Component Project." This project and tutorial provide an introduction into the process of creating simple shifter components. Add this project to the Shifter code example Workspace and add the dependency to the Shifter to generate the correct code example.
CE95371 Using custom components in a Hierarchical Design with PSoC 3 PSoC 3 The Shifter project contains an code example for use with the PSoC Creator tutorial: "Basic Hierarchical Design." This project and tutorial demonstrate how to re-use components created in the "Library Component Project" tutorial to create a simple hierarchical design. This project requires the My1stLib project be located in the same root directory.
CE95372 Shift register with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP This datasheet code example demonstrates operation of the ShiftReg (Shift Register) component with the PSoC Creator Software. The basic functionality of 8-bit and 16-bit shift register is demonstrated.
CE95373 Waking up from Low Power modes with the Sleep Timer with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP This datasheet code example demonstrates operation of the Sleep Timer component with the PSoC Creator Software. The wake up from Sleep low power mode every 4 milliseconds with interrupt issuing is implemented. The Power Management API is used for proper low power mode entry.
CE95374 S/PDIF Transmitter with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP This datasheet code example demonstrates operation of the S/PDIF Transmitter (SPDIF_Tx) component with the PSoC® Creator™ Software. The operation of the SPDIF_Tx and configuring a DMA transfer for this component are described and implemented.
CE95375 SPI Master and DMA with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP This code example demonstrates the operation of the SPI(Serial Peripheral Interface) Master component with the PSoC Creator Software. The operation of the SPI Master, configuring a DMA transfer and displaying results on an LCD screen are described and implemented. This example is intended to be used with the SPIS_code example.
CE95376 SPI Slave and DMA with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP This code example demonstrates operation of the SPI(Serial Peripheral Interface) Slave component with the PSoC Creator Software. The operation of the SPI Master, configuring a DMA transfer and displaying results on LCD screen are described and implemented. This example is intended to be used with the SPIM_code example
CE95377 SPI Master and Slave with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP This datasheet code example demonstrates operation of the SPI (Serial Peripheral Interface) component with the PSoC Creator Software. The communication between SPI Master and SPI Slave is implemented. The SPI Mode 0 (CPOL = 0, CPHA = 0) with 8 byte Rx and Tx software buffers is configured. The bit rate is set to 1 Mbps.
CE95378 Static Segment LCD and Sleep with PSoC PSoC 3 PSoC 3 The SegLCD Low Power design project contains an example for the use of the Static Segment LCD in Sleep mode. It shows operation of 7 Segment helper.
CE95379 Software based UART transmit with PSoC 3/4/5LP PSoC 3, PSoC 4 (PSoC 4100,
PSoC 4200), PSoC 5LP
This code example demonstrates basic functionality of Software Transmit UART component.
CE95380 TCPWM configuration with PSoC 4 PSoC 4 This data sheet code example demonstrates operation of the TCPWM (Unconfigured TCPWM Mode) component with the PSoC Creator Software.
CE95381 Thermistor temperature calculation with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP This code example demonstrates the use of the Thermistor Calculator component for temperature measurement.
CE95382 Thermocouple with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP This data sheet code example demonstrates operation of the Thermocouple calculator component with the PSoC Creator Software. The K-type thermocouple type, 0.1 Calculation error budget is demonstrated.
CE95383 Transimpedance Amplifier (TIA) with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP This design project contains an example for the use of the TIA component.
CE95384 16 bit UDB based timer with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP This design project contains an example for the use of the Timer, ISR and clock components. The 16-bit UDB timer counts down on the positive edge of each clock, and captures the count value for the rising edge of a slower clock given as input. An interrupt is triggered on every terminal count, and the number of interrupts generated is displayed on the Character LCD. In addition, this simple example reads the timer Period, Capture, and Counter values and displays them on the LCD module.
CE95385 TCPWM Timer/Counter Operation with PSoC 4 PSoC 4 This data sheet code example demonstrates operation of the TCPWM (Timer / Counter Mode) component with the PSoC Creator Software.
CE95386 TMP05 temperature sensor interface with PSoC 3/4/5LP PSoC 3, PSoC 4(PSoC 4200,
PSoC 5, PSoC 5LP)
This data sheet code example demonstrates operation of theTMP05 Temp Sensor Interface component with the PSoC Creator Software. The continuous mode is demonstrated.
CE95387 Trim voltage rails with PSoC 3/5LP PSoC 3, PSoC 5LP This code example demonstrates the basic operation of the Trim Margin component
CE95388 UART Receive with PSoC 3/4/5LP PSoC 3, PSoC 4 (PSoC 4200),
PSoC 5, PSoC 5LP
The UART Rx design project contains an example for the use of the UART component. This example demonstrates the UART Reception (Rx) mechanism. Data input via Hyperterminal is sent through the serial port and displayed on the LCD module.
CE95389 UART Transmit with PSoC 3/4/5LP PSoC 3, PSoC 4 (PSoC 4200),
PSoC 5, PSoC 5LP
The UART Tx design project contains an example for the use of the UART component. This example demonstrates the UART Transmission (Tx) -mechanism. Data sent via the serial port is displayed on Hyperterminal and the LCD module.
CE95390 USB Audio with PSoC 3/5LP PSoC 3, PSoC 5LP This datasheet code example demonstrates the operation of the 8-bit, 32-kHz, mono USB Audio Device.
CE95391 USB Bootloadable Application with PSoC 3/5LP PSoC 3, PSoC 5LP This datasheet code example demonstrates the operation of the Bootloadable component. Add this project to the USBFS_Bootloader code example Workspace and add Dependency to the USBFS_Bootloader to generate the correct code example.
CE95392 USB Bootloader with PSoC 3/5LP PSoC 3, PSoC 5LP This datasheet code example demonstrates the operation of the Bootloader with USBFS as an I/O component.
CE95393 USB Bulk Transfer with PSoC 3/5LP PSoC 3, PSoC 5LP This datasheet code example demonstrates the operation of the USBFS (Full Speed USB) component with the PSoC Creator software. It also shows the Bulk transfers implementation.
CE95394 USB HID Mouse with PSoC 3/5LP PSoC 3, PSoC 5LP This datasheet code example demonstrates the operation of the USBFS (Full Speed USB) component with the PSoC Creator software. It also shows the USB mouse implementation.
CE95395 USB MIDI with PSoC 3/5LP PSoC 3, PSoC 5LP This datasheet code example demonstrates the operation of the MIDI interface device operation.
CE95396 USB UART with PSoC 3/5LP PSoC 3, PSoC 5LP This datasheet code example demonstrates the operation of the USBFS component as an RS-232 logical cable replacement.
CE95397 Voltage DAC with PSoC 3/5LP PSoC 3, PSoC 5, PSoC 5LP This design project contains an example for the use of the VDAC component. This simple example sets the VDAC range to 1.020V and outputs a Voltage set in the firmware to a fixed pin. This voltage can be verified using a Multimeter.
CE95398 Voltage Fault Detector with PSoC 3/5LP PSoC 3, PSoC 5LP This datasheet code example demonstrates the operation of the Voltage Fault Detector.
CE95399 Voltage Sequencer and power rail monitoring with PSoC 3/5LP PSoC 3, PSoC 5LP This code example demonstrates the basic operation of the Voltage Sequencer component.
CE95400 Watchdog timer interrupts and device reset for CY8CKIT-040 with PSoC 4000 PSoC 4 (PSoC 4000) This code example demonstrates the basic operation of the WDT: device reset and periodic interrupt generation.
CE95401 Watchdog timer example using LCD with PSoC 4 PSoC 4 (PSoC 4100, PSoC 4200) This code example demonstrates basic functionality of PSoC4 watchdog.
CE95402 Generating a Sine wave with the WaveDAC8 Component with PSoC 3/5LP PSoC 3, PSoC 5LP This code example demonstrates basic functionality of WaveDAC8 component.

Code Examples integrated with Application Notes

AN# AN Title Part # Description
AN73054 PSoC® 3 and PSoC 5LP Programming Using an External Microcontroller (HSSP) PSoC 3, PSoC 5, PSoC 5LP AN73054 shows how to apply C code to program PSoC® 3 / PSoC 5LP devices using an external microcontroller. This process is referred to as Host Sourced Serial Programming (HSSP), in which the host microcontroller programs PSoC 3 / PSoC 5LP through the serial wire debug (SWD) interface. The C code is written so it can be ported to any microcontroller with minimal changes, greatly reducing the time required to develop HSSP applications for PSoC 3 / PSoC 5LP.
AN54460 PSoC® 3 and PSoC 5LP Interrupts PSoC 3, PSoC 5, PSoC 5LP AN54460 explains the interrupt architecture in PSoC® 3 and PSoC 5LP, and its configuration in PSoC Creator™ IDE with the help of example projects. Advanced interrupt topics such as handling re-entrant functions, interrupt code optimization, interrupt latency, and debug techniques are also explained.
AN82250 PSoC® 3, PSoC 4, and PSoC 5LP Implementing Programmable Logic Designs with Verilog PSoC 3, PSoC 5, PSoC 5LP,
PSoC 4 (PSoC 4200)
AN82250 describes how to implement programmable digital logic designs in the PLD portion of PSoC® 3, PSoC 4 and PSoC 5LP. It introduces the PSoC Universal Digital Blocks (UDBs) and their Programmable Logic Device (PLD) subblocks. An example project illustrates how you can use the PLDs in a design by creating Verilog-based components in PSoC Creator™.
AN61102 PSoC® 3 and PSoC 5LP - ADC Data Buffering Using DMA PSoC 3, PSoC 5LP This application note describes how to configure the direct memory access (DMA) to buffer the analog-to-digital converter (ADC) data. It discusses how to overcome some of the limitations of the DMA when buffering the ADC data.
AN73503 USB HID Bootloader for PSoC® 3 and PSoC 5LP PSoC 3, PSoC 5LP This application note describes how to implement a USB bootloader for PSoC 3 and PSoC 5LP devices by using the USB Human Interface Device (HID) class.
AN82072 PSoC® 3 and PSoC 5LP USB General Data Transfer with Standard HID Drivers PSoC 3, PSoC 5LP AN82072 discusses how to use PSoC® 3 and PSoC 5LP devices to transfer generic data across USB using native HID drivers included with Windows, Mac OS, and Linux.
AN60321 Peak Detection with PSoC® 3 and PSoC 5LP PSoC 3, PSoC 5LP This application note describes several techniques for implementing a peak detector in PSoC 3 and PSoC 5LP.
AN56377 PSoC® 3 and PSoC 5LP - Introduction to Implementing USB Data Transfers PSoC 3, PSoC 5LP This application note describes the four USB transfer types: Interrupt, Bulk, Isochronous, and Control.
AN78175 PSoC® 3 and PSoC 5LP - IEC 60730 Class B Safety Software Library PSoC 3, PSoC 5LP This application note describes the PSoC® 3 and PSoC 5LP IEC60730 Class B Safety Software Library and includes an example project with self-check routines to ensure reliable and safe operation.
AN60594 PSoC® 3 and PSoC 5LP: Low-Frequency FSK Modulation and Demodulation PSoC 3, PSoC 5LP AN60594 describes how to create a frequency shift keying (FSK) modulator and demodulator with PSoC® 3 or PSoC 5LP, with digital 0s represented by 2100 Hz, and digital 1s, represented by 1300 Hz.
AN66477 PSoC® 3, PSoC 4, and PSoC 5LP - Temperature Measurement with a Thermistor PSoC 3, PSoC 5, PSoC 5LP,
PSoC 4 (PSoC 4100, PSoC 4200)
This application note explains how to measure temperature with a thermistor using PSoC® 3, PSoC 4, or PSoC 5LP.
AN84401 PSoC® 3 and PSoC 5LP SPI Bootloader PSoC 3, PSoC 5LP AN84401 describes a SPI-based bootloader for PSoC® 3 and PSoC 5LP. In this application note, you will learn how to use PSoC Creator™ to quickly and easily build SPI-based bootloader and bootloadable projects.
AN76496 PSoC® 5LP - Solar Microinverter Control Design PSoC 5LP AN76496 describes a possible approach to a solar microinverter design using PSoC® 5LP. In this application note, you will find some light discussion on what a solar microinverter is and what its defining characteristics are. Most of the discussion centers on how you can use PSoC 5LP to control all aspects of the microinverter.
AN76474 PSoC® 3 Power Supervisor PSoC 3 AN76474 demonstrates how you can quickly implement and customize a full-featured power supervisor that supports up to 13 power supply rails with Cypress’s PSoC® 3.
AN54181 Getting Started with PSoC® 3 PSoC 3 AN54181 briefly introduces you to PSoC® 3, an 8051-based programmable system-on-chip. In this application note, you will learn about the PSoC 3 architecture and how the 8051-based MCU subsystem works closely with PSoC's programmable digital and analog fabric. You will also learn how to use Cypress's powerful design tools to start your first PSoC project, utilizing PSoC 3's hardware and software programmability.
AN60317 PSoC® 3 and PSoC 5LP I2C Bootloader PSoC 3, PSoC 5LP AN60317 describes an I2C-based bootloader for PSoC® 3 and PSoC 5LP. In this application note you will learn how to use PSoC Creator™ to quickly and easily build an I2C-based bootloader project, and bootloadable projects. It also shows how to build an I2C-based embedded bootloader host program.
AN68272 PSoC® 3, PSoC 4 and PSoC 5LP UART Bootloader PSoC 3, PSoC 5, PSoC 5LP,
PSoC 4 (PSoC 4100, PSoC 4200)
AN68272 describes a UART-based bootloader for PSoC® 3, PSoC 4 and PSoC 5LP. In this application note you will learn how to use PSoC Creator™ to quickly and easily build a UART-based bootloader project, and bootloadable projects. It also shows how to build a UART-based embedded bootloader host program.
AN82156 PSoC® 3, PSoC 4, and PSoC 5LP - Designing PSoC Creator™ Components with UDB Datapaths PSoC 3, PSoC 5, PSoC 5LP,
PSoC 4 (PSoC 4200)
This application note explains how to design PSoC® Creator™ components that use PSoC 3, PSoC 4, and PSoC 5LP Universal Digital Block (UDB) datapath modules. Datapath-based components can implement common functions, such as counters, PWMs, shifters, or UARTs. They can also perform data management tasks in programmable logic that would otherwise need to be done by the CPU.
AN52927 PSoC® 3 and PSoC 5LP - Segment LCD Direct Drive PSoC 3, PSoC 5LP AN52927 demonstrates how easy it is to drive a segment LCD glass using the integrated LCD driver in PSoC 3 and PSoC 5LP. This application note gives a brief introduction to segment LCD drive features and provides a step-bystep procedure to design Segment LCD applications using the PSoC Creator tool.
AN52705 PSoC® 3 and PSoC 5LP - Getting Started with DMA PSoC 3, PSoC 5LP AN52705 provides an introduction to direct memory access (DMA) in PSoC® 3 and PSoC 5LP.
AN2099 PSoC® 1, PSoC 3, PSoC 4, and PSoC 5LP - Single-Pole Infinite Impulse Response (IIR) Filters PSoC 3, PSoC 5, PSoC 5LP,
PSoC 4 (PSoC 4100, PSoC 4200)
AN2099 describes a topology for a single-pole infinite impulse response (IIR) filter. It includes equations and software to implement this topology; the associated example projects give the user access to filter routines in either assembly or C.
AN60024 PSoC® 3, PSoC 4, PSoC 5LP Switch Debouncer and Glitch Filter PSoC 3, PSoC 5, PSoC 5LP,
PSoC 4 (PSoC 4100, PSoC 4200)
This application note introduces the concepts of switch debouncing and glitch filtering for digital input signals, and shows several solutions for PSoC® 3, PSoC 4, and PSoC 5LP, using PSoC Creator™.
AN80248 PSoC® 3, PSoC 5LP Improving the Accuracy of Internal Oscillators PSoC 3, PSoC 5LP This application note shows how to improve the accuracy of the PSoC® 3 or PSoC 5LP internal low-speed oscillator (ILO) and internal main oscillator (IMO) through run-time trim.
AN60630 PSoC® 3 8051 Code and Memory Optimization PSoC 3 This application note shows how to increase the efficiency of 8051 code in PSoC® 3 by making greater use of the 8051 core internal features.
AN60305 Using PSoC® 3 and PSoC 5LP IDACs to build a better VDAC PSoC 3, PSoC 5LP This application note describes how to configure the PSoC® 3 and 5 IDACs as a flexible analog source.
AN66627 PSoC® 3 and PSoC 5LP Intelligent Fan Controller PSoC 3, PSoC 5LP AN66627 demonstrates how to quickly and easily develop four-wire brushless DC fan control systems using PSoC® 3 or PSoC 5LP.
AN62582 AM Modulation and Demodulation PSoC 3, PSoC 5LP AN62582 explains how to implement amplitude modulation (AM) and demodulation using PSoC® 3 and PSoC 5LP.
AN79973 PSoC3 and PSoC5 CapSense CSD - IEC 60730 Class B Safety Software Library PSoC 3, PSoC 5LP Guide to IEC60730 Class B compliance for the CapSense CSD component with PSoC 3 and PSoC 5 microcontrollers
AN77759 Getting Started with PSoC® 5LP PSoC 5LP AN77759 briefly introduces you to PSoC® 5LP, if you are looking at PSoC 5LP for the first time, this is an excellent place to start.
AN75813 H Bridge Based Motor Drive Protection Using PSoC® 3 PSoC 3 AN75813 demonstrates the use of a PSoC 3 for brushed DC motor drive protection and diagnostics. The PSoC 3 protection system is optimized for the widely used H bridge, but it can easily be adapted to other DC motors. The implementation emphasizes the use of digital logic present on the PSoC 3 to free the CPU for more involved tasks such as motor control. This application note specifically addresses motor drive protection and diagnostics and does not discuss motor control.
AN73468 PSoC® 3 and PSoC 5LP - Single-Cell Lithium-Ion (Li-ion) Battery Charger PSoC 3, PSoC 5LP AN73468 explains a single-cell Lithium-Ion (Li-ion) battery charger implementation using PSoC 3 or PSoC 5LP. Two types of implementations - linear and switching type are supported. An attached PSoC Creator project, which includes a charge display tool, demonstrates Li-ion battery charging.
AN68403 PSoC® 3 and PSoC 5LP Analog Signal Chain Calibration PSoC 3, PSoC 5LP AN68403 explains how to calibrate an analog signal chain by using a calibrated delta sigma ADC and an on-chip EEPROM that is available in PSoC® 3 and PSoC 5LP.
AN66444 PSoC® 3 and PSoC 5LP Correlated Double Sampling to Reduce Offset, Drift, and Low Frequency Noise PSoC 3, PSoC 5LP AN66444 describes the implementation of correlated double sampling (CDS) in PSoC ® 3 and PSoC 5LP, for DC offset cancellation and noise reduction.
AN65977 PSoC® 3 and PSoC 5LP - Creating an Interface to a TMP05/TMP06 Digital Temperature Sensor PSoC 3, PSoC 5LP AN65977 describes how to configure PSoC 3 applications to interface to an Analog Devices' TMP05 or TMP06 temperature sensor.
AN62510 Implementing State Machines with PSoC® 3, PSoC 4, and PSoC 5LP PSoC 3, PSoC 5, PSoC 5LP,
PSoC 4 (PSoC 4200)
This application note explains the method to implement state machines using the PSoC® 3/PSoC 4/PSoC 5LP family of devices. Mealy and Moore state machine implementations are shown with associated projects.
AN60580 SIO Tips and Tricks in PSoC® 3 / PSoC 5LP PSoC 3, PSoC 5LP The special input/output (SIO) pins provide differential input buffer and a means to regulate the high-level output voltage (VOH). The SIO pins are tolerant to input voltages higher than the I/O supply voltage and can sink up to 25 mA current. This application note explains the following applications of SIO pins: comparator, charge pump, Salen-key filter, level shifter, half wave rectifier, peak detector, and sleep wakeup using SIO comparator.
AN60220 PSoC® 3 / PSoC 5LP Multiplexed Comparator PSoC 3, PSoC 5LP AN60220 describes how to multiplex the comparator for use with more than one input signal.
AN84783 Accurate Measurement Using PSoC® 3 and PSoC 5LP Delta-Sigma ADCs PSoC 3, PSoC 5LP AN84783 shows how to increase the accuracy of measurements using the 20-bit Delta-Sigma ADC in PSoC® 3 and PSoC 5LP.
AN83902 PSoC® 3 and PSoC 5LP- Creating a CFP Management Interface PSoC 3, PSoC 5LP AN83902 shows how to create a CFP (C Form-factor Pluggable) Management Interface using PSoC® 3 or PSoC 5LP. Included are two example projects that demonstrate the Management Data Input / Output (MDIO) Interface Component, which controls the interface bus used in CFP optical modules.
AN76439 PSoC® 3 and PSoC 5LP - Phase-Shift Full-Bridge Modulation and Control PSoC 3, PSoC 5LP AN76439 introduces phase-shift full-bridge modulation for PSoC 3 and PSoC 5LP. This application note describes in detail the implementation of phase-shift modulation in UDBs with some discussion on how to control the full-bridge for Power applications.
AN57473 USB HID Basics with PSoC® 3 and PSoC 5LP PSoC 3, PSoC 5LP AN57473 describes the basics of the USB Human Interface Device (HID) protocol, and how to implement it in PSoC® 3 and PSoC 5LP.
AN64275 PSoC® 3 and PSoC 5LP Getting More Resolution from 8-Bit DACs PSoC 3, PSoC 5LP AN64275 demonstrates how to increase the resolution of the 8-bit DACs available in the PSoC 3 and 5LP devices up to 12-bits using additional PSoC resources.
AN77900 PSoC® 3 and PSoC 5LP Low-power Modes and Power Reduction Techniques PSoC 3, PSoC 5LP AN77900 is an introduction to the PSoC 3 and PSoC 5LP low-power modes and features. Major topics include PSoC power modes, power management API and registers, additional power-saving techniques, and other low-power mode considerations. The associated PSoC Creator project demonstrates these principles.
AN69133 PSoC® 3 / PSoC 5LP Easy Waveform Generation with the WaveDAC8 Component PSoC 3, PSoC 5LP AN69133 describes how the WaveDAC8 component works and how to use it to generate either predefined or custom waveforms.
AN76458 PSoC® 5LP High Voltage (120-240 VAC) Powerline Communication Solution PSoC 5LP AN76458 describes how to develop a complete powerline communication system with the PSoC 5LP family of devices. Attached to the application note is a code example of a 2400 bps FSK modem with the Cypress powerline network protocol. Also attached are design files of a board that interfaces the PSoC 5LP device to a high voltage (120-240 VAC) powerline.
AN75511 PSoC® 3 / PSoC 5LP - Temperature Measurement with a Thermocouple PSoC 3, PSoC 5LP AN75511 explains the theory of temperature measurement with a thermocouple, and then shows how to do so with a single PSoC® 3 or PSoC 5LP – no need for external ADCs or amplifiers. To make it easy to calculate temperature from the ADC readings, PSoC Creator provides a thermocouple Component. Three example projects are included to demonstrate operation with low and high accuracy and resolution.
AN52701 PSoC® 3 and PSoC 5LP - Getting Started with Controller Area Network (CAN) PSoC 3, PSoC 5LP This application note introduces the basic concepts of CAN (Controller Area Network) and demonstrates how CAN bus communication is implemented using PSoC® 3 and PSoC 5LP.
AN70698 PSoC® 3 and PSoC 5LP – Temperature Measurement with an RTD PSoC 3, PSoC 5LP AN70698 explains the theory of temperature measurement using an RTD, and then shows how to do so with a single PSoC® 3 or PSoC 5LP without the need for external ADCs or amplifiers.
AN58726 PSoC® 3 / PSoC 5LP USB HID Intermediate (with Keyboard and Composite Device) PSoC 3, PSoC 5LP AN58726 is a continuation of basic-level AN57473. It describes additional features of the USB Human Interface Device (HID) protocol, including input and output transactions and composite devices, using PSoC® 3 and PSoC 5LP and the PSoC Creator USBFS component.
AN60590 PSoC® 3, PSoC 4, and PSoC 5LP – Temperature Measurement with a Diode PSoC 3, PSoC 5, PSoC 5LP,
PSoC 4 (PSoC 4100, PSoC 4200)
AN60590 explains diode-based temperature measurement using PSoC® 3, PSoC 4, and PSoC 5LP.
AN84810 PSoC® 3 and PSoC 5LP Advanced DMA Topics PSoC 3, PSoC 5LP AN84810 discusses several advanced PSoC® 3 and PSoC 5LP Direct Memory Access (DMA) topics and design challenges.
AN73054 PSoC® 3 and PSoC 5LP Programming Using an External Microcontroller (HSSP) PSoC 3, PSoC 5LP AN73054 shows how to apply C code to program PSoC® 3 / PSoC 5LP devices using an external microcontroller. This process is referred to as Host Sourced Serial Programming (HSSP), in which the host microcontroller programs PSoC 3 / PSoC 5LP through the serial wire debug (SWD) interface. The C code is written so it can be ported to any microcontroller with minimal changes, greatly reducing the time required to develop HSSP applications for PSoC 3 / PSoC 5LP.
AN79953 Getting Started with PSoC® 4 PSoC 4 (PSoC 4100, PSoC 4200) AN79953 introduces you to PSoC® 4, an ARM® Cortex™-M0 MCU based programmable system-on-chip. It helps you explore the architecture and Creator development tools.
AN82250 PSoC® 3, PSoC 4, and PSoC 5LP Implementing Programmable Logic Designs with Verilog PSoC 3, PSoC 5, PSoC 5LP,
PSoC 4 (PSoC 4200)
AN82250 describes how to implement programmable digital logic designs in the PLD portion of PSoC® 3, PSoC 4 and PSoC 5LP. It introduces the PSoC Universal Digital Blocks (UDBs) and their Programmable Logic Device (PLD) subblocks. An example project illustrates how you can use the PLDs in a design by creating Verilog-based components in PSoC Creator™.
AN92239 Proximity Sensing with CapSense® PSoC 4 (PSoC 4100, PSoC 4200) This application note shows how to implement a robust, low-power, low-cost, CapSense-based proximity sensing system.
AN84858 PSoC® 4 Programming Using an External Microcontroller (HSSP) PSoC 4, PSoC 5LP AN84858 shows you how to implement PSoC® 4 device programming with an external microcontroller by using modular C code.
AN68272 PSoC® 3, PSoC 4 and PSoC 5LP UART Bootloader PSoC 3, PSoC 5, PSoC 5LP,
PSoC 4 (PSoC 4100, PSoC 4200)
AN68272 describes a UART-based bootloader for PSoC® 3, PSoC 4 and PSoC 5LP. In this application note you will learn how to use PSoC Creator™ to quickly and easily build a UART-based bootloader project, and bootloadable projects. It also shows how to build a UART-based embedded bootloader host program.
AN82156 PSoC® 3, PSoC 4, and PSoC 5LP - Designing PSoC Creator™ Components with UDB Datapaths PSoC 3, PSoC 5, PSoC 5LP,
PSoC 4 (PSoC 4200)
This application note explains how to design PSoC® Creator™ components that use PSoC 3, PSoC 4, and PSoC 5LP Universal Digital Block (UDB) datapath modules. Datapath-based components can implement common functions, such as counters, PWMs, shifters, or UARTs. They can also perform data management tasks in programmable logic that would otherwise need to be done by the CPU.
AN90114 PSoC® 4000 Family Low-Power System Design Techniques PSoC 4 (PSoC 4100) AN90114 introduces the low-power modes offered by the PSoC® 4000 family and teaches the methods to design low-power systems.
AN90799 PSoC® 4 Interrupts PSoC 4 (PSoC 4100, PSoC 4200) AN90799 explains the interrupt architecture in PSoC 4 and its configuration in PSoC Creator™ IDE with the help of three example projects.
AN60024 PSoC® 3, PSoC 4, PSoC 5LP Switch Debouncer and Glitch Filter PSoC 3, PSoC 5, PSoC 5LP,
PSoC 4 (PSoC 4200)
This application note introduces the concepts of switch debouncing and glitch filtering for digital input signals, and shows several solutions for PSoC® 3, PSoC 4, and PSoC 5LP, using PSoC Creator™.
AN86526 PSoC® 4 I2C Bootloader PSoC 4 (PSoC 4100, PSoC 4200) AN86526 describes an I2C-based bootloader for PSoC® 4. In this application note, you will learn how to use PSoC Creator™ to quickly and easily build an I2C-based bootloader project and bootloadable project. You will also see how to build an I2C-based embedded bootloader host program.
AN89346 PSoC® 4 Intelligent Fan Controller PSoC 4 (PSoC 4200) AN89346 demonstrates how to quickly and easily develop a 4-wire Brushless DC fan control system using PSoC® 4. The Fan Controller Component, available in PSoC Creator™, helps to manage the fans in a variety of configurations. This application note also shows how to combine fan control and temperature sensing to create a complete thermal management solution using PSoC 4.
AN87391 PSoC® 4 Segment LCD Direct Drive PSoC 4 (PSoC 4100, PSoC 4200) AN87391 demonstrates how easy it is to drive segment LCD glass using the integrated LCD driver in PSoC® 4.
AN62510 Implementing State Machines with PSoC® 3, PSoC 4, and PSoC 5LP PSoC 3, PSoC 5, PSoC 5LP,
PSoC 4 (PSoC 4200)
This application note explains the method to implement state machines using the PSoC® 3/PSoC 4/PSoC 5LP family of devices. Mealy and Moore state machine implementations are shown with associated projects.
AN60590 PSoC® 3, PSoC 4, and PSoC 5LP – Temperature Measurement with a Diode PSoC 3, PSoC 5, PSoC 5LP,
PSoC 4 (PSoC 4100, PSoC 4200)
AN60590 explains diode-based temperature measurement using PSoC® 3, PSoC 4, and PSoC 5LP.
AN86233 PSoC® 4 Low-Power Modes and Power Reduction Techniques PSoC 4 (PSoC 4100, PSoC 4200) AN86233 shows how to use the PSoC® 4 low-power modes and features to operate at very low power levels while retaining essential functionality. Major topics include the five power modes, PSoC Creator power management functions, and other power saving techniques and considerations. A PSoC Creator example project is included.
AN89659 Interfacing SPI F-RAM with PSoC® 4 All SPI F-RAM This code example contains the PSoC® 4 user module for SPI F-RAM access.
AN74875 Designing with Serial I2C nvSRAM All I2C nvSRAM This code example contains the PSoC® 3 user module for I2C nvSRAM access.
AN64574 Designing with Serial Peripheral Interface (SPI) nvSRAM All SPI nvSRAM This code example contains the PSoC® 3 user module for SPI nvSRAM access.

Code Examples integrated with Development Kits

The following Code Examples are integrated with CY8CKIT-050 PSoC® 5LP Development Kit.

Title Part # Description
VoltageDisplay_SAR_ADC PSoC 5LP This example code measures an analog voltage controlled by the potentiometer. The code uses the internal SAR ADC configured for a 12-bit operation; the ADC range is 0 to Vdda. The results are displayed on the character LCD module.
VoltageDisplay_DelSigADC PSoC 5LP This example code measures a simple analog voltage controlled by the potentiometer. The code uses the internal Del-Sig ADC configured for a 20-bit operation; the ADC range is 0 to Vdda. The voltage measurement resolution is in microvolts. The results are displayed on the character LCD module.
IntensityLED PSoC 5LP This example code uses a pulse-width modulator (PWM) to illuminate an LED. When the pulse width of the PWM varies, the LED brightness changes. By continuously varying the pulse width of the PWM, the example code makes an LED go from low brightness to a high brightness and back.
LowPowerDemo PSoC 5LP This code example demonstrates the low-power functionality of PSoC 5LP. The project implements an RTC based code, which goes to sleep and wakes up on the basis of switch inputs. The RTC uses an accurate 32-kHz clock generated using the external crystal provided on the board. When there is a key press, the device is put to sleep while the RTC is kept active.
CapSense PSoC 5LP This code example provides a platform to build CapSense-based projects using PSoC 5LP. The example uses two CapSense buttons and one five-element slider provided on the board. Each capacitive sensor on the board is scanned using the Cypress CSD algorithm. The buttons are pretuned in the example code to take care of factors such as board parasitic.
ADC_DAC PSoC 5LP This project demonstrates sine wave generation by using an 8-bit DAC and DMA. The sine wave period is based on the current value of the ADC value of the potentiometer.
The firmware reads the voltage output by the board potentiometer and displays the raw counts on the LCD. An 8-bit DAC outputs a table generated sine wave to an LED using DMA at a frequency proportional to the ADC count.


The following Code Examples are integrated with CY8CKIT-030 PSoC® 3 Development Kit.

Title Part # Description
VoltageDisplay PSoC 3 This example code measures a simple analog voltage controlled by the potentiometer. The codeuses the internal Delta-Sigma ADC configured for a 20-bit operation; the ADC range is 0 to Vdda. The voltage measurement resolution is in microvolts. The results are displayed on the character LCD module.
IntensityLED PSoC 3 This example code uses a pulse-width modulator (PWM) to illuminate an LED. When the pulse width of the PWM varies, the LED brightness changes. By continuously varying the pulse width of the PWM, the example code makes an LED go from low brightness to a high brightness and back.
LowPowerDemo PSoC 3 This code example demonstrates the low-power functionality of PSoC 3. The project implements an RTC based code, which goes to sleep and wakes up on the basis of switch inputs. The RTC uses an accurate 32-kHz clock generated using the external crystal provided on the board. When there is a key press, the device is put to sleep while the RTC is kept active.
CapSense Example PSoC 3 This code example provides a platform to build CapSense-based projects using PSoC 3. The example uses two CapSense buttons and one five-element slider provided on the board. Each capacitive sensor on the board is scanned using the Cypress CSD algorithm. The buttons are pretuned in the example code to take care of factors such as board parasitic.
ADC_DAC Example PSoC 3 This project demonstrates sine wave generation by using an 8-bit DAC and DMA. The sine wave period is based on the current value of the ADC value of the potentiometer.
The firmware reads the voltage output by the board potentiometer and displays the raw counts on the board character LCD display. An 8-bit DAC outputs a table generated sine wave to an LED using DMA at a frequency proportional to the ADC count.


The following Code Examples are integrated with CY8CKIT-003 PSoC® 3 FirstTouch™ Starter Kit.

Title Part # Description
PSoC Rocks PSoC 3 The PSoC Rocks project displays a rasterized image of the user defined message ("PSoC Rocks!") using persistence of vision. Waving the circuit board back and forth quickly in the plane of the board generates the message.
Bubble Level Emulator PSoC 3 This project emulates a glass bubble level instrument using the onboard accelerometer and the LED display. When the program is run, the LEDs shows the direction in which the board is tilted.
ThermistorTemperature
Sense
PSoC 3 This project measures the current room temperature and displays it as a rasterized image when the board is waved.
CapSense Slider PSoC 3 This project shows how to detect the position of a finger on the CapSense slider of the PSoC 3 First Touch Starter Kit board and indicate its position on the LED display.
 Proximity Sensor PSoC 3 This project senses the presence of a finger near the  proximity detection antenna. The number of LEDs that light up on the LED display on the PSoC 3 FirstTouch Starter Kit board increases as the finger gets closer to the antenna.


The following Code Examples are integrated with CY8CKIT-042 PSoC® 4 Pioneer Kit.

Title Part # Description
Blinking LED PSoC 4 (4200) This example uses a pulse-width modulator (PWM) to illuminate the RGB LED. The PWM output is connected to pin P0_3 (blue) of the RGB LED. The frequency of blinking is set to 1 Hz with a duty cycle of 50 percent. The blinking frequency and duty cycle can be varied by varying the period and compare value respectively.
PWM PSoC 4 (4200) This code example demonstrates the use of the PWM component. The project uses three PWM outputs to set the color of RGB LED on the Pioneer Kit. The LED cycles through seven colors – violet > indigo > blue > green > yellow > orange > red (VIBGYOR). Each color is maintained for a duration of one second. The different colors are achieved by changing the pulse width of the PWMs
Deep Sleep PSoC 4 (4200) This project demonstrates the low-power functionality of the PSoC 4. The LED is turned on for one second to indicate Active mode; then, the device enters Deep-Sleep mode. When switch SW2 is pressed, the device wakes up and the LED is turned on for one second and then goes back into Deep-Sleep mode.
CapSense PSoC 4 (4200) This code example demonstrates CapSense on PSoC 4. The example uses the five-segment CapSense slider on the board. Each capacitive sensor on the slider is scanned using Cypress’s CapSense Sigma Delta (CSD) algorithm implemented in the CapSense component. This project is pre-tuned to take care of the board parasitics.


The following Code Examples are integrated with CY8CKIT-040 PSoC 4000 Pioneer Development Kit.

Title Part # Description
Blinking LED PSoC 4 (4000) The CY8CKIT_040_Blinking_LED.cyprj example uses a PWM block to blink the red LED of the RGB LED, as shown in Figure 5-9. The PWM output is connected to pin P3_2 (red) of the RGB LED. The PWM block is configured as a digital clock signal generator with a frequency of 1 Hz. The blinking rate can be varied by changing the period and compare value of the PWM.
CapSense Proximity and UART PSoC 4 (4000) The project CY8CKIT_040_Proximity_UART.cyprj implements a capacitive proximity sensor control ling the brightness of a LED. The project configures the sensor as a CapSense proximity widget with SmartSense Auto-tuning.
CapSense Touchpad with I2C Tuner PSoC 4 (4000) The project CY8CKIT_40_CapSense_I2C.cyprj demonstrates the implementation of a CapSense Trackpad using SmartSense and an EzI2C-based CapSense Tuner window for viewing the Trackpad coordinates. The project is a simple implementation using SmartSense (minimal tuning). The EzI2C block of PSoC 4000 is interfaced through the PSoC 5LP based USB-I2C bridge to the PC GUI. The project uses the SmartSense feature, which sets all CapSense parameters to the optimum values automatically
Color Palette PSoC 4 (4000) The project CY8CKIT_040_Color_Palette.cyprj demonstrates the capability of PSoC 4000 device to interface with a capacitive Trackpad and control an RGB LED based on the color selected by touching the sticker on top of the Trackpad. The sticker will also include a slider area (part of Trackpad), which will control the color brightness of the RGB LED. The project will demonstrate the proximity sensing capability of the device using a wire. The LED intensity control is done using software Precision Illumination Signal Modulator (PrISM).

 
The following Code Examples are integrated with PSoC 4 CY8CKIT-049 4xxx Prototyping Kits.

Title Part # Description
Bootloader Base Code Example PSoC 4 In the bootloader example, the device rapidly blinks an LED when the bootloader is active, provides UART communication support for bootloading, and reads the state of the switch (SW1). You can observe the state of the board by noticing the rate at which the LED blinks. The bootloader is activated when you plug in the CY8CKIT-049-4xxx while pressing the SW1 button
Bootloadable Code Example PSoC 4 In this code example, the PWM component is used to drive an output on a pin connected to the user LED. The bootloadable component is placed to ensure that your application code is correctly mapped to the target PSoC 4 bootloader flash-space mapping.
LED Blinky PSoC 4 The following example explains how to import a project into your workspace and target the CY8CKIT-049-4xxx development kits. This example is adapted from the following project on the 100 Projects in 100 Days forum: PSoC 4 Pioneer Kit Community Project#067 - PSoC 4 Getting Started Lab 1 (LED Blinky)
Using the USB-Serial as a USB-UART Bridge PSoC 4 This project demonstrates UART communication over the kit USB-UART Bridge. The project uses the Serial Communication Block (SCB) based UART component which sends the string "CY8CKIT-042 USB-UART" and also loops back the data sent over the COM terminal software.


The following Code Example is integrated with CY8CKIT-019 PSoC Shield Adapter Kit.

Title Part # Description
Blinking LED PSoC 4 This is a blinking LED project. A PWM component drives the pin to blink the LED at regular intervals.


The following Code Examples are integrated with CY8CKIT-001 PSoC® Development Kit.

Title Part # Description
LED_with_PWM PSoC 3, PSoC 5LP This project demonstrates basic hardware and software functionality with the PSoC 3 or PSoC 5LP device. It flashes two LEDs independently, one using hardware, the other with software.
ADC to LCD Project PSoC 3, PSoC 5LP This project demonstrates the Delta-Sigma ADC by measuring the voltage of the potentiometer on the board and displays the result on the character LCD of the PSoC development board.
ADC to UART with DAC PSoC 3, PSoC 5LP This project demonstrates sine wave generation by using an 8-bit DAC and DMA. The sine wave period is based on the current value of the ADC value of the potentiometer.
USB HID PSoC 3, PSoC 5LP This project demonstrates a simple HID keyboard.
CapSense PSoC 3, PSoC 5LP This project demonstrates CapSense.   In the main loop it scans the two buttons for activity. If there is a signal from either or both buttons, the corresponding LED lights up.
SAR ADC to UART with DAC PSoC 5LP This project demonstrates sine wave generation by using an 8-bit DAC and DMA. The sine wave period is based on the current value of the ADC value of the potentiometer. The ADC values are also output using a UART.


The following Code Examples are integrated with CY8CKIT-035 PSoC® Power Supervision Expansion Board Kit.

Title Part # Description
Advanced Sequencer PSoC 3 This example demonstrates the following features:
  1. Voltage sequencing
  2. Under-voltage/over-voltage monitoring using the window comparator for rapid fault detection
4+1 Power Supervisor PSoC 3 This example builds on the Example1 project and demonstrates a much more comprehensive power supervisor solution with the following features:
  1. Power supply sequencing
  2. Power supply voltage and current measurement accurate to 0.3%
  3. Power supply active trimming accurate to better than 0.6%
  4. Power supply over-voltage and under voltage fault detection using window comparators


The following Code Examples are integrated with CY8CKIT-025 PSoC Precision Analog Temperature Sensor Expansion Board.

Title Part # Description
Tempsense PSoC 3, PSoC 5LP This example project demonstrates high-precision, high-accuracy, multi-channel temperature sensing using PSoC.
Sequenced ADC PSoC 3, PSoC 5LP This project demonstrates PSoC's ability to sense multiple inputs such as temperature sensor inputs, power rails, and generic analog inputs at a specific sample rate where the 50- or 60-Hz noise is eliminated.
Thermal Management PSoC 3, PSoC 5LP This project demonstrates fan speed control using analog temperature sensors.


The following Code Examples are integrated with CY8CKIT-031 - PSoC® CapSense® Expansion Board Kit.

Title Part # Description
CapSense Matrix Button Module (BMM) PSoC 3, PSoC 5LP This example shows the CapSense Matrix Button Module (BMM) interfacing with the development kit (CY8CKIT-001, CY8CKIT-030, or CY8CKIT-050LP) through the PSoC CapSense Expansion Board. The example demonstrates the CapSense button matrix operation. When any button is touched, the corresponding row and column LEDs turn on. This example also shows the calculator application in the PC with the CapSense BMM as a keypad.
 CapSense Linear Slider Module (SLM) PSoC 3, PSoC 5LP This example shows the CapSense Linear Slider Module (SLM) interfacing with the development kit (CY8CKIT-001, CY8CKIT-030, or CY8CKIT-050LP) through the PSoC CapSense Expansion Board. The example demonstrates the CapSense slider and button combination. The SLM module has 10 element slider and five buttons. The module also has five LEDs. Touch a button on the module to turn on the corresponding LED; placing a finger on the slider, turns on the LED nearest to the finger position. The example also shows a media player application in the PC with buttons and slider on the CapSense SLM as media control buttons.
CapSense Matrix Button Module (BMM) with I2C Tuner PSoC 3, PSoC 5LP This code example can be executed in 2 ways: With Capsense Tuning (requires I2C interface using MiniProg3) and Without Capsense Tuning (no additional requirements) i.e., the same project can be used to demonstrate the capsense functionality as well as Capsense tuning using Tuner Helper GUI in PSoC Creator.
CapSense Linear Slider Module (SLM) with I2C Tuner PSoC 3, PSoC 5LP This code example can be executed in 2 ways: With Capsense Tuning (requires I2C interface using MiniProg3) and Without Capsense Tuning (no additional requirements) i.e., the same project can be used to demonstrate the capsense functionality as well as Capsense tuning using Tuner Helper GUI in PSoC Creator.


The following Code Examples are integrated with CY8CKIT-036 PSoC® Thermal Management Expansion Board Kit.

Title Part # Description
Open-Loop Fan Control PSoC 3, PSoC 5LP In this example project the fan controller component is configured to use the manual control mode. In this mode, PSoC hardware blocks are used to implement the PWMs and the tachometer speed monitor (Tach), but user firmware is entirely responsible for fan speed control. See AN66627.
Firmware Speed Control PSoC 3, PSoC 5LP In this example project the fan controller component is configured to use the manual control mode. A closed loop firmware based speed control algorithm is added along with individual PWM control of each of the fans. See AN66627.
 Hardware Speed Control PSoC 3, PSoC 5LP This example project implements fan speed control all in custom hardware blocks to free the CPU to perform other tasks. See AN66627.
Advanced Hardware Control PSoC 3, PSoC 5LP The purpose of this project is to demonstrate the Acoustic Noise Reduction feature of the hardware speed control logic and how to use interrupts to respond to alerts instead of polling alert status in firmware. See AN66627.
Real-Time Monitoring PSoC 3, PSoC 5LP The purpose of this project is to enable you to monitor the operation of the fan controller component in real time over I2C using a graphical charting GUI. This is useful for evaluating the dynamic performance of the closed-loop hardware controller and fine-tuning and optimizing the parameters set in the component customizer. See AN66627.
Thermal Management PSoC 3, PSoC 5LP The thermal management application calculates zone temperature measurements and sets the zone fan speed periodically. Each thermal zone has a set of fans and associated temperature sensors. The thermal zone temperature is calculated using the individual temperature sensors as inputs and applying an appropriate algorithm to calculate the zone temperature. A table in the firmware maps the zone temperature to the zone fan speed. This table is used to set the fan speed based on the zone temperature. See AN66627.
Open Loop PSoC 4 This project demonstrates how to drive two fans in the open loop mode using the PSoC Creator FanController Component.  See AN89346.
Closed Loop PSoC 4 This project uses the FanController Component to operate the fans with closed-loop speed control. In addition, the alert feature, which includes fan stall error and speed regulation error, is demonstrated in this project. See AN89346.
Thermal Management PSoC 4 This example project demonstrates a complete thermal management solution. It controls two fans based on inputs from two temperature measurement sources – an external I2C digital temperature sensor and an analog output temperature sensor, emulated using a potentiometer. Note that in place of the potentiometer, a thermistor can be used with some additional code to calculate the temperature. See AN89346.


The following Code Examples are integrated with CY8CKIT-017 CAN/LIN Expansion Board Kit.

Title Part # Description
CAN Example 1 PSoC 3 In the CAN_Example_1 project, the CAN component is configured to transmit messages at a baud rate of 500 kbps in full TX/RX mode. CAN messages are scheduled to be transmitted every 100 ms. The ADC samples are transmitted inthese CAN messages. Every 10 ms a “CAN message received” flag is polled. This flag is set everytime a CAN message is received. If the flag is set, the received data is copied from the receive bufferto a variable. The LCD on the first CY8CKIT-001 DVK displays the updated value of both the transmitted and received data. Three LEDs (green, amber, and red) present on the CY8CKIT-017 show the status of the CAN transmission.
CAN Example 2 PSoC 3 This project is designed to work with Can Example 1 in order to demonstrate CAN communication.
LIN Example PSoC 3 This project demonstrates the operation of the LIN slave component.


The following Code Examples are integrated with CY8CKIT-029 PSoC® LCD Segment Drive Expansion Board Kit.

Title Part # Description
Battery Meter PSoC 3, PSoC 5LP This code example demonstrates the battery charge indicator along with the 14-segment display of the LCD glass by implementing a battery meter. The battery meter is used to graphically display the battery charge level; the 14-segment display is used to relay messages related to the battery charge (full, medium, and low).
Stopwatch PSoC 3, PSoC 5LP This code example implements a stopwatch using the RTC component in PSoC Creator. The values hours, minutes, and seconds (HH:MM:SS) are displayed on the 14-segment display of the LCD.
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Fri, 16 Jan 2015 06:33:34 -0600
CE95399 - Voltage Sequencer and power rail monitoring with PSoC 3/5LP http://www.cypress.com/?rID=105653 This example project demonstrates the basic operation of the Voltage Sequencer component.

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Fri, 16 Jan 2015 06:29:38 -0600
CE95392 - USB Bootloader with PSoC 3/5LP http://www.cypress.com/?rID=105643 This datasheet code example demonstrates the operation of the Bootloader with USBFS as an I/O component.

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Fri, 16 Jan 2015 06:28:08 -0600
CE95391 - USB Bootloadable Application with PSoC 3/5LP http://www.cypress.com/?rID=105642 This datasheet code example demonstrates the operation of the Bootloadable component. Add this project to the USBFS_Bootloader code example Workspace and add Dependency to the USBFS_Bootloader to generate the correct code example.

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Fri, 16 Jan 2015 06:25:31 -0600
CE95335 - Management Data Input/Ouput (MDIO) Interface in Advance Mode with PSoC 3/5LP http://www.cypress.com/?rID=105650 This code example demonstrates the advanced mode of the MDIO Interface component by letting the hardware process the frames, and concurrently prints the derived information on the LCD.

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Fri, 16 Jan 2015 06:22:17 -0600
AN80994 - PSoC® 3, PSoC 4, and PSoC 5LP EMC Best Practices and Recommendations http://www.cypress.com/?rID=67839 AN80994 provides recommendations and best practices for improving the EMC performance of designs based on PSoC® 3, PSoC 4, and PSoC 5LP. This application note also details the requirements to pass IEC 61000-4-2 electrostatic discharge (ESD) immunity tests and IEC 61000-4-4 electrical fast transient (EFT) and burst immunity tests.

Introduction

This application note gives engineers the information they need to use Cypress PSoC® 3, PSoC 4, and PSoC 5LP devices to build and test electromagnetic compatibility (EMC)–compliant electronic devices. Included are recommendations to the schematic and PCB designers that help meet EMC specifications. Cypress designed an experimental test board and tested it to provide examples of how to build electronic devices that meet the electrostatic discharge (ESD) and electrical fast transient (EFT) EMC requirements. This application note also presents those test results.

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Tue, 13 Jan 2015 23:34:44 -0600
CE95378 - Static Segment LCD and Sleep with PSoC 3 http://www.cypress.com/?rID=105807 The SegLCD Low Power design project contains an example for the use of the Static Segment LCD in Sleep mode. It shows operation of 7 Segment helper.

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Fri, 09 Jan 2015 02:56:41 -0600
CE95377 - SPI Master and Slave with PSoC 3/5LP http://www.cypress.com/?rID=105806 This datasheet code example demonstrates operation of the SPI (Serial Peripheral Interface) component with the PSoC Creator Software. The communication between SPI Master and SPI Slave is implemented. The SPI Mode 0 (CPOL = 0, CPHA = 0) with 8 byte Rx and Tx software buffers is configured. The bit rate is set to 1 Mbps.

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Fri, 09 Jan 2015 02:53:53 -0600
CE95376 - SPI Slave and DMA with PSoC 3/5LP http://www.cypress.com/?rID=105805 This code example demonstrates operation of the SPI(Serial Peripheral Interface) Slave component with the PSoC Creator Software. The operation of the SPI Master, configuring a DMA transfer and displaying results on LCD screen are described and implemented. This example is intended to be used with the SPIM_code example.

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Fri, 09 Jan 2015 02:50:43 -0600
CE95375 - SPI Master and DMA with PSoC 3/5LP http://www.cypress.com/?rID=105804 This code example demonstrates the operation of the SPI(Serial Peripheral Interface) Master component with the PSoC Creator Software. The operation of the SPI Master, configuring a DMA transfer and displaying results on an LCD screen are described and implemented. This example is intended to be used with the SPIS_code example.

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Fri, 09 Jan 2015 02:47:28 -0600
CE95374 - S/PDIF Transmitter with PSoC 3/5LP http://www.cypress.com/?rID=105803 This datasheet code example demonstrates operation of the S/PDIF Transmitter (SPDIF_Tx) component with the PSoC® Creator™ Software. The operation of the SPDIF_Tx and configuring a DMA transfer for this component are described and implemented.

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Fri, 09 Jan 2015 02:45:37 -0600
CE95373 - Waking up from Low Power modes with the Sleep Timer with PSoC 3/5LP http://www.cypress.com/?rID=105802 This datasheet code example demonstrates operation of the Sleep Timer component with the PSoC Creator Software. The wake up from Sleep low power mode every 4 milliseconds with interrupt issuing is implemented. The Power Management API is used for proper low power mode entry.

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Fri, 09 Jan 2015 02:42:05 -0600
CE95372 - Shift register with PSoC 3/5LP http://www.cypress.com/?rID=105801 This datasheet code example demonstrates operation of the ShiftReg (Shift Register) component with the PSoC Creator Software. The basic functionality of 8-bit and 16-bit shift register is demonstrated.

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Fri, 09 Jan 2015 02:37:05 -0600
CE95371 - Using custom components in a Hierarchical Design with PSoC 3 http://www.cypress.com/?rID=105800 The Shifter project contains an code example for use with the PSoC Creator tutorial: "Basic Hierarchical Design." This project and tutorial demonstrate how to re-use components created in the "Library Component Project" tutorial to create a simple hierarchical design. This project requires the My1stLib project be located in the same root directory.

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Fri, 09 Jan 2015 02:34:06 -0600
CE95370 - My first PSoC Creator Component Library with PSoC 3 http://www.cypress.com/?rID=105799 The My1stLib project contains an example of a library project for use with the PSoC Creator Help tutorial "Library Component Project." This project and tutorial provide an introduction into the process of creating simple shifter components. Add this project to the Shifter code example Workspace and add the dependency to the Shifter to generate the correct code example.

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Fri, 09 Jan 2015 02:31:08 -0600
CE95368 - Segment LCD with PSoC 5 http://www.cypress.com/?rID=105797 The SegLCD Low Power design project contains an example for the use of the Segment LCD component. This example features the Segment LCD in Low Power (ILO) mode at a 62Hz refresh rate. It displays 14 Segment helper.

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Fri, 09 Jan 2015 02:25:49 -0600
CE95318 - Firmware Fan Control with PSoC 3/4/5LP http://www.cypress.com/?rID=105781 This project demonstrates the Fan Controller component configured for firmware based Fan Control enabling designers to customize the control algorithm.

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Fri, 09 Jan 2015 02:05:24 -0600
CE95324 - I2C LCD with PSoC 3/5LP http://www.cypress.com/?rID=105790 This code example demonstartes functionality of I2C LCD component.

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Fri, 09 Jan 2015 01:59:41 -0600
CE95361 - Scanning Comparator using Internal VDAC with PSoC 3/5LP http://www.cypress.com/?rID=105789 This data sheet code example demonstrates operation of the Scanning Comparator (Internal VDAC Per channel Mode) component with the PSoC Creator Software.

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Fri, 09 Jan 2015 01:59:07 -0600
CE95323 - Hardware Fan Control with PSoC 3/5LP http://www.cypress.com/?rID=105788 This project demonstrates the Fan Controller component configured for hardware (UDB) based Fan Control. This method completely frees-up the CPU for other system tasks. This example also demonstrates how to handle FanController exceptions such as fan stall/rotor lock etc. through the use of the alert pin and CPU interrupts.

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Fri, 09 Jan 2015 01:56:08 -0600
CE95360 - Scanning Comparator using common mode with PSoC 3/4/5LP http://www.cypress.com/?rID=105787 This data sheet code example demonstrates operation of the Scanning Comparator (Common Mode) component with the PSoC Creator Software.

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Fri, 09 Jan 2015 01:56:08 -0600
CE95320 - Hello World and Blinky LED with 3/5LP http://www.cypress.com/?rID=105783 This project provides an introduction into the process of creating a design in PSoC Creator. It accomplishes the simple tasks of printing "Hello World" on an LCD, and blinking an LED using a PWM component.

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Fri, 09 Jan 2015 01:38:45 -0600
CE95319 - Hardware Glitch Filter with PSoC 3/4/5LP http://www.cypress.com/?rID=105782 This code example shows how to do glitch filtering in hardware using the PSoC Creator GlitchFilter component.

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Fri, 09 Jan 2015 01:33:40 -0600
CE95317 - Filter from ADC to VDAC using DFB in polling mode with PsoC 3/5LP http://www.cypress.com/?rID=105780 The Filter_ADC_VDAC_poll contain a polling example for the Filter component. FIR Low pass filter with Blackman window is used to filter the 8-bit ADC output. The filtered output is converted into an unsigned value, then fed via an ISR to VDAC to convert it to analog signal.

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Fri, 09 Jan 2015 01:19:03 -0600
CE95316 - Filter from ADC to VDAC using DFB with PSoC 3/5LP http://www.cypress.com/?rID=105779 The Filter_ADC_VDAC contains an example for the use of the Filter component. FIR Low pass filter with Blackman window is used to filter the 8-bit ADC output. The filtered output is converted into an unsigned value, then fed via an ISR to VDAC to convert it to analog signal.

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Fri, 09 Jan 2015 01:14:20 -0600
CE95314 - EZI2C design with PSoC 3/5LP http://www.cypress.com/?rID=105776 This datasheet code example demonstrates operation of the EZI2C (EZ I2C Slave) and I2C (Inter-Integrated Circuit Master/Multi-Master/Slave) components communication. The EZI2C component is configured as one slave device with the 8 bit sub-address size and 100 kbps data rate.

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Fri, 09 Jan 2015 01:06:06 -0600
CE95313 - Emulated EEPROM memory with PSoC 3/4/5LP http://www.cypress.com/?rID=105775 The code example demonstrates the basic functionality of the Emulated EEPROM component.

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Fri, 09 Jan 2015 01:01:48 -0600
CE95312 - External Memory Interface (EMIF) with PSoC 3/5LP http://www.cypress.com/?rID=105773 This data sheet code example demonstrates operation of the EMIF (External Memory Interface) component with the PSoC Creator Software. The Asynchronous External Memory Type, 24 bits Address Width, 8 bits Data Width, 30 ns External Memory Speed configuration is demonstrated.

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Fri, 09 Jan 2015 00:58:05 -0600
CE95357 - Sample and Hold with PSoC 3/5LP http://www.cypress.com/?rID=105772 This code example demonstrates operation of the Sample/Track and Hold component in Sample and Hold mode. This simple example uses a Character LCD to display the Sample and Hold value which is converted using an ADC.

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Fri, 09 Jan 2015 00:57:22 -0600
CE95311 - Emulated File System with PSoC 3/4/5LP http://www.cypress.com/?rID=105771 This code example demonstrates emFile component operation.

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Fri, 09 Jan 2015 00:54:52 -0600
CE95356 - Resistance Temperature Detector (RTD) with PSoC 3/5LP http://www.cypress.com/?rID=105769 This data sheet code example demonstrates operation of the RTD (resistance temperature detector) calculator component with the PSoC Creator Software. The PT100 RTD type, [-50,  150] Temperature Range, minimal calculation error budget, IEC60751 Coefficients is demonstrated.

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Fri, 09 Jan 2015 00:54:04 -0600
CE95310 - EEPROM memory with PSoC 3/5LP http://www.cypress.com/?rID=105768 The EEPROM basic design project contains an example for the use of the EEPROM component. This simple example uses a Character LCD to display data written to EEPROM memory.

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Fri, 09 Jan 2015 00:52:00 -0600
CE95355 - Real Time Clock (RTC) with PSoC 3/5LP http://www.cypress.com/?rID=105767 This datasheet code example demonstrates operation of the RTC (Real Time Clock) component with the PSoC Creator Software. The operation with full time, data and alarm features, including Daylight Savings Time (DST) is implemented.

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Fri, 09 Jan 2015 00:49:22 -0600
CE95309 - Dithered Voltage DAC with PSoC 3/5LP http://www.cypress.com/?rID=105765 This code example demonstrates the basic functionality of the DVDAC component. The Delta Sigma ADC component is used to measure the output voltage.

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Fri, 09 Jan 2015 00:48:29 -0600
CE95308 - Digital Utility Components with PSoC 3/5LP http://www.cypress.com/?rID=105763 This project contains an example of the use of some of the Digital Utility components. Using an Edge Detector and a Basic Counter, falling edge events on a pin are counted and driven to a Status Register. Using a Digital Comparator and a Digital Constant, the Basic Counter is reset whenever the count value reaches 100.

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Fri, 09 Jan 2015 00:45:14 -0600
CE95353 - Quadrature Decoder with PSoC 3/5LP http://www.cypress.com/?rID=105762 This datasheet code example demonstrates operation of the QuadDec (Quadrature Decoder) component with the PSoC Creator Software. The quadrature counts handling and index input usage is demonstrated.

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Fri, 09 Jan 2015 00:43:07 -0600
CE95307 - Die Temperature sensor with PSoC 3/5LP http://www.cypress.com/?rID=105761 The DieTemp basic design project contains an example for the use of Die Temp. This simple example uses a Character LCD to display the current Die Temperature value.

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Fri, 09 Jan 2015 00:41:02 -0600
CE95352 - Fixed Function PWM with PSoC 3/5LP http://www.cypress.com/?rID=105760 This code example demonstrates operation of the PWM Fixed Function component. This simple example uses a Character LCD to display the current PWM Period, Compare values and status of PWM output on the LCD module.

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Fri, 09 Jan 2015 00:40:22 -0600
CE95350 - Pulse Counter with PSoC 3/5LP http://www.cypress.com/?rID=105756 This project contains an example of the use of the Pulse Converter component. 2 Basic Counter components, clocked slower than BUS_CLK, count the number of DMA nrq pulses. One uses the nrq output directly, so it misses pulses. The other uses a Pulse Converter component to guarantee that it does not miss pulses.

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Fri, 09 Jan 2015 00:34:54 -0600
CE95349 - Pseudo Random Sequence (PRS) generator with PSoC 3/4/5LP http://www.cypress.com/?rID=105753 This datasheet code example demonstrates operation of the PRS (Pseudo Random Sequence) component with the PSoC Creator Software. The clocked and API Single Step run modes, 16 bit resolution and single cycles implementation configuration is demonstrated.

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Fri, 09 Jan 2015 00:30:02 -0600
CE95348 - Precise Illumination Signal Modulation (PrISM) with PSoC 3/4/5LP http://www.cypress.com/?rID=105750 This datasheet code example demonstrates operation of the PrISM component with the PSoC Creator Software.  The LED blinking is demonstrated.

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Fri, 09 Jan 2015 00:27:11 -0600
CE95347 - Power Monitoring with PSoC 3/5LP http://www.cypress.com/?rID=105748 This project demonstrates the PowerMonitor component configured for using with 035-Power Management EBK development kit.

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Fri, 09 Jan 2015 00:24:23 -0600
CE95346 - Power Management and Hibernate with PSoC 3/5LP http://www.cypress.com/?rID=105741 This System Reference Guide code example demonstrates operation of the Power Manager API with the PSoC Creator Software. The Hibernate low power mode entry and wake up on external event are implemented.

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Fri, 09 Jan 2015 00:15:29 -0600
CE95306 - Digital Filter Block Assembler with PSoC 3/5LP http://www.cypress.com/?rID=105737 This code example demonstrates the use of the Digital Filter Block (DFB) Assembler component for matrix multiplication by a scalar. It also demonstrates the DFB interaction with DMA.

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Fri, 09 Jan 2015 00:12:50 -0600
CE95305 - Delta Sigma and SPI Master testbench with PSoC 3/5LP http://www.cypress.com/?rID=105733 This is the test project for the 8-ch DelSig ADC and SPI Master Example.

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Fri, 09 Jan 2015 00:08:53 -0600
CE95344 - PMBus Slave in Power Supervision Application with PSoC 3/5LP http://www.cypress.com/?rID=105730 This code example demonstrates usage of the PMBus Slave component in a simulated Power Supervision application.

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Fri, 09 Jan 2015 00:06:22 -0600
CE95304 - Delta Sigma and SPI Master with PSoC 3/5LP http://www.cypress.com/?rID=105729 This Starter Design provides an 8-channel multiplexed Delta Sigma ADC with sequencing logic. The analog inputs to the ADC are converted to digital sequentially and then made available through a SPI Master interface. This design additionally makes use of the LCD character display to provide a debugging output interface.

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Fri, 09 Jan 2015 00:05:10 -0600
CE95303 - Delta Sigma ADC and I2C Slave testbench with PSoC 3/5LP http://www.cypress.com/?rID=105724 This is the test project for the 8-ch DelSig ADC and I2C Slave Example.

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Fri, 09 Jan 2015 00:00:20 -0600
CE95343 - Inverting Programmable Gain Amplifier with PSoC 3/5LP http://www.cypress.com/?rID=105723 This design project contains an example for the use of the PGA_Inv component. This simple example sets the PGA_Inv gain to 1 and outputs a Voltage set in the firmware to a fixed pin. This voltage can be verified using a Multimeter.

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Fri, 09 Jan 2015 00:00:20 -0600
CE95302 - Delta Sigma ADC and I2C Slave with PSoC 3/5LP http://www.cypress.com/?rID=105719 This Starter Design provides an 8-channel multiplexed Delta Sigma ADC with sequencing logic. The analog inputs to the ADC are converted to digital sequentially and then made available through an I2C Slave interface. This design additionally makes use of the LCD character display to provide a debugging output interface.

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Thu, 08 Jan 2015 23:51:26 -0600
CE95342 - Programmable Gain Amplifier (PGA) with PSoC 3/5LP http://www.cypress.com/?rID=105717 This design project contains an example for the use of the PGA component. This simple example sets the PGA gain to 1 and outputs a Voltage set in the firmware to a fixed pin. This voltage can be verified using a Multimeter.

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Thu, 08 Jan 2015 23:48:36 -0600
CE95301 - Delta Sigma ADC and I2C Master testbench with PSoC 3/5LP http://www.cypress.com/?rID=105716 This is the test project for the 8-ch DelSig ADC and I2C master code example.

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Thu, 08 Jan 2015 23:47:57 -0600
CE95300 - Delta Sigma ADC and I2C Master with PSoC 3/5LP http://www.cypress.com/?rID=105713 This Starter Design provides an 8-channel multiplexed Delta Sigma ADC with sequencing logic. The analog inputs to the ADC are converted to digital sequentially and then made available through an I2C Master interface. This design additionally makes use of the LCD character display to provide a debugging output interface.

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Thu, 08 Jan 2015 23:44:44 -0600
CE95299 - Delta Sigma ADC using 16 multiplexed single-ended inputs with PSoC 3/5LP http://www.cypress.com/?rID=105712 This code example demonstrates a convenient way to implement a multi-channel ADC completely in PSoC hardware.

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Thu, 08 Jan 2015 23:41:54 -0600
CE95298 - Switch Debouncer with PSoC 3/4/5LP http://www.cypress.com/?rID=105711 This code example shows how to do switch debouncing in hardware using the PSoC Creator Debouncer component.

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Thu, 08 Jan 2015 23:38:59 -0600
CE95296 - Cyclic Redundancy Check with PSoC 3/4/5LP http://www.cypress.com/?rID=105707 This datasheet code example demonstrates operation of the CRC (Cyclic Redundancy Check) component with the PSoC Creator Software. The CRC-16 polynomial, 16 bit resolution and single cycle configuration is demonstrated.

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Thu, 08 Jan 2015 23:32:23 -0600
CE95339 - Operational Amplifier (OpAmp) with PSoC 3/5LP http://www.cypress.com/?rID=105703 This code example contains an example for the use of the OpAmp component in Non-inverting Mode.

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Thu, 08 Jan 2015 23:23:45 -0600
CE95295 - 8-bit UDB Counter with PSoC 3/5LP http://www.cypress.com/?rID=105701 This project contains an example for the use of the Counter, ISR and clock components. A clock is connected to Count input of Counter via a Sync block. On each rising edge of this clock signal, the Counter will be decremented by one count. The Counter is configured to trigger interrupt on terminal count event. This simple example reads the Counter Period, Count and Compare values and displays them on the LCD module.

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Thu, 08 Jan 2015 23:03:34 -0600
CE95294 - 7-bit Down Counter with PSoC 3/4/5LP http://www.cypress.com/?rID=105700 This code example demonstrates functionality of the Count7 component.

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Thu, 08 Jan 2015 22:53:31 -0600
CE95292 - Analog Voltage Comparator with PSoC 3/5LP http://www.cypress.com/?rID=105698 This code example demonstrates use of the Comparator components.

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Thu, 08 Jan 2015 22:47:00 -0600
CE95291 - Char LCD using Horizontal Bar Graph (Hbar) with PSoC 4 http://www.cypress.com/?rID=105697 The CharLCD Hbar design project contains an example for the use of the CharLCD component. A series of horizontal bar graphs are drawn, left to right. Bars move towards the right, becoming shorter and shorter.

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Thu, 08 Jan 2015 22:43:03 -0600
CE95290 - Char LCD using Custom Font with PSoC 4 http://www.cypress.com/?rID=105696 This code example demonstrates the use of available custom font with the LCD component. It displays "CYPRESS" in custom font on 2 X 16 LCD available with CY8CKIT-001 kit.

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Thu, 08 Jan 2015 22:38:54 -0600
CE95287 - CapSense CSD using Tuner with PSoC 3/5LP http://www.cypress.com/?rID=105688 This CapSense_CSD Tuner Design code example demonstrates operation of the CapSense CSD (Capacitive Sensing using a Delta-Sigma Modulator) component with the PSoC Creator Software and CapSense Tuner software. The component is configured with 2 buttons and linear slider. The CapSense Tuner software is used for displaying scanning results.

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Thu, 08 Jan 2015 20:05:29 -0600
CE95284 - CapSense CSD with PSoC 3/5LP http://www.cypress.com/?rID=105685 This CapSense_CSD_Design code example demonstrates operation of the CapSense CSD component with the PSoC Creator Software and DVK hardware. The component is configured with 2 buttons and linear slider. Visual feedback of a Button/Slider touch can be observed via LEDs/LCD.

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Thu, 08 Jan 2015 19:42:02 -0600
CE95283 - CAN as Remove Node with PSoC 3/5LP http://www.cypress.com/?rID=105684 The CANExampleRemote code example demonstrates use of the CAN Component.  CAN Configuration, transmitting and receiving Full messages, handling Tx and Rx error is demonstrated.  This is only one part of code example, for getting entire example you should also find CANExampleControl project.

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Thu, 08 Jan 2015 19:37:34 -0600
CE95282 - CAN as Control Node with PSoC 3/5LP http://www.cypress.com/?rID=105682 The CANExampleControl code example demonstrates use of the CAN Component.  CAN Configuration, transmitting and receiving Full messages, and handling Tx and Rx errors are demonstrated.  For additional information on use of the CAN component also refer to the CANExampleRemote project.

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Thu, 08 Jan 2015 19:32:28 -0600
CE95279 - Boost Converter with PSoC 3/5LP http://www.cypress.com/?rID=105663 This datasheet code example demonstrates operation of the BoostConv (Boost Converter) component with the PSoC Creator Software. code example demonstrates the usage of the Boost Converter component as a power source for a PSoC chip.

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Thu, 08 Jan 2015 06:18:05 -0600
CE95278 - Basic Design project with PSoC 3/5LP http://www.cypress.com/?rID=105660 The BasicDesign project contains an example for use with the PSoC Creator Help tutorials: "Basic Design" and "Debugging a Design." This project and tutorials provide more details about working with a design, including pins, clocks, and interrupts. They also provide a simple example that can be used with the debugger.

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Thu, 08 Jan 2015 06:13:12 -0600
CE95402 - Generating a Sine wave with the WaveDAC8 Component with PSoC 3/5LP http://www.cypress.com/?rID=105659 This code example demonstrates basic functionality of WaveDAC8 component.

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Thu, 08 Jan 2015 06:12:41 -0600
CE95337 - Analog Signal Mixer with PSoC 3/5LP http://www.cypress.com/?rID=105658 The Mixer_SampleProject contains an example for the use of the Mixer component. The mixer type used is Up mixer or Multiply mixer which multiplies the input signal frequency with the local oscillator frequency. The resultant output waveform can be viewed using an oscilloscope.

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Thu, 08 Jan 2015 06:10:52 -0600
CE95277 - Delta Sigma ADC in single-ended mode with PSoC 3/5LP http://www.cypress.com/?rID=105656 The ADC Single Ended mode code example demonstrates use of the ADC_DelSig component in single ended mode. The input analog voltage fed to the ADC input terminal is converted to the corresponding digital value and this is displayed on the LCD module.

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Thu, 08 Jan 2015 06:08:29 -0600
CE95336 - Management Data Iinput/Output (MDIO) Interface in Basic Mode with PSoC 3/5LP http://www.cypress.com/?rID=105654 This code example demonstrates the basic mode of the MDIO Interface component by processing the received frame in firmware, and then prints the derived information on the LCD.

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Thu, 08 Jan 2015 06:07:01 -0600
CE95398 - Voltage Fault Detector with PSoC 3/5LP http://www.cypress.com/?rID=105652 This datasheet example project demonstrates the operation of the Voltage Fault Detector.

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Thu, 08 Jan 2015 06:03:00 -0600
CE95397 - Voltage DAC with PSoC 3/5LP http://www.cypress.com/?rID=105651 This design project contains an example for the use of the VDAC component. This simple example sets the VDAC range to 1.020V and outputs a Voltage set in the firmware to a fixed pin. This voltage can be verified using a Multimeter.

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Thu, 08 Jan 2015 06:00:53 -0600
CE95396 - USB UART with PSoC 3/5LP http://www.cypress.com/?rID=105649 This datasheet code example demonstrates the operation of the USBFS component as an RS-232 logical cable replacement.

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Thu, 08 Jan 2015 05:58:49 -0600
CE95395 - USB MIDI with PSoC 3/5LP http://www.cypress.com/?rID=105648 This datasheet code example demonstrates the operation of the MIDI interface device operation.

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Thu, 08 Jan 2015 05:56:11 -0600
CE95334 - Lookup table (LUT) with PSoC 3/4/5LP http://www.cypress.com/?rID=105647 The LUT Example design project contains an example for the use of the LUT component. This simple example sets the input and output to 2. Output is verified using a Character LCD.

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Thu, 08 Jan 2015 05:54:14 -0600
CE95394 - USB HID Mouse with PSoC 3/5LP http://www.cypress.com/?rID=105646 This datasheet code example demonstrates the operation of the USBFS (Full Speed USB) component with the PSoC Creator software. It also shows the USB mouse implementation.

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Thu, 08 Jan 2015 05:53:55 -0600
CE95393 - USB Bulk Transfer with PSoC 3/5LP http://www.cypress.com/?rID=105645 This datasheet code example demonstrates the operation of the USBFS (Full Speed USB) component with the PSoC Creator software. It also shows the Bulk transfers implementation.

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Thu, 08 Jan 2015 05:52:01 -0600
CE95332 - Local Interconnect Network (LIN) Slave with PSoC 3/5LP http://www.cypress.com/?rID=105641 This datasheet code example demonstrates the LIN Slave component operation: signal interaction APIs, Transport Layer and Configuration services usage.

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Thu, 08 Jan 2015 05:43:56 -0600
CE95390 - USB Audio with PSoC 3/5LP http://www.cypress.com/?rID=105640 This datasheet code example demonstrates the operation of the 8-bit, 32-kHz, mono USB Audio Device.

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Thu, 08 Jan 2015 05:42:26 -0600
CE95389 - UART Transmit with PSoC 3/4/5LP http://www.cypress.com/?rID=105639 The UART Tx design project contains an example for the use of the UART component. This example demonstrates the UART Transmission (Tx) mechanism. Data sent via the serial port is displayed on Hyperterminal and the LCD module.

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Thu, 08 Jan 2015 05:40:57 -0600
CE95388 - UART Receive with PSoC 3/4/5LP http://www.cypress.com/?rID=105638 The UART Rx design project contains an example for the use of the UART component. This example demonstrates the UART Reception (Rx) mechanism. Data input via Hyperterminal is sent through the serial port and displayed on the LCD module.

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Thu, 08 Jan 2015 05:38:48 -0600