Cypress.com: Documentation http://www.cypress.com/?app=search&searchType=advanced&id%3D2232 PSoC 3 Device Programming http://www.cypress.com/?rID=40740 Sat, 23 May 2015 10:40:39 -0600 AN84810 - PSoC® 3 and PSoC 5LP Advanced DMA Topics http://www.cypress.com/?rID=82680 AN84810 discusses several advanced PSoC® 3 and PSoC 5LP direct memory access (DMA) topics and design challenges.This application note builds upon the fundamental concepts introduced in AN52705 – Getting Started with DMA. Topics covered include indexed transfers, timing and bandwidth considerations, data alignment, and DMA debugging tips.

Introduction

Direct memory access (DMA) controllers transfer data between peripherals and memory without CPU intervention. The DMA controller (DMAC) in PSoC® 3 and PSoC 5LP features 24 channels and 128 transaction descriptors (TDs), making it very versatile for a wide variety of applications. PSoC Creator™, the development environment for PSoC, has tools including a DMA wizard and component APIs that make it easy to design complex DMA functions.



Project
Device
PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Compiler
Architecture
Silicon
Revision
 V3.0 SP2 or higher  V2.2/2.1
001
DVK
030/050
DVK
003/014
FTK
Keil
GCC
RVDS
MDK

AN84810.zip

Prod
YES
No
YES
YES*
NO
YES
N/A
N/A
N/A
Prod
YES
No
YES
YES*
NO
N/A
YES
YES
YES
*Refer to Migrating CY8CKIT-001 DVK project to CY8CKIT 030/050.
]]>
Fri, 22 May 2015 15:28:26 -0600
AN84783 - Accurate Measurement Using PSoC® 3 and PSoC 5LP Delta-Sigma ADCs http://www.cypress.com/?rID=82678 AN84783 shows how to increase the accuracy of measurements using the 20-bit Delta-Sigma ADC in PSoC 3 and PSoC 5LP. Major topics include effective resolution, gain and offset errors, nonlinearity, and accuracy improvement techniques. A spreadsheet is provided to assist ADC performance analysis and to optimize ADC Component configuration.

Introduction

Accurate measurement of physical quantities is important for many applications. In most measurement systems, you use a transducer to convert a physical quantity to a voltage. This voltage is sent through signal conditioning circuitry, if necessary, and then to an analog-to-digital converter (ADC).

The following table indicates the PSoC devices, PSoC Creator versions, compilers, and development kits that will work with this application note project:



Project
Device
PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Compiler
Architecture
Silicon
Revision
V3.1
V2.2/
2.1
001
DVK
030/050
DVK
003/014
FTK
Keil
GCC
RVDS
MDK

AN84783.zip

Prod
YES
NO
NO
YES
NO
YES
N/A
N/A
N/A
Prod
YES
NO
NO
YES
NO
N/A
YES
YES
YES
]]>
Fri, 22 May 2015 15:28:15 -0600
AN84401 - PSoC® 3 and PSoC 5LP SPI Bootloader http://www.cypress.com/?rID=78703 AN84401 describes a SPI-based bootloader for PSoC® 3 and PSoC 5LP. In this application note you will learn how to use PSoC Creator™ to quickly and easily build SPI-based bootloader and bootloadable projects. It also shows how to build a SPI-based embedded bootloader host program.

Introduction

Bootloading is a process that allows you to upgrade your system firmware over a standard communication interface such as USB, I2C, UART or SPI. A bootloader communicates with a host to get new application code or data, and writes it into the device's flash memory.

This application note describes a SPI based bootloader for PSoC 3 and PSoC 5LP. To get introduced to basics of PSoC 3 and PSoC 5LP Bootloader please refer AN73854 - PSoC® 3 and PSoC 5LP - Introduction to Bootloaders. If you intend to learn how to develop USB and I2C Bootloader for PSoC 3 and PSoC 5LP, AN73503 - USB HID Bootloader for PSoC® 3 and PSoC 5LP and AN60317 – PSoC 3 and PSoC 5LP I2C Bootloader  respectively should get you going.

The following table indicates the PSoC devices, PSoC Creator versions, compilers, and development kits that will work with this application note project:


Project
Device
PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Compiler
Architecture
Silicon
Revision
V3.0 SP1
or higher
V2.1 SP1
001
DVK
030/050
DVK
003/014
FTK
Keil
GCC
RVDS
MDK

AN84401.zip

Prod
YES
NO
YES*
YES
NO
YES
N/A
N/A
N/A
Prod
YES
NO
YES*
YES
NO
N/A
YES
YES
YES

*Refer to Migrating CY8CKIT-001 DVK project to CY8CKIT 030/ 050

Projects associated with this application note can be downloaded from the 'Related Files' section below.

]]>
Fri, 22 May 2015 15:28:03 -0600
AN83902 - PSoC® 3 and PSoC 5LP – Creating a CFP Management Interface http://www.cypress.com/?rID=76858 AN83902 shows how to create a CFP (C Form-factor Pluggable) Management Interface using PSoC® 3 or PSoC 5LP. Included are two example projects that demonstrate the Management Data Input/Output (MDIO) Interface Component, which controls the interface bus used in CFP optical modules.

]]>
Fri, 22 May 2015 15:27:41 -0600
AN82072 - PSoC<sup>®</sup> 3 and PSoC 5LP USB General Data Transfer with Standard HID Drivers http://www.cypress.com/?rID=70131 AN82072 discusses how to use PSoC® 3 and PSoC 5LP devices to transfer generic data across USB using native OS drivers included with Windows, Mac OS, and Linux.These drivers are part of the Human Interface Device (HID) class, which is commonly used to support devices such as mice and keyboards, but can also be used for generic data transfers.A PSoC project and a program for each operating system (with source code) demonstrating generic data transfers are included with this application note.

Notes:

  1. Click on AN77835 - PSoC® 3 to PSoC 5LP Migration Guide to learn differences between PSoC 3 and PSoC 5LP.
  2. For PSoC 5 project and related document, please download file AN82072_Archive.zip.


Project
Device
PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Compiler
Architecture
Silicon
Revision
V2.1 SP1
or higher
V2.1/2.0
001
DVK
030/050
DVK
003/014
FTK
Keil
GCC
RVDS
MDK

AN82072.zip

Prod
YES
NO
YES
YES*
NO
YES
N/A
N/A
N/A
Prod
YES
NO
YES
YES*
NO
N/A
YES
YES
YES
AN82072_Archive.zip
ES3, Prod
NO
YES
YES
YES*
NO
YES
N/A
N/A
N/A
ES1, Prod
NO
YES
YES
YES*
NO
N/A
YES
YES
YES

Projects associated with this application note can be downloaded from the 'Related Files' section below. For your convenience, we have provided projects that are compatible with the two most recent versions of PSoC Creator:

  • AN82072.zip is used with PSoC Creator 2.1 SP1
  • AN82072_Archive.zip is used with PSoC Creator 2.1/2.0

The project’s default settings may not be compatible with your device or kit, and you may need to change your project settings. For more information, see:

PSoC® 3, PSoC 4 and PSoC 5LP AN Project File Naming Convention and Use
]]>
Fri, 22 May 2015 15:27:24 -0600
AN80248 - PSoC® 3, PSoC 5LP Improving the Accuracy of Internal Oscillators http://www.cypress.com/?rID=67061 Two components developed for this purpose greatly simplify the process of calibrating the ILO and IMO with respect to a reference time base.

Introduction

PSoC® 3 and PSoC 5LP (hereafter referred to as PSoC) have a very powerful clocking system. This system offers the flexibility and performance to suit the needs of most embedded applications. It is comprised of clock sources and a clock distribution network. The clock sources available to you are: the internal main oscillator (IMO), external crystal oscillators (ECO) and internal low-speed oscillator (ILO). This application note describes the IMO and ILO as well a method to improve their accuracy through run-time calibration.

The following table indicates the PSoC devices, PSoC Creator versions, compilers, and development kits that will work with this application note project:


Project
Device
PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Compiler
Architecture
Silicon
Revision
V2.2
or higher
V2.1
001
DVK
030/050
DVK
003/014
FTK
Keil
GCC
RVDS
MDK

AN80248.zip

Prod
YES
NO
YES
YES
NO
YES
N/A
N/A
N/A
Prod
YES
NO
YES
YES
NO
N/A
YES
YES
YES
Prod
YES
NO
YES
YES
NO
N/A
YES
YES
YES

Notes:

  1. Click on AN77835 - PSoC® 3 to PSoC 5LP Migration Guide to learn differences between PSoC 3 and PSoC 5LP.
  2. For PSoC 5 project and related document, please download file AN80248_Archive.zip.

Projects associated with this application note can be downloaded from the 'Related Files' section below. For your convenience, we have provided projects that are compatible with the two most recent versions of PSoC Creator:

  • AN80248.zip is used with PSoC Creator 2.2
  • AN80248_Archive.zip is used with PSoC Creator 2.1/2.0

The project’s default settings may not be compatible with your device or kit, and you may need to change your project settings. For more information, see:

PSoC® 3, PSoC 4 and PSoC 5LP AN Project File Naming Convention and Use
]]>
Fri, 22 May 2015 15:27:00 -0600
AN79973 - PSoC3 and PSoC5 CapSense CSD - IEC 60730 Class B Safety Software Library http://www.cypress.com/?rID=64057 AN79973 details the self-check tests and their implementation details to match the IEC60730 standards that ensure reliable and safe operation of CapSense CSD  component in PSoC 3 and PSoC 5 devices.

The following table indicates the PSoC devices, PSoC Creator versions, compilers, and development kits that will work with this application note project:


Project
Device
PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Compiler
Architecture
Silicon
Revision
V2.0
V2.1 SP1
V2.2
or higher
001
DVK
030/050
DVK
003/014
FTK
Keil
GCC
RVDS
MDK

AN79973.zip

Prod
YES
YES
YES
YES
YES
NO
YES
N/A
N/A
N/A
Prod
YES
YES
YES
YES
YES
NO
N/A
YES
YES
YES
Prod
YES
YES
YES
YES
YES
NO
N/A
YES
YES
YES

Refer to Migrating CY8CKIT-001 DVK project to CY8CKIT 030/ 050.

]]>
Fri, 22 May 2015 15:26:44 -0600
AN78175 - PSoC<sup>®</sup> 3 and PSoC 5LP - IEC 60730 Class B Safety Software Library http://www.cypress.com/?rID=61356 Library routines and examples in the example project can be directly integrated with the end user?s application. This application note also describes the API functions that are available in the Library.

The International Electrotechnical Commission (IEC) has developed safety standard IEC 60730-1 that discusses mechanical, electrical, electronic, environmental endurance, EMC, and abnormal operation for home appliances.

This application note focuses on Annex H Class B: Requirements for Electronic Controls. This portion of the standard details test and diagnostic methods to ensure safe operation of embedded control hardware and software for home appliances.  


Project
Device
PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Compiler
Architecture
Silicon
Revision
V2.2 SP1
or higher
V2.1 SP1/
V2.1
001
DVK
030/050
DVK
003/014
FTK
Keil
GCC
RVDS
MDK

AN78175.zip

Prod
YES
NO
YES
YES*
NO
YES
N/A
N/A
N/A
Prod
YES
NO
YES
YES*
NO
N/A
YES
YES
YES
AN78175_Archive.zip
ES3, Prod
NO
YES
YES
YES*
NO
YES
N/A
N/A
N/A
ES1, Prod
NO
YES
YES
YES*
NO
N/A
YES
YES
YES

*Refer to Migrating CY8CKIT-001 DVK project to CY8CKIT 030/ 050

Notes:
  1. Click on AN77835 - PSoC® 3 to PSoC 5LP Migration Guide to learn differences between PSoC 3 and PSoC 5LP.
  2. For PSoC 5 project and related document, please download file AN78175_Archive.zip.

Projects associated with this application note can be downloaded from the 'Related Files' section below. For your convenience, we have provided projects that are compatible with the two most recent versions of PSoC Creator:

  • AN78175.zip is used with PSoC Creator 2.2 SP1
  • AN78175_Archive.zip is used with PSoC Creator 2.1 SP1/2.1

The project’s default settings may not be compatible with your device or kit, and you may need to change your project settings. For more information, see:

PSoC® 3, PSoC 4 and PSoC 5LP AN Project File Naming Convention and Use
]]>
Fri, 22 May 2015 15:26:32 -0600
AN76439 - PSoC® 3 and PSoC 5LP - Phase-Shift Full-Bridge Modulation and Control http://www.cypress.com/?rID=73644 This application note introduces phase-shift full-bridge (PSFB) modulation. This is a modulation commonly found in zero-voltage switching (ZVS) converters, a group within the family of soft-switched converters. This application note focuses on how a PSFB modulator is implemented in PSoC. Both analog and digital design variations are explored. In addition there is some light discussion about control approaches.

In addition, this application note assumes that you are familiar with developing applications using PSoC Creator™ for PSoC 5LP. If you are new to PSoC 5LP, please refer AN77759, Getting Started with PSoC 5LP. If you are new to PSoC Creator, go to www.cypress.com/go/psoccreator for information about the world’s leading development environment for programmable mixed-signal systems.

The following table indicates the PSoC devices, PSoC Creator versions, compilers, and development kits that will work with this application note project:


Project
Device
PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Compiler
Architecture
Silicon
Revision
V2.2 SP1
or higher
V2.1/2.0
001
DVK
030/050
DVK
003/014
FTK
Keil
GCC
RVDS
MDK

AN76439.zip

Prod
YES
NO
YES
YES*
NO
YES
N/A
N/A
N/A
Prod
YES
NO
YES
YES*
NO
N/A
YES
YES
YES

*Refer to Migrating CY8CKIT-001 DVK project to CY8CKIT 030/ 050

Note:

  1. Click on AN77835 - PSoC® 3 to PSoC 5LP Migration Guide to learn differences between PSoC 3 and PSoC 5LP

Projects associated with this application note can be downloaded from the 'Related Files' section below.

The project’s default settings may not be compatible with your device or kit, and you may need to change your project settings. For more information, see:

PSoC® 3, PSoC 4 and PSoC 5LP AN Project File Naming Convention and Use
]]>
Fri, 22 May 2015 15:25:12 -0600
AN75511 - PSoC® 3 / PSoC 5LP - Temperature Measurement with a Thermocouple http://www.cypress.com/?rID=60544 The following table indicates the PSoC devices, PSoC Creator versions, compilers, and development kits that will work with this application note project:


Project
Device
PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Compiler
Architecture
Silicon
Revision
V2.1 SP1
or higher
V2.1/2.0
001
DVK
030/050
DVK
003/014
FTK
Keil
GCC
RVDS
MDK

AN75111.zip

Prod
YES
NO
YES
YES*
NO
YES
N/A
N/A
N/A
Prod
YES
NO
YES
YES*
NO
N/A
YES
YES
YES

*Refer to Migrating CY8CKIT-001 DVK project to CY8CKIT 030/ 050.

Notes:
  1. Click on AN77835 - PSoC® 3 to PSoC 5LP Migration Guide to learn differences between PSoC 3 and PSoC 5LP.
  2. For PSoC 5 project and related document, please download file AN75111_Archive.zip.

Projects associated with this application note can be downloaded from the 'Related Files' section below. For your convenience, we have provided projects that are compatible with the two most recent versions of PSoC Creator:

  • AN75111.zip is used with PSoC Creator 2.1 SP1
  • AN75111_Archive.zip is used with PSoC Creator 2.1/2.0

The project’s default settings may not be compatible with your device or kit, and you may need to change your project settings. For more information, see:

PSoC® 3, PSoC 5, and PSoC 5LP AN Project File Naming Convention and Use

   Video

use for camtasia screencasts
use for camtasia screencasts
]]>
Fri, 22 May 2015 15:24:09 -0600
AN73503 - USB HID Bootloader for PSoC<sup>®</sup> 3 and PSoC 5LP http://www.cypress.com/?rID=57561 AN73503 describes how to implement a USB bootloader for PSoC 3 and PSoC 5LP devices by using the USB Human Interface Device (HID) class. It also shows how to build a Windows-based USB host program. A PSoC Creator project and an example host program are included.

Introduction

Bootloaders are a common part of MCU system design. A bootloader makes it possible for a product's firmware to be updated in the field. At the factory, initial programming of firmware into a product is typically done through the MCU’s Joint Test Action Group (JTAG) or Serial Wire Debugger (SWD) interface. However, these interfaces are usually not available in the field.

This is where bootloading comes in. Bootloading is a process that allows you to upgrade your system firmware over a standard communication interface such as USB or I2C. A bootloader communicates with a host to get new application code or data, and writes it into the device’s flash memory.

To get introduced to basics of PSoC 3 and PSoC 5LP Bootloader please refer  AN73854 - PSoC® 3 and PSoC 5LP - Introduction to Bootloaders. If you intend to learn how to develop I2C Bootloader for PSoC 3 and PSoC 5LP,  AN60317 - PSoC® 3/PSoC 5LP I2C Bootloader  should get you going. 

Since the projects involve the use of USB component, in case of PSoC 5LP it is mandatory to use an external 24 MHz crystal.

The Bootloader GUI provided with this App Note has been tested to work on full-fledged Windows operating system only.
The GUI is not tested and not guaranteed to work on Virtual machines.
 


Project
Device
PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Compiler
Architecture
Silicon
Revision
V3.0 SP1 V2.1 SP1
/V2.1
001
DVK
030/050
DVK
003/014
FTK
Keil
GCC
RVDS
MDK

AN73503.zip

Prod
YES
NO
YES
YES*
NO
YES
N/A
N/A
N/A
Prod
YES
NO
YES
YES*
NO
N/A
YES
YES
YES
AN73503_Archive.zip
ES3, Prod
NO
YES
YES
YES*
NO
YES
N/A
N/A
N/A
ES1, Prod
NO
YES
YES
YES*
NO
N/A
YES
YES
YES

*Refer to Migrating CY8CKIT-001 DVK project to CY8CKIT 030/ 050

Notes:

  1. Click on AN77835 - PSoC® 3 to PSoC 5LP Migration Guide to learn differences between PSoC 3 and PSoC 5LP.
  2. For PSoC 5 project and related document, please download file AN73503_Archive.zip.

Projects associated with this application note can be downloaded from the ‘Related Files’ section below. For your convenience, we have provided projects that are compatible with the two most recent versions of PSoC Creator:

  • AN73503.zip is used with PSoC Creator 3.0 SP1
  • AN73503_Archive.zip is used with PSoC Creator 2.1 SP1/2.1

The project’s default settings may not be compatible with your device or kit, and you may need to change your project settings. For more information, see:

PSoC® 3, PSoC 5, and PSoC 5LP AN Project File Naming Convention and Use
]]>
Fri, 22 May 2015 15:23:52 -0600
AN73468 - PSoC® 3 and PSoC 5LP - Single-Cell Lithium-Ion (Li-ion) Battery Charger http://www.cypress.com/?rID=58095 Li-ion batteries are used in a wide range of systems such as cameras, cell phones, electric shavers, and toys. The charging circuit for the batteries can either be an integral part of the system (online charging) or an external plug-in circuit (offline charging). With its wide range of devices, PSoC offers a cost-effective solution in both segments. And with its configurable digital and analog features, PSoC 3 or PSoC 5LP enables implementation of other critical tasks required in the system.



Project
Device
PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Compiler
Architecture
Silicon
Revision
V3.0 or
higher
V2.1 SP1/
V2.1
001
DVK
030/050
DVK
003/014
FTK
Keil
GCC
RVDS
MDK

AN73468.zip

Prod
YES
NO
YES
YES*
NO
YES
N/A
N/A
N/A
Prod
YES
NO
YES
YES*
NO
N/A
YES
YES
YES
AN73468_Archive.zip
ES3, Prod
NO
YES
YES
YES*
NO
YES
N/A
N/A
N/A
ES1, Prod
NO
YES
YES
YES*
NO
N/A
YES
YES
YES

*Refer to Migrating CY8CKIT-001 DVK project to CY8CKIT 030/ 050

Projects associated with this application note can be downloaded from the 'Related Files' section below. For your convenience, we have provided projects that are compatible with the two most recent versions of PSoC Creator:

  • AN73468.zip is used with PSoC Creator 3.0 or higher
  • AN73468_Archive.zip is used with PSoC Creator 2.1 SP1/2.1

The project’s default settings may not be compatible with your device or kit, and you may need to change your project settings. For more information, see:

PSoC® 3, PSoC 5, and PSoC 5LP AN Project File Naming Convention and Use
]]>
Fri, 22 May 2015 15:23:39 -0600
AN73054 - PSoC® 3 and PSoC 5LP Programming Using an External Microcontroller (HSSP) http://www.cypress.com/?rID=57435 PSoC 3 / PSoC 5LP device programming refers to programming of the nonvolatile memory in PSoC 3 / PSoC 5LP using an external host programmer. The host can be the MiniProg3 Programmer supplied by Cypress; a third-party programmer; or a custom-made programmer, such as an on-board microcontroller.


Project
Device
PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Compiler
Architecture
Silicon
Revision
 V2.1 SP1
or higher
V2.1/2.0
001
DVK
030/050
DVK
003/014
FTK
Keil
GCC
RVDS
MDK

AN73054.zip

Prod
YES
NO
YES
YES*
NO
N/A
YES
YES
YES
AN73054_Archive.zip
ES3, Prod
NO
YES
YES
YES*
NO
YES
N/A
N/A
N/A
ES1, Prod
NO
YES
YES
YES*
NO
N/A
YES
YES
YES

*Refer to Migrating CY8CKIT-001 DVK project to CY8CKIT 030/ 050.

Notes:
  1. Click on AN84741 - PSoC® 5 to PSoC 5LP Migration Guide to learn differences between PSoC 5 and PSoC 5LP.
  2. For PSoC 5 project and related document, please download file AN73054_Archive.zip.

Projects associated with this application note can be downloaded from the 'Related Files' section below. For your convenience, we have provided projects that are compatible with the two most recent versions of PSoC Creator:

  • AN73054.zip is used with PSoC Creator 2.1 SP1
  • AN73054_Archive.zip is used with PSoC Creator 2.1/2.0

The project’s default settings may not be compatible with your device or kit, and you may need to change your project settings. For more information, see:

PSoC® 3, PSoC 5, and PSoC 5LP AN Project File Naming Convention and Use
]]>
Fri, 22 May 2015 15:23:22 -0600
AN70698 - PSoC® 3 and PSoC 5LP – Temperature Measurement with an RTD http://www.cypress.com/?rID=57546 To make it easy to calculate temperature from ADC readings, PSoC Creator provides an RTD Component. Four example projects are included to demonstrate operation with both low and high levels of accuracy and resolution.

Introduction

Temperature is one of the most frequently measured environmental variables. Temperature measurement is typically done using one of four sensors: resistance temperature detector (RTD), thermocouple, thermistor, and diode.

The following table indicates the PSoC devices, PSoC Creator versions, compilers, and development kits that will work with this application note project:
 


Project
Device
PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Compiler
Architecture
Silicon
Revision
V2.2 SP1
or higher
V2.1 SP1/
V2.1
001
DVK
030/050
DVK
003/014
FTK
Keil
GCC
RVDS
MDK

AN70698.zip

Prod
YES
NO
YES
YES*
NO
YES
N/A
N/A
N/A
Prod
YES
NO
YES
YES*
NO
N/A
YES
YES
YES

* Refer to Migrating CY8CKIT-001 DVK project to CY8CKIT 030/ 050.

Notes:

  1. Click on AN77835 - PSoC® 3 to PSoC 5LP Migration Guide to learn differences between PSoC 3 and PSoC 5LP.
  2. For PSoC 5 project and related document, please download file AN70698_Archive.zip.

Projects associated with this application note can be downloaded from the 'Related Files' section below. For your convenience, we have provided projects that are compatible with the two most recent versions of PSoC Creator:

  • AN70698.zip is used with PSoC Creator 2.2 SP1
  • AN70698_Archive.zip is used with PSoC Creator 2.1 SP1/2.1

The project’s default settings may not be compatible with your device or kit, and you may need to change your project settings. For more information, see:

PSoC® 3, PSoC 5, and PSoC 5LP AN Project File Naming Convention and Use
]]>
Fri, 22 May 2015 15:23:05 -0600
AN69133 - PSoC® 3 / PSoC 5LP Easy Waveform Generation with the WaveDAC8 Component http://www.cypress.com/?rID=54728 The WaveDAC8 uses DMA to generate continuous waveforms that require no CPU overhead. Several example projects are included to show simple waveform generation, frequency shift keying (FSK) modulation, and DTMF tone generation with minimal hardware and user code.

The video below is a brief overview of the application note and the WaveDAC8 PSoC Creator component.

The following table indicates the PSoC devices, PSoC Creator versions, compilers, and development kits that will work with this application note project:


Project
Device
PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Compiler
Architecture
Silicon
Revision
V2.1 SP1
or higher
V2.1/2.0
001
DVK
030/050
DVK
003/014
FTK
Keil
GCC
RVDS
MDK

AN69133.zip

Prod
YES
NO
YES
YES*
NO
YES
N/A
N/A
N/A
Prod
YES
NO
YES
YES*
NO
N/A
YES
YES
YES
AN69133_Archive.zip
ES2, ES3, Prod
NO
YES
YES
YES*
NO
YES
N/A
N/A
N/A
ES1, Prod
NO
YES
YES
YES*
NO
N/A
YES
YES
YES

*Refer to Migrating CY8CKIT-001 DVK project to CY8CKIT 030/ 050.

Notes:
  1. For PSoC 5 project and related document, please download file AN69133_Archive.zip.

Projects associated with this application note can be downloaded from the ‘Related Files’ section below. For your convenience, we have provided projects that are compatible with the two most recent versions of PSoC Creator:

  • AN69133.zip is used with PSoC Creator 2.1 SP1
  • AN69133_Archive.zip is used with PSoC Creator 2.1/2.0

The project’s default settings may not be compatible with your device or kit, and you may need to change your project settings. For more information, see:

PSoC® 3 and PSoC 5 AN/CE project file naming convention and usage
]]>
Fri, 22 May 2015 15:22:46 -0600
AN68403 - PSoC® 3 and PSoC 5LP Analog Signal Chain Calibration http://www.cypress.com/?rID=50320 An example of a programmable gain amplifier as part of the analog signal chain is described. This application note also shows how the gain and offset errors can be eliminated in the entire signal chain.

The following table indicates the PSoC devices, PSoC Creator versions, compilers, and development kits that will work with this application note project:


Project
Device
PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Compiler
Architecture
Silicon
Revision
V2.1 SP1
or higher
V2.1/2.0
001
DVK
030/050
DVK
003/014
FTK
Keil
GCC
RVDS
MDK

AN68403.zip

Prod
YES
NO
YES
YES*
NO
YES
N/A
N/A
N/A
Prod
YES
NO
YES
YES*
NO
N/A
YES
YES
YES
AN68403_Archive.zip
ES2, ES3, Prod
NO
YES
YES
YES*
NO
YES
N/A
N/A
N/A
ES1, Prod
NO
YES
YES
YES*
NO
N/A
YES
YES
YES

*Refer to Migrating CY8CKIT-001 DVK project to CY8CKIT 030/ 050

Note:
  1. For PSoC 5 project and related document, please download file AN68403_Archive.zip.


Projects associated with this application note can be downloaded from the ‘Related Files’ section below. For your convenience, we have provided projects that are compatible with the two most recent versions of PSoC Creator:

  • AN68403.zip is used with PSoC Creator 2.1 SP1
  • AN68403_Archive.zip is used with PSoC Creator 2.1/2.0

The project’s default settings may not be compatible with your device or kit, and you may need to change your project settings. For more information, see:

PSoC® 3, PSoC 4 and PSoC 5LP AN Project File Naming Convention and Use
]]>
Fri, 22 May 2015 15:22:16 -0600
AN66627 - PSoC® 3 and PSoC 5LP Intelligent Fan Controller http://www.cypress.com/?rID=49077 AN66627 demonstrates how to quickly and easily develop four-wire brushless DC fan control systems using PSoC® 3 or PSoC 5LP. The Fan Controller Component, available in PSoC Creator™, helps manage the fans in a variety of configurations. This application note also shows how to combine fan control and temperature sensing to create a complete thermal management solution using PSoC 3 and PSoC 5LP.

The projects provided with this application note use the Fan Controller component provided as part of PSoC Creator 3.0 Component Pack 7 software. The software is available for download at http://www.cypress.com/psoccreator/.

The following table provides the list of devices, the supported Creator version, Development kit and Compiler for this application note project:


Project

Device
PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Compiler
Architecture
Silicon
Revision
V3.0 SP2
or higher
V2.2
001
DVK
030/050
DVK
003/014
FTK
Keil
GCC
RVDS
MDK

AN66627.zip

Prod
YES
NO
YES
YES*
NO
YES
N/A
N/A
N/A
Prod
YES
NO
YES
YES*
NO
N/A
YES
YES
YES

* Refer to Migrating CY8CKIT-001 DVK project to CY8CKIT 030/ 050.


Projects associated with this application note can be downloaded from the 'Related Files' section below. For your convenience, we have provided projects that are compatible with the most recent version of PSoC Creator:

  • AN66627.zip is used with PSoC Creator 3.0 SP2

The project’s default settings may not be compatible with your device or kit, and you may need to change your project settings. For more information, see:

PSoC® 3, PSoC 4 and PSoC 5LP AN Project File Naming Convention and Use
]]>
Fri, 22 May 2015 15:22:03 -0600
AN66444 - PSoC® 3 and PSoC 5LP Correlated Double Sampling to Reduce Offset, Drift, and Low Frequency Noise http://www.cypress.com/?rID=49159 This method reduces low frequency (1/f) noise and nulls DC offset in slow-changing analog signals. AN66444 provides a brief introduction to CDS and details of its implementation in PSoC 3 and PSoC 5LP. For theory of the CDS technique, see AN2226 - PSoC® 1 - Correlated Double Sampling for Thermocouple Measurement.

The following video explains the correlated double sampling technique that can be used to reduce a low frequency signal and eliminate DC offset in slow changing signals

 

The following table indicates the PSoC devices, PSoC Creator versions, compilers, and development kits that will work with this application note project:


Project
Device
PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Compiler
Architecture
Silicon
Revision
V2.1 SP1
or higher
V2.1/2.0
001
DVK
030/050
DVK
003/014
FTK
Keil
GCC
RVDS
MDK

AN66444.zip

Prod
YES
NO
YES
YES*
NO
YES
N/A
N/A
N/A
Prod
YES
NO
YES
YES*
NO
N/A
YES
YES
YES
AN66444_Archive.zip
ES2, ES3, Prod
NO
YES
YES
YES*
NO
YES
N/A
N/A
N/A
ES1, Prod
NO
YES
YES
YES*
NO
N/A
YES
YES
YES

*Refer to Migrating CY8CKIT-001 DVK project to CY8CKIT 030/ 050

Note:
  1. For PSoC 5 project and related document, please download file AN66444_Archive.zip.


Projects associated with this application note can be downloaded from the ‘Related Files’ section below. For your convenience, we have provided projects that are compatible with the two most recent versions of PSoC Creator:

  • AN66444.zip is used with PSoC Creator 2.1 SP1
  • AN66444_Archive.zip is used with PSoC Creator 2.1/2.0.

The project’s default settings may not be compatible with your device or kit, and you may need to change your project settings. For more information, see:

PSoC® 3, PSoC 4 and PSoC 5LP AN Project File Naming Convention and Use
]]>
Fri, 22 May 2015 15:21:49 -0600
AN65977 - PSoC® 3 and PSoC 5LP - Creating an Interface to a TMP05/TMP06 Digital Temperature Sensor http://www.cypress.com/?rID=48490 AN65977 describes the TMP05 Digital Temperature Sensor Interface Component, which is a building block for thermal management applications. It enables designers using PSoC to quickly and easily interface with multiple Analog Devices TMP05 or TMP06 digital temperature sensors through a simple, serial 2-wire digital interface.

Introduction

Digital temperature sensors are widely used in systems where multiple temperature measurements are required in specific locations on a large board (such as a line card in a switch or router) or in a remote location. The use of digital temperature sensors frees the designer from worrying about digital noise coupling on to sensitive analog signals on the PCB layout because the digital temperature sensor does the analog to digital conversion within its own package, at the location where the temperature measurement is needed.

 

The TMP05 Digital Temperature Sensor Interface Component is a building block for thermal management applications. It enables designers using PSoC 3 to quickly and easily interface with Analog Devices’ TMP05 or TMP06 digital temperature sensors through a simple, serial 2-wire digital interface. The sensors can be daisy-chained together, minimizing I/O requirements on the controller. For more details on the specific functions of the TMP05 Digital Temperature Sensor Interface Component, refer to the component datasheet.

Please refer to knowledge base article "PSoC® 3 and PSoC 5 AN/CE project file naming convention and usage" for naming conventions and device selection for associated projects.

Note:

  1. For PSoC 5 project and related document, please download file AN65977_Archive.zip.

Project
Device
PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Compiler
Architecture
Silicon
Revision
V3.1
or higher
V2.1 SP1
/ V2.1
001
DVK
030/050
DVK
003/014
FTK
Keil
GCC
RVDS
MDK

AN65977.zip

Prod
YES
NO
YES
YES*
NO
YES
N/A
N/A
N/A
Prod
YES
NO
YES
YES*
NO
N/A
YES
YES
YES
AN65977_Archive.zip
ES3, Prod
NO
YES
YES
YES*
NO
YES
N/A
N/A
N/A
ES1, Prod
NO
YES
YES
YES*
NO
N/A
YES
YES
YES

Projects associated with this application note can be downloaded from the 'Related Files' section below. For your convenience, we have provided projects that are compatible with the two most recent versions of PSoC Creator:

  • AN65977.zip is used with PSoC Creator 3.1
  • AN65977_Archive.zip is used with PSoC Creator 2.1 SP1/2.1

The project’s default settings may not be compatible with your device or kit, and you may need to change your project settings. For more information, see:

PSoC® 3, PSoC 4 and PSoC 5LP AN Project File Naming Convention and Use
]]>
Fri, 22 May 2015 15:21:28 -0600
AN64275 - PSoC® 3 and PSoC 5LP: Getting More Resolution from 8-Bit DACs http://www.cypress.com/?rID=47478 AN64275 discusses several methods to increase the resolution of the DACs available in the PSoC® 3 and PSoC 5LP families. These methods can be used to extend the resolution up to 12 bits. An example application is supplied to demonstrate most of these concepts. A library is also included that implements three of the methods as PSoC Creator™ components.

This following video is a quick synopses of this application note.

 

The following table indicates the PSoC devices, PSoC Creator versions, compilers, and development kits that will work with this application note project:


Project
Device
PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Compiler
Architecture
Silicon
Revision
V2.1 SP1
or higher
V2.1/2.0
001
DVK
030/050
DVK
003/014
FTK
Keil
GCC
RVDS
MDK

AN64275.zip

Prod
YES
NO
YES
YES*
NO
YES
N/A
N/A
N/A
Prod
YES
NO
YES
YES*
NO
N/A
YES
YES
YES
AN64275_Archive.zip
ES3, Prod
NO
YES
YES
YES*
NO
YES
N/A
N/A
N/A
ES1, Prod
NO
YES
YES
YES*
NO
N/A
YES
YES
YES

*Refer to Migrating CY8CKIT-001 DVK project to CY8CKIT 030/ 050.

Notes:
  1. Click on AN77835 - PSoC® 3 to PSoC 5LP Migration Guide to learn differences between PSoC 3 and PSoC 5LP.
  2. For PSoC 5 project and related document, please download file AN64275_Archive.zip.

Projects associated with this application note can be downloaded from the ‘Related Files’ section below. For your convenience, we have provided projects that are compatible with the two most recent versions of PSoC Creator:

  • AN64275.zip is used with PSoC Creator 2.1 SP1
  • AN64275_Archive.zip is used with PSoC Creator 2.1/2.0

The project’s default settings may not be compatible with your device or kit, and you may need to change your project settings. For more information, see:

PSoC® 3, PSoC 4 and PSoC 5LP AN Project File Naming Convention and Use
]]>
Fri, 22 May 2015 15:21:15 -0600
AN61102 - PSoC<sup>®</sup> 3 and PSoC 5LP - ADC Data Buffering Using DMA http://www.cypress.com/?rID=44335 AN61102 describes how to configure the direct memory access (DMA) to buffer the analog-to-digital converter (ADC) data. It discusses how to overcome some of the limitations of the DMA when buffering the ADC data.

The DMA controller in PSoC® 3 and PSoC 5LP is used to handle data transfer without CPU intervention. This is useful in applications that require ADC data buffering and allows the CPU to do simultaneous tasks.

The video describes the case of using a DMA to buffer ADC data. Buffering of 20 bit ADC data is taken as an example and discussed. The video also gives a preview of the project implementing the 20 bit data buffering and explains the DMA configuration in code.

 

 

The following table indicates the PSoC devices, PSoC Creator versions, compilers, and development kits that will work with this application note project:


Project
Device
PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Compiler
Architecture
Silicon
Revision
V3.0 SP1
V2.1 SP1
/2.1
001
DVK
030/050
DVK
003/014
FTK
Keil
GCC
RVDS
MDK

AN61102.zip

Prod
YES
NO
YES
YES*
NO
YES
N/A
N/A
N/A
Prod
YES
NO
YES
YES*
NO
N/A
YES
YES
YES
AN61102_Archive.zip
ES3, Prod
NO
YES
YES
YES*
NO
YES
N/A
N/A
N/A
ES1, Prod
NO
YES
YES
YES*
NO
N/A
YES
YES
YES

*Refer to Migrating CY8CKIT-001 DVK project to CY8CKIT 030/ 050

Notes:

  1. Click on AN77835 - PSoC® 3 to PSoC 5LP Migration Guide to learn differences between PSoC 3 and PSoC 5LP.
  2. For PSoC 5 project and related document, please download file AN61102_Archive.zip.

Projects associated with this application note can be downloaded from the ‘Related Files’ section below. For your convenience, we have provided projects that are compatible with the two most recent versions of PSoC Creator:

  • AN61102.zip is used with PSoC Creator 3.0 SP1
  • AN61102_Archive.zip is used with PSoC Creator 2.1 SP1/2.1

The project’s default settings may not be compatible with your device or kit, and you may need to change your project settings. For more information, see:

PSoC® 3, PSoC 4 and PSoC 5LP AN Project File Naming Convention and Use
]]>
Fri, 22 May 2015 15:20:57 -0600
AN60631 - PSoC® 3 and PSoC 5LP Clocking Resources http://www.cypress.com/?rID=40990 AN60631 covers PSoC® 3 and PSoC 5LP's highly versatile and reconfigurable clocking system. This application note describes PSoC 3 and PSoC 5LP's oscillators and clock sources, phase-locked loop (PLL), and clock distribution network. However, it does not cover the details of the external crystal oscillators (ECOs). For those details, see AN54439 - PSoC® 3 and PSoC 5LP External Crystal Oscillator.

Introduction

Clocks play a critical part in microcontroller operation. They are used to synchronize internal signals, ensure error-free communication with other digital devices, and drive the conversion of signals to and from the analog domain. These roles make the configuration of the different clocks used inside of a microcontroller very important.

]]>
Fri, 22 May 2015 15:20:41 -0600
AN60616 - PSoC<sup>®</sup> 3 and PSoC 5LP Startup Procedure http://www.cypress.com/?rID=40991 This application note describes how to customize the startup procedure, as well as the reasons a designer might choose to change the startup procedure in different ways.

-->

AN60616 describes PSoC® 3 and PSoC 5LP startup procedures, from the application of device power until the execution of user code. It describes how to customize the startup procedure, and includes the reasons a designer might want to change the startup procedure.

Introduction

PSoC 3 and PSoC 5LP are incredibly powerful and complicated mixed-signal microcontrollers. Through careful configuration, they can be used to solve all kinds of technical problems. The PSoC Creator integrated design environment (IDE) generates the code that will configure the parts at startup, but it requires application-specific configuration details. Startup behavior can be manipulated to change the amount of time startup takes, what peripherals are configured, and much more. This application note describes the procedure of startup and also how it can be manipulated to best suit an application.

]]>
Fri, 22 May 2015 15:20:26 -0600
AN60594 - PSoC<sup>®</sup> 3 and PSoC 5LP: Low-Frequency FSK Modulation and Demodulation http://www.cypress.com/?rID=40985 The method described in this application note uses zero CPU, everything done in PSoC hardware. This application note covers only the physical layer implementation of an FSK transmitter and receiver; higher-level encoding techniques and physical modem connections are not discussed.

The following table provides the list of devices, the supported Creator version, Development kit and Compiler for this application note project:
 


Project
Device
PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Compiler
Architecture
Silicon
Revision
V3.0 CP7
or greater
V2.2 SP1
V2.1
001
DVK
030/050
DVK
003/014
FTK
Keil
GCC
RVDS
MDK

AN60594.zip

Prod
YES
NO
NO
YES
YES*
NO
YES
N/A
N/A
N/A
Prod
YES
NO
NO
YES
YES*
NO
N/A
YES
YES
YES
AN60594_Archive.zip
ES3, Prod
NO
YES
YES
YES
YES*
NO
YES
N/A
N/A
N/A
ES1, Prod
NO
YES
YES
YES
YES*
NO
N/A
YES
YES
YES

 *Refer to Migrating CY8CKIT-001 DVK project to CY8CKIT 030/ 050

Notes:
  1. For PSoC 5 project and related document, please download file AN60594_Archive.zip.

Projects associated with this application note can be downloaded from the 'Related Files' section below. For your convenience, we have provided projects that are compatible with the two most recent versions of PSoC Creator:

  • AN60594.zip is used with PSoC Creator 3.0 CP7
  • AN60594_Archive.zip is used with PSoC Creator 2.1 SP1/2.1

The project’s default settings may not be compatible with your device or kit, and you may need to change your project settings. For more information, see:

PSoC® 3, PSoC 5, and PSoC 5LP AN Project File Naming Convention and Use
]]>
Fri, 22 May 2015 15:20:09 -0600
AN60580 - SIO Tips and Tricks in PSoC® 3 / PSoC 5LP http://www.cypress.com/?rID=40989 The following video gives introduction to the features of SIO pins. 

 

The following table indicates the PSoC devices, PSoC Creator versions, compilers, and development kits that will work with this application note project:


Project
Device
PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Compiler
Architecture
Silicon
Revision
V2.1 SP1
or higher
V2.1/2.0
001
DVK
030/050
DVK
003/014
FTK
Keil
GCC
RVDS
MDK

AN60580.zip

Prod
YES
NO
YES
YES*
NO
YES
N/A
N/A
N/A
Prod
YES
NO
YES
YES*
NO
N/A
YES
YES
YES
AN60580_Archive.zip
ES2, ES3, Prod
NO
YES
YES
YES*
NO
YES
N/A
N/A
N/A
ES1, Prod
NO
YES
YES
YES*
NO
N/A
YES
YES
YES

*Refer to Migrating CY8CKIT-001 DVK project to CY8CKIT 030/ 050

Notes:
  1. For PSoC 5 project and related document, please download file AN60580_Archive.zip.

Projects associated with this application note can be downloaded from the ‘Related Files’ section below. For your convenience, we have provided projects that are compatible with the two most recent versions of PSoC Creator:

  • AN60580.zip is used with PSoC Creator 2.1 SP1
  • AN60580_Archive.zip is used with PSoC Creator 2.1/2.0

The project’s default settings may not be compatible with your device or kit, and you may need to change your project settings. For more information, see:

PSoC® 3 and PSoC 5 AN/CE project file naming convention and usage
]]>
Fri, 22 May 2015 15:19:48 -0600
AN60317 - PSoC<sup>®</sup> 3 and PSoC 5LP I<sup>2</sup>C Bootloader http://www.cypress.com/?rID=41002 Beginning with PSoC Creator 2.1, the bootloader system has been reorganized to provide more configuration options. In previous releases, the bootloader system was part of the cy_boot component (a required component that is automatically and invisibly instantiated in all designs). From PSoC Creator 2.1 onwards the bootloader component is separated from cy_boot component and is available as a separate component in component catalogue. Please refer ‘Chapter11.Bootloader Migration’ in System Reference Guide (Help>Documentation>System Reference) to know how to migrate your older versions of bootloader/bootloadable projects to PSoC Creator 2.1.

AN60317 describes how to add an I2C bootloader to a PSoC® 3 / PSoC 5LP project. It also discusses how to use the PC based bootloader host program provided with PSoC Creator. Finally the application note illustrates how to create your own embedded bootloader host. Each of these is explained with examples.

To learn about PSoC 3 and PSoC5 Bootloader implementation refer to video: PSoC3, PSoC5, PSoC Creator Bootloader Overview

The following video describes the steps to add an I2C Bootloader to PSoC3 or PSoC5 projects.

-->

AN60317 describes an I2C-based bootloader for PSoC® 3 and PSoC 5LP. In this application note you will learn how to use PSoC Creator™ to quickly and easily build an I2C-based bootloader project, and bootloadable projects. It also shows how to build an I2C-based embedded bootloader host program.

Bootloading is a process that allows you to upgrade your system firmware over a standard communication interface such as USB, I2C, UART or SPI. A bootloader communicates with a host to get new application code or data, and writes it into the device's flash memory.

This application note describes an I2C based bootloader for PSoC 3 and PSoC 5LP. To get introduced to basics of PSoC 3 and PSoC 5LP Bootloader please refer AN73854 - PSoC® 3 and PSoC 5LP - Introduction to Bootloaders. If you intend to learn how to develop USB Bootloader for PSoC 3 and PSoC 5LP, AN73503 - USB HID Bootloader for PSoC® 3 and PSoC 5LP should get you going.

The following table indicates the PSoC devices, PSoC Creator versions, compilers, and development kits that will work with this application note project:


Project
Device
PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Compiler
Architecture
Silicon
Revision
V3.0 SP1
or higher
V2.2
001
DVK
030/050
DVK
003/014
FTK
Keil
GCC
RVDS
MDK

AN60317.zip

Prod
YES
NO
YES*
YES
NO
YES
N/A
N/A
N/A
Prod
YES
NO
YES*
YES
NO
N/A
YES
YES
YES
AN60317_Archive.zip
Prod
NO
YES
YES*
YES
NO
YES
N/A
N/A
N/A
Prod
NO
YES
YES*
YES
NO
N/A
YES
YES
YES

*Refer to Migrating CY8CKIT-001 DVK project to CY8CKIT 030/ 050

Notes:
  1. For PSoC 5 project and related document, please download file AN60317_Archive.zip.

Projects associated with this application note can be downloaded from the ‘Related Files’ section below. For your convenience, we have provided projects that are compatible with the two most recent versions of PSoC Creator:

  • AN60317.zip is used with PSoC Creator 3.0 SP1
  • AN60317_Archive.zip is used with PSoC Creator 2.2

The project’s default settings may not be compatible with your device or kit, and you may need to change your project settings. For more information, see:

PSoC® 3, PSoC 4 and PSoC 5LP AN Project File Naming Convention and Use
]]>
Fri, 22 May 2015 15:18:45 -0600
AN60305 - Using PSoC® 3 and PSoC 5LP IDACs to build a better VDAC http://www.cypress.com/?rID=42681 This application note describes how to configure the PSoC® 3 and PSoC 5LP IDACs as a flexible analog source. It presents different approaches for using the IDACs in applications, and discusses the advantages and disadvantages of the topologies presented. This application note will: help you to understand compliance voltage and why it is important; explain how to generate an “any range” or “any ground” VDAC; describe an implementation for a multiplying VDAC; give details on how to build a rail-to-rail low-output impedance 9-bit VDAC from a single IDAC, an opamp, and a resistor; and provide information on how to build a current scaling circuit with an opamp and two resistors.

]]>
Fri, 22 May 2015 15:18:12 -0600
AN60220 - PSoC® 3 / PSoC 5LP Multiplexed Comparator http://www.cypress.com/?rID=40638 PSoC 3 and PSoC 5LP series of devices has 2 or 4 comparators. If the number of input signals that needs to be monitored is more than the available number of comparators, then one of the solutions is to multiplex the comparator. The other available options are to use OPAMPs and SIOs as comparators. SIO comparator details can be obtained from AN60580. In AN60220, as an example 4 channel multiplexing is implemented using configurable Digital and analog hardware, consuming 0% CPU bandwidth in multiplexing. It also explains ways to scale the design to different number of channels and scanning rate.

The following table indicates the PSoC devices, PSoC Creator versions, compilers, and development kits that will work with this application note project:


Project
Device
PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Compiler
Architecture
Silicon
Revision
V2.1 SP1
or higher
V2.1/2.0
001
DVK
030/050
DVK
003/014
FTK
Keil
GCC
RVDS
MDK

AN60220.zip

Prod
YES
NO
YES
YES*
NO
YES
N/A
N/A
N/A
Prod
YES
NO
YES
YES*
NO
N/A
YES
YES
YES
AN60220_Archive.zip
ES2, ES3, Prod
NO
YES
YES
YES*
NO
YES
N/A
N/A
N/A
ES1, Prod
NO
YES
YES
YES*
NO
N/A
YES
YES
YES

*Refer to Migrating CY8CKIT-001 DVK project to CY8CKIT 030/ 050

Notes:
  1. Click on AN77835 - PSoC® 3 to PSoC 5LP Migration Guide to learn differences between PSoC 3 and PSoC 5LP.
  2. For PSoC 5 project and related document, please download file AN60220_Archive.zip.

Projects associated with this application note can be downloaded from the ‘Related Files’ section below. For your convenience, we have provided projects that are compatible with the two most recent versions of PSoC Creator:

  • AN60220.zip is used with PSoC Creator 2.1 SP1
  • AN60220_Archive.zip is used with PSoC Creator 2.1/2.0

The project’s default settings may not be compatible with your device or kit, and you may need to change your project settings. For more information, see:

PSoC® 3, PSoC 4 and PSoC 5LP AN Project File Naming Convention and Use
]]>
Fri, 22 May 2015 15:17:47 -0600
AN58827 - PSoC® 3 and PSoC 5LP Internal Analog Routing Considerations http://www.cypress.com/?rID=40247 Trace and switch resistance are not a concern for most applications. However, this application note teaches the designer when resistance in the signal path may cause measurement errors.

 

Note:

  1. Click on AN77835 - PSoC® 3 to PSoC 5LP Migration Guide to learn differences between PSoC 3 and PSoC 5LP.
]]>
Fri, 22 May 2015 15:17:32 -0600
AN58726 - USB HID Intermediate with PSoC® 3 and PSoC 5LP http://www.cypress.com/?rID=40103 AN58726 is a continuation of basic-level AN57473. It describes additional features of the USB Human Interface Device (HID) protocol, including input and output transactions and composite devices, using PSoC® 3 and PSoC 5LP and the PSoC Creator™ USBFS Component. A variety of HID devices, including a keyboard with LEDs and a composite device, are used as examples. This application note is a prerequisite for the advanced-level AN56377 and AN82072.

Introduction

USB is a complex protocol, and it can be difficult for beginners to get a USB-based application up and running quickly. However, some aspects of USB are easy to use, especially the Human Interface Device (HID) protocol. HID is designed for common PC interface devices such as a keyboard or mouse, but it can be adapted for many custom applications. Most PC operating systems, including Windows, Mac, and Linux, include HID drivers. This means that you do not have to write a driver; instead, you can focus on developing your application firmware.

The following table provides the list of devices, the supported Creator version, Development kit and Compiler for this application note project:


Project
Device
PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Compiler
Architecture
Silicon
Revision
V2.1 SP1
or higher
V2.1/2.0
001
DVK
030/050
DVK
003/014
FTK
Keil
GCC
RVDS
MDK

AN58726.zip

Prod
YES
NO
YES
YES*
NO
YES
N/A
N/A
N/A
Prod
YES
NO
YES
YES*
NO
N/A
YES
YES
YES
AN58726_Archive.zip
ES2, ES3, Prod
NO
YES
YES
YES*
NO
YES
N/A
N/A
N/A
ES1
NO
YES
YES
YES*
NO
N/A
YES
YES
YES

*Refer to Migrating CY8CKIT-001 DVK project to CY8CKIT 030/ 050.

Notes:
  1. Click on AN77835 - PSoC® 3 to PSoC 5LP Migration Guide to learn differences between PSoC 3 and PSoC 5LP.
  2. For PSoC 5 project and related document, please download file AN58726_Archive.zip.

Projects associated with this application note can be downloaded from the ‘Related Files’ section below. For your convenience, we have provided projects that are compatible with the two most recent versions of PSoC Creator:

  • AN58726.zip is used with PSoC Creator 2.1 SP1
  • AN58726_Archive.zip is used with PSoC Creator 2.1/2.0

The project’s default settings may not be compatible with your device or kit, and you may need to change your project settings. For more information, see:

PSoC® 3, PSoC 5, and PSoC 5LP AN Project File Naming Convention and Use
]]>
Fri, 22 May 2015 15:17:16 -0600
AN58304 - PSoC® 3 and PSoC 5LP – Pin Selection for Analog Designs http://www.cypress.com/?rID=39974 AN58304 provides an overview of the analog routing matrix in PSoC® 3 and PSoC 5LP. This matrix is used to interconnect analog blocks and GPIO pins. A good understanding of the analog routing and pin connections can help the designer make selections to achieve the best possible analog performance. Topics such as LCD and CapSense routing are not covered in this application note.

Notes:

  1. Click on AN77835 - PSoC® 3 to PSoC 5LP Migration Guide to learn differences between PSoC 3 and PSoC 5LP.
]]>
Fri, 22 May 2015 15:16:57 -0600
AN57473 - USB HID Basics with PSoC® 3 and PSoC 5LP http://www.cypress.com/?rID=39404 AN57473 describes the basics of the USB Human Interface Device (HID) protocol, and how to implement it in PSoC® 3 and PSoC 5LP. It explains how to configure USB input transactions using the PSoC Creator™ USBFS Component, with basic mouse and joystick inputs as examples. This application note is a prerequisite for the intermediate-level AN58726.

The following video is a brief example of how to create a Human Interface Device on PSoC 3 and have it enumerate in Windows.

 

The following table indicates the PSoC devices, PSoC Creator versions, compilers, and development kits that will work with this application note project:



Project
Device
PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Compiler
Architecture
Silicon
Revision
V3.0
or higher
V2.1 SP1/
V2.1
001
DVK
030/050
DVK
003/014
FTK
Keil
GCC
RVDS
MDK

AN57473.zip

Prod
YES
NO
YES
YES*
NO
YES
N/A
N/A
N/A
Prod
YES
NO
YES
YES*
NO
N/A
YES
YES
YES
AN57473_Archive.zip
ES2, ES3, Prod
NO
YES
YES
YES*
NO
YES
N/A
N/A
N/A
ES1, Prod
NO
YES
YES
YES*
NO
N/A
YES
YES
YES

*Refer to Migrating CY8CKIT-001 DVK project to CY8CKIT 030/ 050

Notes:
  1. For PSoC5 project and related document, please download file AN57473_Archive.zip.

Projects associated with this application note can be downloaded from the ‘Related Files’ section below. For your convenience, we have provided projects that are compatible with the two most recent versions of PSoC Creator:

  • AN57473.zip is used with PSoC Creator 3.0
  • AN57473_Archive.zip is used with PSoC Creator 2.1 SP1/2.1

The project’s default settings may not be compatible with your device or kit, and you may need to change your project settings. For more information, see:

PSoC® 3 and PSoC 5 AN/CE project file naming convention and usage
]]>
Fri, 22 May 2015 15:16:42 -0600
AN54439 - PSoC® 3 and PSoC 5LP External Crystal Oscillators http://www.cypress.com/?rID=37884 AN54439 describes how to use an external crystal or ceramic resonator at 32.768 kHz or in the 4-25 MHz range with PSoC® 3 or PSoC 5LP. External crystal oscillators provide more accurate clock signals than the oscillators built into the PSoC 3 and 5LP devices. These devices also include a wide range of clock dividers, PLLs, and a clock distribution network that is covered in the AN60631 PSoC ® 3 or PSoC 5LP Clocking Resources application note.

 

 

]]>
Fri, 22 May 2015 15:16:04 -0600
AN52927 - PSoC<sup>®</sup> 3 and PSoC 5LP - Segment LCD Direct Drive http://www.cypress.com/?rID=37795 AN52927 demonstrates how easy it is to drive a segment LCD glass using the integrated LCD driver in PSoC 3 and PSoC 5LP. This application note gives a brief introduction to segment LCD drive features and provides a step-bystep procedure to design Segment LCD applications using the PSoC Creator tool.

PSoC3 device is equipped with segment LCD driver which allows segment LCD glass to be directly driven without using any external components.

Segment LCD glass interface to PSoC3

The driver supports LCDs upto 16 commons and can drive upto 768 segments. PSoC Creator tool provides Segment LCD component which simplifies the task of handling different types of segment LCD features such as 7-segment, 14-segment, 16-segment, Dot-Matrix and special symbols. This application note explains how to use Segment LCD component for a given LCD specifications.

This application note only covers segment LCD drive capability of PSoC3. Another type of LCDs- the graphic LCDs can also be interfaced to PSoC3. For details of interfacing graphic LCDs to PSoC3, click the following links-

http://www.cypress.com/?rID=48850

http://www.cypress.com/?rID=48854

 

Demo Video: PSoC3 Segment LCD Direct Drive Demo

This video explains how to create projects with Segment LCD Component of PSoC3.

 

 

The following table indicates the PSoC devices, PSoC Creator versions, compilers, and development kits that will work with this application note project:


Project
Device
PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Compiler
Architecture
Silicon
Revision
V3.0 SP1
or higher
V2.1 SP1/
V2.1
001
DVK
030/050
DVK
003/014
FTK
Keil
GCC
RVDS
MDK

AN52927.zip

Prod
YES
NO
YES
YES*
NO
YES
N/A
N/A
N/A
Prod
YES
NO
YES
YES*
NO
N/A
YES
YES
YES
AN52927_Archive.zip
ES3, Prod
NO
YES
YES
YES*
NO
YES
N/A
N/A
N/A

*Refer to Migrating CY8CKIT-001 DVK project to CY8CKIT 030/ 050


Projects associated with this application note can be downloaded from the ‘Related Files’ section below. For your convenience, we have provided projects that are compatible with the two most recent versions of PSoC Creator:

  • AN52927.zip is used with PSoC Creator 3.0 SP1
  • AN52927_Archive.zip is used with PSoC Creator 2.1 SP1/2.1

The project’s default settings may not be compatible with your device or kit, and you may need to change your project settings. For more information, see:

PSoC® 3 and PSoC 5 AN/CE project file naming convention and usage
]]>
Fri, 22 May 2015 15:15:38 -0600
AN72382 - Using PSoC® 3 and PSoC 5LP GPIO Pins http://www.cypress.com/?rID=57571 AN72382 shows you how to use GPIO pins effectively in PSoC® 3 and PSoC 5LP. Major topics include GPIO basics, configuration, mixed-signal use, registers, interrupts, and low-power behavior.

Introduction

The any-signal-to-any-pin routing available with PSoC® 3 and PSoC 5LP GPIOs helps to optimize PCB layout, shorten design time, and allow a large degree of solderless rework. However, with this freedom comes a steeper learning curve than with a traditional microcontroller. This application note introduces you to PSoC 3 and PSoC 5LP GPIO basics and demonstrates techniques for their effective use in a design.

]]>
Fri, 22 May 2015 15:14:33 -0600
AN52701 - PSoC® 3 and PSoC 5LP - Getting Started with Controller Area Network (CAN) http://www.cypress.com/?rID=37766 Introduction

CAN (Controller Area Network) is a serial communication protocol developed by Robert Bosch GmbH in the early 1980s. This protocol was initially developed for automotive applications to communicate between subsystems without a central control. CAN is also being adopted in areas such as embedded systems (CANOpen) and factory automation (DeviceNet). CAN was standardized by ISO in 2003 (ISO 11898-1:2003).

This application note introduces the basic concepts of CAN protocol and demonstrates how CAN bus communication can be implemented using PSoC® 3 and PSoC 5LP (hereafter referred to as PSoC). Four code examples are included with this application note. Examples 1 and 2 together illustrate a simplex communication between two PSoCs. Examples 3 and 4 together demonstrate the Remote Transmission Request (RTR) feature of CAN.

The video talks about how to transmit and receive messages using CAN controller available in PSoC3.

 

The following table indicates the PSoC devices, PSoC Creator versions, compilers, and development kits that will work with this application note project:


Project
Device
PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Compiler
Architecture
Silicon
Revision
V2.1 SP1
or higher
V2.1/2.0
001
DVK
030/050
DVK
003/014
FTK
Keil
GCC
RVDS
MDK

AN52701.zip

Prod
YES
NO
YES
YES*
NO
YES
N/A
N/A
N/A
Prod
YES
NO
YES
YES*
NO
N/A
YES
YES
YES
AN52701_Archive.zip
ES3, Prod
NO
YES
YES
YES*
NO
YES
N/A
N/A
N/A

*Refer to Migrating CY8CKIT-001 DVK project to CY8CKIT 030/ 050.

Notes:
  1. Click on AN77835 - PSoC® 3 to PSoC 5LP Migration Guide to learn differences between PSoC 3 and PSoC 5LP.
  2. For PSoC 5 project and related document, please download file AN52701_Archive.zip.

Projects associated with this application note can be downloaded from the ‘Related Files’ section below. For your convenience, we have provided projects that are compatible with the two most recent versions of PSoC Creator:

  • AN52701.zip is used with PSoC Creator 2.1 SP1
  • AN52701_Archive.zip is used with PSoC Creator 2.1/2.0

The project’s default settings may not be compatible with your device or kit, and you may need to change your project settings. For more information, see:

PSoC® 3 and PSoC 5 AN/CE project file naming convention and usage
]]>
Fri, 22 May 2015 15:13:53 -0600
AN52705 - PSoC® 3 and PSoC 5LP - Getting Started with DMA http://www.cypress.com/?rID=37793 AN52705 provides an introduction to direct memory access (DMA) in PSoC® 3 and PSoC 5LP. PSoC DMA can transfer data between on-chip peripherals and memory with no CPU intervention. The application note illustrates how to configure the DMA for simple data transfers, including peripheral to memory, memory to peripheral, peripheral to peripheral and memory to memory, using example projects.

Introduction

The DMA controller (DMAC) in PSoC 3 and PSoC 5LP can transfer data from a source to a destination with no CPU intervention. This allows the CPU to handle other tasks while the DMA does data transfers, thereby achieving a 'multiprocessing' environment.

The PSoC DMA Controller (DMAC) is highly flexible – it can seamlessly transfer data between memory and on chip peripherals including ADCs, DACs, Filter, USB, UART, and SPI. There are 24 independent DMA channels.

 The following table indicates the PSoC devices, PSoC Creator versions, compilers, and development kits that will work with this application note project:


Project
Device
PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Compiler
Architecture
Silicon
Revision
V3.0 SP1
or higher
V2.1/2.0
001
DVK
030/050
DVK
003/014
FTK
Keil
GCC
RVDS
MDK

AN52705.zip

Prod
YES
NO
YES
YES*
NO
YES
N/A
N/A
N/A
Prod
YES
NO
YES
YES*
NO
N/A
YES
YES
YES
AN52705_Archive.zip
ES2, ES3, Prod
NO
YES
YES
YES*
NO
YES
N/A
N/A
N/A
ES1, Prod
NO
YES
YES
YES*
NO
N/A
YES
YES
YES

 *Refer to Migrating CY8CKIT-001 DVK project to CY8CKIT 030/ 050

Note:
  1. For PSoC 5 project and related document, please download file AN52705_Archive.zip.

Projects associated with this application note can be downloaded from the ‘Related Files’ section below. For your convenience, we have provided projects that are compatible with the two most recent versions of PSoC Creator:

  • AN52705.zip is used with PSoC Creator 3.0 SP1
  • AN52705_Archive.zip is used with PSoC Creator 2.1/2.0

The project’s default settings may not be compatible with your device or kit, and you may need to change your project settings. For more information, see:

PSoC® 3, PSoC 4 and PSoC 5LP AN Project File Naming Convention and Use
]]>
Fri, 22 May 2015 15:13:01 -0600
AN80994 - PSoC® 3, PSoC 4, and PSoC 5LP EMC Best Practices and Recommendations http://www.cypress.com/?rID=67839 AN80994 provides recommendations and best practices for improving the EMC performance of designs based on PSoC® 3, PSoC 4, and PSoC 5LP. This application note also details the requirements to pass IEC 61000-4-2 electrostatic discharge (ESD) immunity tests and IEC 61000-4-4 electrical fast transient (EFT) and burst immunity tests.

Introduction

This application note gives engineers the information they need to use Cypress PSoC® 3, PSoC 4, and PSoC 5LP devices to build and test electromagnetic compatibility (EMC)–compliant electronic devices. Included are recommendations to the schematic and PCB designers that help meet EMC specifications. Cypress designed an experimental test board and tested it to provide examples of how to build electronic devices that meet the electrostatic discharge (ESD) and electrical fast transient (EFT) EMC requirements. This application note also presents those test results.

]]>
Tue, 12 May 2015 01:25:49 -0600
AN82156 - PSoC® 3, PSoC 4, and PSoC 5LP - Designing PSoC Creator™ Components with UDB Datapaths http://www.cypress.com/?rID=69774

Introduction

AN82156 explains how to design PSoC Creator Components that use PSoC 3, PSoC 4, and PSoC 5LP Universal Digital Block (UDB) datapaths. Datapath-based Components can implement common functions such as counters, PWMs, Shifters, UARTs, SPI, etc. They can also be used to create custom digital peripherals, and to perform data management tasks to offload the CPU. The use of the PSoC Creator UDB Editor Tool to create, view, and modify datapath instances is described.

Notes:

  1. Click on AN77835 - PSoC® 3 to PSoC 5LP Migration Guide to learn differences between PSoC 3 and PSoC 5LP.
  2. For PSoC 5 project and related document, please download file AN82156_Archive.zip.

Project Device PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Architecture Silicon
Revision
V3.0 SP1
or higher
V2.2 SP1
/2.1
001
DVK
030/050
DVK
042 Pioneer DVK
AN82156.zip PSoC3 Prod YES NO YES YES* N/A
PSoC4 Prod YES NO YES N/A YES**
PSoC5LP Prod YES NO YES YES* N/A
AN82156_Archive.zip PSoC3 ES2, ES3, Prod NO YES YES YES* N/A
PSoC5 ES1, Prod NO YES YES YES* N/A

* Refer to Migrating CY8CKIT-001 DVK project to CY8CKIT 030/ 050.
** The project can be easily adapted to this DVK.

Projects associated with this application note can be downloaded from the 'Related Files' section below. For your convenience, we have provided projects that are compatible with the two most recent versions of PSoC Creator:

  • AN82156.zip is used with PSoC Creator 3.0 SP1 and 2.2 SP1
  • AN82156_Archive.zip is used with PSoC Creator 2.1 SP1/2.1

The project’s default settings may not be compatible with your device or kit, and you may need to change your project settings. For more information, see:

PSoC® 3, PSoC 5, and PSoC 5LP AN Project File Naming Convention and Use
]]>
Thu, 07 May 2015 05:36:39 -0600
AN54460 - PSoC<sup>®</sup> 3 and PSoC 5LP Interrupts http://www.cypress.com/?rID=38267

AN54460 explains the interrupt architecture in PSoC® 3 and PSoC 5LP, and its configuration in PSoC Creator™ IDE with the help of example projects. Advanced interrupt topics such as handling re-entrant functions, interrupt code optimization, interrupt latency, and debug techniques are also explained.

Important Note: From version *G and above of this application note, the PSoC 4 content in the earlier versions of this application note has been moved to the dedicated PSoC 4 application note – AN90799 - PSoC® 4 Interrupts. From version *G and above, this application note covers only PSoC 3 and PSoC 5LP devices.

Introduction

Interrupts are an important part of any embedded application. They free the CPU from having to continuously poll for the occurrence of a specific event and, instead, notify the CPU only when that event occurs. In system-on-chip (SoC) architectures such as PSoC, interrupts are frequently used to communicate the status of on-chip peripherals to the CPU.

Video

The below video provides a walkthrough of basics of PSoC 3, PSoC 5LP Interrupt architecture. It demonstrates how the PSoC Creator software supports Interrupts by using a simple example project.

 

Compatibility Matrix

The following table indicates the PSoC devices, PSoC Creator versions, compilers, and development kits that will work with this application note project:

Project Device PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Architecture Silicon
Revision
V3.0 SP1 or
higher
V3.0 or
lower
001
DVK
030/050
DVK
AN54460.zip PSoC3 Prod YES NO YES YES*
PSoC5LP Prod YES NO YES YES*

* Refer to Migrating CY8CKIT-001 DVK project to CY8CKIT 030/ 050.

Projects associated with this application note can be downloaded from the ‘Related Files’ section below.

]]>
Thu, 07 May 2015 02:22:17 -0600
AN2099 - PSoC® 1, PSoC 3, PSoC 4, and PSoC 5LP - Single-Pole Infinite Impulse Response (IIR) Filters http://www.cypress.com/?rID=2813 AN2099 describes a topology for a single-pole infinite impulse response (IIR) filter. It includes equations and software to implement this topology; the associated example projects give the user access to filter routines in either assembly or C.

In the real world analog signals are noisy; one example might be the output voltage of a thermistor. It is often undesirable to display or use this noisy data. The best way to remove or “clean up” the noise is to apply a filter to the signal. Ideally, the filter removes the noise and keeps the signal of interest. Filters exist in the analog domain that can be used to reduce noise. However, this results in extra cost and power consumption of an analog filter. That is where digital filters come in. IIR filters can be used to approximate many common analog filters.


Project
Device
PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Compiler
Architecture
Silicon
Revision
V2.1 SP1
or higher
V2.1/2.0
001
DVK
030/050
DVK
003/014
FTK
Keil
GCC
RVDS
MDK

AN2099.zip

Prod
YES
NO
YES
YES*
NO
YES
N/A
N/A
N/A
Prod
YES
NO
YES
YES*
NO
N/A
YES
YES
YES
AN2099_Archive.zip
ES3, Prod
NO
YES
YES
YES*
NO
YES
N/A
N/A
N/A
ES1, Prod
NO
YES
YES
YES*
NO
N/A
YES
YES
YES

 *Refer to Migrating CY8CKIT-001 DVK project to CY8CKIT 030/ 050

Notes:
  1. For PSoC 5 project and related document, please download file AN2099_Archive.zip.

Projects associated with this application note can be downloaded from the 'Related Files' section below. For your convenience, we have provided projects that are compatible with the two most recent versions of PSoC Creator:

  • AN2099.zip is used with PSoC Creator 2.1 SP1
  • AN2099_Archive.zip is used with PSoC Creator 2.1/2.0

The project’s default settings may not be compatible with your device or kit, and you may need to change your project settings. For more information, see:

PSoC® 3, PSoC 5, and PSoC 5LP AN Project File Naming Convention and Use
]]>
Thu, 07 May 2015 02:10:10 -0600
AN62510 - Implementing State Machines with PSoC® 3, PSoC 4, and PSoC 5LP http://www.cypress.com/?rID=44402

Introduction

State machines are commonly used to implement decision making algorithms. State machines are used in applications where distinguishable states exist. A finite state machine (FSM) is based on the idea that a given system has a finite number of states.

This application note shows you how to implement both Mealy and Moore state machines using the Look Up Table (LUT) component in PSoC Creator™. Example projects are included.

The following table indicates the PSoC devices, PSoC Creator versions, compilers, and development kits that will work with this application note project:

Project Device PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Architecture Silicon
Revision
V2.2 SP1
or higher
V2.1 SP1
/2.1
001
DVK
030/050
DVK
042 Pioneer DVK
AN62510.zip PSoC3 Prod YES NO YES YES* N/A
PSoC4 Prod YES NO YES N/A YES**
PSoC5LP Prod YES NO YES YES* N/A
AN62510_Archive.zip PSoC3 ES2, ES3, Prod NO YES YES YES* N/A
PSoC5 ES1, Prod NO YES YES YES* N/A

* Refer to Migrating CY8CKIT-001 DVK project to CY8CKIT 030/ 050.
** The project can be easily adapted to this DVK.

Notes:

  1. For PSoC 5 project and related document, please download file AN62510_Archive.zip.

Projects associated with this application note can be downloaded from the ‘Related Files’ section below. For your convenience, we have provided projects that are compatible with the two most recent versions of PSoC Creator:

  • AN62510.zip is used with PSoC Creator 2.2 SP1
  • AN62510_Archive.zip is used with PSoC Creator 2.1 SP1/2.1

The project’s default settings may not be compatible with your device or kit, and you may need to change your project settings. For more information, see:

PSoC® 3, PSoC 5, and PSoC 5LP AN Project File Naming Convention and Use
]]>
Thu, 07 May 2015 02:08:31 -0600
AN81623 - PSoC® 3, PSoC 4, and PSoC 5LP Digital Design Best Practices http://www.cypress.com/?rID=67774 Introduction

PSoC 3, PSoC 4, and PSoC 5LP have a powerful and flexible programmable digital peripheral system. In addition to a set of fixed function blocks (4 timers, I2C, USB, CAN), they offer as many as 24 programmable Universal Digital Blocks (UDBs) and an extensive signal routing system called the Digital System Interconnect (DSI).

]]>
Thu, 07 May 2015 02:06:32 -0600
AN60024 - PSoC® 3, PSoC 4, PSoC 5LP Switch Debouncer and Glitch Filter http://www.cypress.com/?rID=40974

AN60024 introduces the concepts of switch debouncing and glitch filtering for digital input signals, and shows how to create several debounce and filter solutions for PSoC® 3, PSoC 4, and PSoC 5LP, using PSoC Creator™.

The following table indicates the PSoC devices, PSoC Creator versions, compilers, and development kits that will work with this application note project:

Project Device PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Architecture Silicon
Revision
V3.0
or higher
V2.1 SP1
/2.1
001
DVK
030/050
DVK
042 Pioneer DVK
AN60024.zip PSoC3 Prod YES NO YES YES* N/A
PSoC4 Prod YES NO YES N/A YES**
PSoC5LP Prod YES NO YES YES* N/A
AN60024_Archive.zip PSoC3 ES2, ES3, Prod NO YES YES YES* N/A
PSoC5 ES1, Prod NO YES YES YES* N/A

* Refer to Migrating CY8CKIT-001 DVK project to CY8CKIT 030/ 050.
** The project can be easily adapted to this DVK.

Notes:
  1. For PSoC 5 project and related document, please download file AN60024_Archive.zip.

Projects associated with this application note can be downloaded from the ‘Related Files’ section below. For your convenience, we have provided projects that are compatible with the two most recent versions of PSoC Creator:

  • AN60024.zip is used with PSoC Creator 3.0
  • AN60024_Archive.zip is used with PSoC Creator 2.2 SP1, 2.1 SP1/2.1

The project’s default settings may not be compatible with your device or kit, and you may need to change your project settings. For more information, see:

PSoC® 3, PSoC 5, and PSoC 5LP AN Project File Naming Convention and Use
]]>
Thu, 07 May 2015 02:04:46 -0600
AN66477 - PSoC® 3, PSoC 4, and PSoC 5LP - Temperature Measurement with a Thermistor http://www.cypress.com/?rID=49052 This application note is temporarily unavailable

The document AN66477 - PSoC® 3 and PSoC 5 Temperature Measurement with Thermistor is currently being reviewed and updated to support the new Thermistor Component available in PSoC Creator 2.1. The updated application note is expected by 11/30/2012. The below abstract describes what this application note covers. If you have an immediate need for this document, please click here to create a technical support case requesting this material.

-->

Please note that the Thermistor Component is now provided in PSoC Creator 2.1. Please access the Thermistor Component Datasheet for features and configuration details.

AN66477 Abstract:

AN66477 explains how to measure temperature with a thermistor using PSoC® 3, PSoC 4, or PSoC 5LP. This application note describes the PSoC Creator™ Thermistor Calculator Component, which simplifies the math-intensive resistance-to-temperature conversion. In addition, we discuss several PSoC Creator thermistor measurement projects.

The following table provides the list of devices, the supported Creator version, Development kit and Compiler for this application note project:


Project
Device
PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Compiler
Architecture
Silicon
Revision
V2.1 SP1
or higher
 V2.1
V2.0
001
DVK
030/050
DVK
003/014
FTK
Keil
GCC
RVDS
MDK

AN66477.zip

Prod
YES
NO
NO
YES
YES*
NO
YES
N/A
N/A
N/A
Prod
YES
NO
NO
YES
YES*
NO
N/A
YES
YES
YES
AN66477_Archive.zip
ES3, Prod
NO
YES
YES
YES
YES*
NO
YES
N/A
N/A
N/A
ES1, Prod
NO
YES
YES
YES
YES*
NO
N/A
YES
YES
YES


*Refer to Migrating CY8CKIT-001 DVK project to CY8CKIT 030/ 050.

Notes:

  1. Click on AN77835 - PSoC® 3 to PSoC 5LP Migration Guide to learn differences between PSoC 3 and PSoC 5LP.
]]>
Thu, 07 May 2015 02:03:09 -0600
AN57821 - PSoC<sup>®</sup> 3, PSoC 4, and PSoC 5LP Mixed Signal Circuit Board Layout Considerations http://www.cypress.com/?rID=39677 AN57821 introduces basic PCB layout practices to achieve 12- to 20-bit performance for the PSoC® 3, PSoC 4, and PSoC 5LP family of devices. The design practices covered in this application note are good rules to use in any mixed signal design for any accuracy.

The following video introduces the designer to shared return paths and how to avoid them when designing a circuit board.

 

Note:

  1. Click on AN77835 - PSoC® 3 to PSoC 5LP Migration Guide to learn differences between PSoC 3 and PSoC 5LP.
]]>
Thu, 07 May 2015 02:00:54 -0600
AN82250 - PSoC® 3, PSoC 4, and PSoC 5LP – Implementing Programmable Logic Designs with Verilog http://www.cypress.com/?rID=69773

AN82250 describes how to implement programmable digital logic designs in the PLD portion of PSoC® 3, PSoC 4, and PSoC 5LP. It introduces the PSoC Universal Digital Blocks (UDBs) and their programmable logic device (PLD) sub-blocks. An example project illustrates how you can use the PLDs in a design by creating Verilog-based components in PSoC Creator™.

Introduction

PSoC 3, PSoC 4, and PSoC 5LP (hereafter referred to as PSoC) are more than just microcontrollers. With PSoC you can integrate the functions of a microcontroller, complex programmable logic device (CPLD), and high-performance analog with unmatched flexibility. This saves cost, board space, power, and development time.

Note This application note does not apply to PSoC 41xx parts, which do not contain UDBs.
 

Project Device PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Architecture Silicon
Revision
V3.0 SP1
or higher
V2.1 SP1
/2.1
001
DVK
030/050
DVK
042 Pioneer DVK
AN82250.zip PSoC3 Prod YES NO YES YES* N/A
PSoC4 Prod YES NO YES N/A YES**
PSoC5LP Prod YES NO YES YES* N/A
AN82250_Archive.zip PSoC3 ES2, ES3, Prod NO YES YES YES* N/A
PSoC5 ES1, Prod NO YES YES YES* N/A

* Refer to Migrating CY8CKIT-001 DVK project to CY8CKIT 030/ 050.
** The project can be easily adapted to this DVK.

Projects associated with this application note can be downloaded from the 'Related Files' section below. For your convenience, we have provided projects that are compatible with the two most recent versions of PSoC Creator:

  • AN82250.zip is used with PSoC Creator 3.0 SP1
  • AN82250_Archive.zip is used with PSoC Creator 2.2 or PSoC Creator 2.1 SP1
]]>
Thu, 07 May 2015 01:58:59 -0600
AN60321 - Peak Detection with PSoC<sup>®</sup> 3 and PSoC 5LP http://www.cypress.com/?rID=41001 Several of the peak detector designs described in the application note have been encapsulated as PSoC Creator™ components for easy reuse.

The following table indicates the PSoC devices, PSoC Creator versions, compilers, and development kits that will work with this application note project:


Project
Device
PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Compiler
Architecture
Silicon
Revision
V3.0 SP1
or higher
V2.1/2.0
001
DVK
030/050
DVK
003/014
FTK
Keil
GCC
RVDS
MDK

AN60321.zip

Prod
YES
NO
YES
YES*
NO
YES
N/A
N/A
N/A
Prod
YES
NO
YES
YES*
NO
N/A
YES
YES
YES
AN60321_Archive.zip
ES2, ES3, Prod
NO
YES
YES
YES*
NO
YES
N/A
N/A
N/A
ES1, Prod
NO
YES
YES
YES*
NO
N/A
YES
YES
YES

*Refer to Migrating CY8CKIT-001 DVK project to CY8CKIT 030/ 050

Notes:

  1. Click on AN77835 - PSoC® 3 to PSoC 5LP Migration Guide to learn differences between PSoC 3 and PSoC 5LP.
  2. For PSoC 5 project and related document, please download file AN60321_Archive.zip.

Projects associated with this application note can be downloaded from the ‘Related Files’ section below. For your convenience, we have provided projects that are compatible with the two most recent versions of PSoC Creator:

  • AN60321.zip is used with PSoC Creator 3.0 SP1
  • AN60321_Archive.zip is used with PSoC Creator 2.1/2.0

The project’s default settings may not be compatible with your device or kit, and you may need to change your project settings. For more information, see:

PSoC® 3, PSoC 4 and PSoC 5LP AN Project File Naming Convention and Use
]]>
Wed, 06 May 2015 15:48:40 -0600
AN77900 - PSoC® 3 and PSoC 5LP Low-power Modes and Power Reduction Techniques http://www.cypress.com/?rID=64554 Introduction

The PSoC 3 and PSoC 5LP low-power modes allow you to reduce overall current draw without limiting functionality, especially when implemented with other power-saving features and techniques.

This application note describes the fundamentals of the PSoC low-power modes, provides information on Active mode power-saving methods, and discusses other low-power considerations. It is assumed that the reader is familiar with PSoC 3 and PSoC 5LP device architecture and PSoC Creator operation. A list of related documents that expand on some complex topics mentioned here is available at the end of this application note.
 


Project
Device
PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Compiler
Architecture
Silicon
Revision
V2.1 SP1
or higher
V2.1/2.0
001
DVK
030/050
DVK
003/014
FTK
Keil
GCC
RVDS
MDK

AN77900.zip

Prod
YES
NO
YES
YES*
NO
YES
N/A
N/A
N/A
Prod
YES
NO
YES
YES*
NO
N/A
YES
YES
YES
AN77900_Archive.zip
ES3, Prod
NO
YES
YES
YES*
NO
YES
N/A
N/A
N/A
ES1, Prod
NO
YES
YES
YES*
NO
N/A
YES
YES
YES

*Refer to Migrating CY8CKIT-001 DVK project to CY8CKIT 030/ 050.

Notes:
  1. Click on AN77835 - PSoC® 3 to PSoC 5LP Migration Guide to learn differences between PSoC 3 and PSoC 5LP.
  2. For PSoC 5 project and related document, please download file AN77900_Archive.zip.

Projects associated with this application note can be downloaded from the 'Related Files' section below. For your convenience, we have provided projects that are compatible with the three most recent versions of PSoC Creator:

  • AN77900.zip is used with PSoC Creator 2.2 SP1
  • AN77900_Archive.zip is used with PSoC Creator 2.1 SP1/2.1/2.0

The project’s default settings may not be compatible with your device or kit, and you may need to change your project settings. For more information, see:

PSoC® 3, PSoC 5, and PSoC 5LP AN Project File Naming Convention and Use
]]>
Wed, 06 May 2015 13:13:17 -0600
Dithered Voltage Digital to Analog Converter (DVDAC) http://www.cypress.com/?rID=86073

Features

  • Two voltage ranges, 1 and 4 volts
  • Adjustable 9, 10, 11, or 12 bit resolution
  • Dithered using DMA for zero CPU overhead
  • Uses a single DAC block

Symbol Diagram

General Description

The Dithered Voltage Digital to Analog Converter (DVDAC) component has a selectable resolution between 9 and 12 bits. Dithering is used to increase the resolution of its underlying 8-bit VDAC8. Only a small output capacitor is required to suppress the noise generated by dithering.

]]>
Wed, 06 May 2015 01:02:40 -0600
PSoC<sup>®</sup> 3, PSoC 4, and PSoC 5LP Flash Memory Organization and Array ID Parameter – KBA84740 http://www.cypress.com/?rID=46656 Answer:

PSoC 3

In PSoC 3, the flash memory is organized as follows: (see Figure 1)

  1. One array of 64, 128, or 256 rows depending on the part number (Refer to the Ordering information section of the family datasheet).
  2. Each row contains 256 data bytes plus 32 bytes for either ECC or data storage. To enable ECC in PSoC Creator, click the System Tab of the .cydwr file > Configuration > Enable Error Correcting Code (ECC). If the option ‘Store Configuration Data in ECC Memory’ is enabled, then the device configuration data will be stored in the ECC memory to reduce main flash memory usage. Error correction may not be used when this option is enabled.

Figure 1: Flash Memory Organization for PSoC 3

psoc3 Flash Memory

PSoC 4

In PSoC 4, the flash memory is organized as follows: (see Figure 2)

  1. Either one array of 128, 256, or 512 rows or two arrays of 512 rows depending on the Part number (Refer to the Ordering information section of the family datasheet).
  2. Each row contains 64 or 128 data bytes depending on the part number (Refer to the Ordering information section of the family datasheet). PSoC 4 has a maximum of 128 KB of flash memory and does not support the ECC feature.

Figure 2: Flash Memory Organization for PSoC 4

psoc4 Flash Memory

PSoC 5LP

In PSoC 5LP, flash memory is organized as follows: (see Figure 3)

  1. Either one array of 128 or 256 rows or as multiple arrays of 256 rows depending on the Part number (Refer to ordering information section of the family datasheet).
  2. Each row contains 256 data bytes plus 32 bytes for either error correcting codes (ECC) or configuration data.

Figure 3: Flash Memory Organization for PSoC5 LP

psoc5lp Flash Memory

Writing data into Flash using Firmware:

There are three APIs to write data into flash in PSoC 3/5LP.

  1. CyWriteRowFull(uint8 arrayId, uint16 rowAddress, uint8 *rowData, uint16 rowSize): to write the entire row including ECC
  2. CyWriteRowData(uint8 arrayId, uint16 rowAddress, uint8 *rowData): to write the entire row without ECC
  3. CyWriteRowConfig(uint8 arrayId, uint16 rowAddress, uint8 *rowECC) to write just the ECC memory

The parameters required by these APIs are as follows:

  • Array-ID: The block number in which the required row is present. In case of PSoC 3, the valid Array-ID is only 0x00
  • RowAddress: Row address within the specified arrayId
  • RowData/RowECC: Address of the data to be programmed
  • RowSize: Number of bytes of row data

To write data into PSoC 4 flash, we use the CySysFlashWriteRow API which does not require the Array-ID Parameter.

These flash APIs are defined in CyFlash.c file. The details of the APIs are available in the ‘System Reference Guide’, which can be located in PSoC Creator at the following path:

Help > Documentation > System Reference > System Reference Guide

]]>
Tue, 05 May 2015 09:04:55 -0600
PSoC 3 Architecture http://www.cypress.com/?rID=40738 Mon, 27 Apr 2015 10:21:13 -0600 CY8CKIT-035 PSoC® Power Supervision Expansion Board Kit http://www.cypress.com/?rID=56653 The Power Supervision Expansion Board Kit (EBK) supports:

  • Rapid fault detection capabilities for high-availability systems
  • Accurate and reliable power rail sequencing of both power-on and power-off for four different power converters
  • Voltage and current monitoring of four different power converters
  • Trimming for closed-loop control of the power converters
  • Margining of power converters for developmental test purposes
  • EEPROM based data logging capabilities
  • I2C/SMbus/PMbus host interface

Cypress’s PSoC Power Supervision solution delivers all of these capabilities, supporting the largest number of power converters in a single chip. In addition, this solution provides you with flexibility to customize this solution for your specific application and the ability to further integrate disparate functionality like fan control, reset-control logic, I2C level translators, etc.


CY8CKIT-035.JPG
 

The PSoC Power Supervision Expansion Board Kit enables you to evaluate System Power Supervision functions and capabilities of the PSoC architecture. It is part of the PSoC development kit ecosystem and requires a host development board in order to use it. It is designed to work with the CY8CKIT-001 PSoC Development Kit (sold separately) or the CY8CKIT-030 PSoC 3 Development Kit (sold separately). You can evaluate the example projects described in this guide or design and customize your own System Power Supervision solution using components in Cypress's PSoC Creator software (included) or by altering example projects provided with this kit.


CY8CKIT-035_TO_CY8CKIT-030

CY8CKIT-035_VoltageSequencer.JPG
CY8CKIT-035 connected to the CY8CKIT-030 Voltage Sequencer Component in PSoC Creator

With the flexibility of the PSoC architecture, you can easily create your own custom Power Supervision solution on chip with the exact functionality you need, in the way you want it – no more, no less.

Note: For PSoC 1 power supervision example project using CY8CKIT-035, please click here.
 

Kit Contents:

  • PSoC® Power Supervision Expansion Board
  • Quick Start Guide
  • Power DC Adaptor 12V/2A
  • System CD containing:
    • User’s Guide
    • PSoC Creator and pre-requisite software
    • PSoC Programmer and pre-requisite software
    • Example Projects: (for both CY8CKIT-001 and CY8CKIT-030)
      • Advanced Sequencer
      • Power Supervisor
    • Application Notes and Key Component Datasheets
  • CY8CKIT-015 CD Containing
    • PSoC 1 Power Supervision Example Project
    • PSoC 1 Power Supervision Application Note
    • User's Guide for implementing PSoC 1 Power Supervision Solution
    • PSoC Designer™ and pre-requisite software
    • PSoC Programmer and pre-requisite software

For PSoC training, please visit http://www.cypress.com/go/training.

This kit can also be purchased from Terasic

Software Title Description Link
PSoC Creator This kit requires PSoC Designer for development
PSoC Programmer This kit requires PSoC Programmer for programming
]]>
Mon, 20 Apr 2015 17:33:30 -0600
AN96667 - PSoC® Real-Time Clock Based on Power-Line Frequency http://www.cypress.com/?rID=110790 AN96667 describes how to design an accurate real-time clock for PSoC® 3, PSoC 4, and PSoC 5LP MCUs using the 50/60-Hz frequency of the mains (utility) AC power line as the time base. It also explains how to use a 32.768-kHz watch crystal as a backup time base in case of a mains power failure.

Introduction

Accurate timekeeping is a vital requirement for applications that need to perform operations at a certain time of day (for example, automated control of street lights), store the timestamp of events (such as energy meters and data acquisition devices), or display the time and date (such as a digital wall clock).These applications use a real-time clock (RTC) to generate and keep track of time. RTCs should be accurate, low cost, and low power and consume minimal printed circuit board (PCB) space.

]]>
Sat, 18 Apr 2015 16:28:28 -0600
AN73854 - PSoC<sup>®</sup> 3, PSoC 4, and PSoC 5LP Introduction to Bootloaders http://www.cypress.com/?rID=56014 AN73854 gives a brief introduction to bootloader theory and technology, and then shows how bootloaders are quickly and easily implemented in PSoC® 3, PSoC 4, and PSoC 5LP MCUs, using PSoC Creator™. Topics include bootloader system description, features, and customization.

Introduction

This application note gives an overview of bootloader fundamentals and design principles, and then shows how they are implemented for PSoC 3, PSoC 4, and PSoC 5LP in PSoC Creator projects.

]]>
Sat, 18 Apr 2015 02:05:12 -0600
AN68272 - PSoC® 3, PSoC 4, and PSoC 5LP UART Bootloader http://www.cypress.com/?rID=50230

AN68272 describes a UART-based bootloader for PSoC® 3, PSoC 4 and PSoC 5LP. In this application note, you will learn how to use PSoC Creator™ to quickly and easily build a UART-based bootloader project, and bootloadable projects. It also shows how to build a UART-based embedded bootloader host program and a C#-based bootloader application.

Introduction

Bootloaders are a common part of MCU system design. A bootloader makes it possible for a product's firmware to be updated in the field. At the factory, initial programming of firmware into a product is typically done through the MCU's Joint Test Action Group (JTAG) or the ARM® Serial Wire Debugger (SWD) interface. However, these interfaces are usually not accessible in the field.

This is where bootloading comes in. Bootloading is a process that allows you to upgrade your system firmware over a standard communication interface such as USB, I2C, UART, or SPI. A bootloader communicates with a host to get new application code or data, and writes it into the device's flash memory.

 


The following table indicates the PSoC devices, PSoC Creator versions, compilers, and development kits that will work with this application note project:

Project Device PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Architecture Silicon
Revision
V3.1 CP1
or higher
V3.0 SP1 001
DVK
030/050
DVK
042 Pioneer DVK
AN68272.zip PSoC3 Prod YES NO YES YES* N/A
PSoC4 Prod YES NO YES N/A YES**
PSoC5LP Prod YES NO YES YES* N/A
AN68272_Archive.zip PSoC3 Prod NO YES YES YES* N/A
PSoC4 Prod NO YES YES YES* YES**
PSoC5 Prod NO YES YES YES* N/A

* Refer to Migrating CY8CKIT-001 DVK project to CY8CKIT 030/ 050.
** The project can be easily adapted to this DVK.

Notes:
  1. For PSoC 5 project and related document, please download file AN68272_Archive.zip.

Projects associated with this application note can be downloaded from the ‘Related Files’ section below. For your convenience, we have provided projects that are compatible with the two most recent versions of PSoC Creator: 

  • AN68272.zip is used with PSoC Creator 3.1 CP1
  • AN68272_Archive.zip is used with PSoC Creator 3.0 SP1

The project’s default settings may not be compatible with your device or kit, and you may need to change your project settings. For more information, see:

PSoC® 3, PSoC 4 and PSoC 5LP AN Project File Naming Convention and Use
]]>
Sat, 18 Apr 2015 02:02:24 -0600
AN60590 - PSoC® 3, PSoC 4, and PSoC 5LP – Temperature Measurement with a Diode http://www.cypress.com/?rID=42993 AN60590 explains diode-based temperature measurement using PSoC® 3, PSoC 4, and PSoC 5LP. The temperature is measured based on the diode forward bias current dependence on temperature. This application note details how the flexible analog architecture of PSoC 3, PSoC 4, and PSoC 5LP enables you to measure diode temperatures using a single PSoC device.

Introduction

Temperature is the most common and frequently measured environmental variable. Temperature measurements typically use one of the four sensors: thermocouple, thermistor, diode, and resistance temperature detector (RTD). The primary criteria for choosing a sensor are cost, accuracy, and temperature range.

The following table provides the list of devices, the supported Creator version, Development kit and Compiler for this application note project:

Project

Device
PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Compiler
Architecture
Silicon
Revision
V3.1 CP1
or higher
V3.0 CP7
001
DVK
030/050
DVK
003/014
FTK
Keil
GCC
RVDS
MDK

AN60590.zip

Prod
YES
NO
YES
YES*
NO
YES
N/A
N/A
N/A
Prod
YES
NO
YES
YES*
NO
N/A
YES
YES
YES
Prod
YES
NO
YES
YES*
NO
N/A
YES
YES
YES

* Refer to Migrating CY8CKIT-001 DVK project to CY8CKIT 030/ 050.


Projects associated with this application note can be downloaded from the 'Related Files' section below. For your convenience, we have provided projects that are compatible with the most recent version of PSoC Creator:

  • AN60590.zip is used with PSoC Creator 3.1 CP1

The project’s default settings may not be compatible with your device or kit, and you may need to change your project settings. For more information, see:

PSoC® 3, PSoC 4, and PSoC 5LP AN Project File Naming Convention and Use
]]>
Sat, 18 Apr 2015 02:00:24 -0600
CE96926 – PSoC® Real-Time Clock Based on Power Line Frequency http://www.cypress.com/?rID=110797 These code examples show how to implement a real-time clock (RTC) using the 50/60-Hz frequency of the mains power line as the time base. PSoC 3, PSoC 4, and PSoC 5LP devices are supported. The example for PSoC 4 BLE also uses a 32-kHz watch crystal oscillator (WCO) that can be used as the secondary time-base in case of a mains power failure.

Overview

An RTC provides time and date information – second, minute, hour, day of the week, day of the month, month, and year. The time and date information are usually updated every second based on a one-second interrupt generated from a 32.768-kHz crystal. However, there can be long-term drifts in the time due to factors such as the temperature and aging of the crystal.

An alternative technique is to use the frequency of the mains power line as a time base. Systems that are wall-powered and need a system clock can make use of this technique. This technique is applicable only in countries where mains power frequency adjustment is done.

]]>
Mon, 13 Apr 2015 01:14:01 -0600
Datasheet – PSoC® 3 CY8C32 Programmable System-on-Chip http://www.cypress.com/?rID=39976 General Description

PSoC® 3 is a true programmable embedded system-on-chip, integrating configurable analog and digital peripherals, memory, and a microcontroller on a single chip. The PSoC 3 architecture boosts performance through:

  • 8051 core plus DMA controller at up to 50 MHz
  • Ultra low power with industry's widest voltage range
  • Programmable digital and analog peripherals enable custom functions
  • Flexible routing of any analog or digital peripheral function to any pin

PSoC devices employ a highly configurable system-on-chip architecture for embedded control design. They integrate configurable analog and digital circuits, controlled by an on-chip microcontroller. A single PSoC device can integrate as many as 100 digital and analog peripheral functions, reducing design time, board space, power consumption, and system cost while improving system quality.

Features

  • Operating characteristics
    • Voltage range: 1.71 to 5.5 V, up to six power domains
    • Temperature range (ambient) -40 to 85 °C
    • DC to 50-MHz operation
    • Boost regulator from 0.5-V input up to 5-V output
  • Performance
    • 8-bit 8051 CPU, 32 interrupt inputs
    • 24-channel direct memory access (DMA) controller
  • Memories
    • Up to 64 KB program flash, with cache and security features
    • Up to 8 KB additional flash for error correcting code (ECC)
    • Up to 8 KB RAM
    • Up to 2 KB EEPROM
  • For more, see pdf
]]>
Fri, 10 Apr 2015 00:47:28 -0600
Datasheet – PSoC® 3 CY8C36 Programmable System-on-Chip http://www.cypress.com/?rID=37805 General Description

PSoC® 3 is a true programmable embedded system-on-chip, integrating configurable analog and digital peripherals, memory, and a microcontroller on a single chip. The PSoC 3 architecture boosts performance through:

  • 8051 core plus DMA controller and digital filter processor, at up to 67 MHz
  • Ultra low power with industry's widest voltage range
  • Programmable digital and analog peripherals enable custom functions
  • Flexible routing of any analog or digital peripheral function to any pin

PSoC devices employ a highly configurable system-on-chip architecture for embedded control design. They integrate configurable analog and digital circuits, controlled by an on-chip microcontroller. A single PSoC device can integrate as many as 100 digital and analog peripheral functions, reducing design time, board space, power consumption, and system cost while improving system quality.

Features

  • Operating characteristics
    • Voltage range: 1.71 to 5.5 V, up to six power domains
    • Temperature range (ambient) -40 to 85 °C
    • DC to 67-MHz operation
    • Boost regulator from 0.5-V input up to 5-V output
  • Performance
    • 8-bit 8051 CPU, 32 interrupt inputs
    • 24-channel direct memory access (DMA) controller
    • 24-bit 64-tap fixed-point digital filter processor (DFB)
  • Memories
    • Up to 64 KB program flash, with cache and security features
    • Up to 8 KB additional flash for error correcting code (ECC)
    • Up to 8 KB RAM
    • Up to 2 KB EEPROM
  • For more, see pdf
]]>
Fri, 10 Apr 2015 00:44:20 -0600
Datasheet – PSoC® 3 CY8C34 Programmable System-on-Chip http://www.cypress.com/?rID=37804 General Description

PSoC® 3 is a true programmable embedded system-on-chip, integrating configurable analog and digital peripherals, memory, and a microcontroller on a single chip. The PSoC 3 architecture boosts performance through:

  • 8051 core plus DMA controller at up to 50 MHz
  • Ultra low power with industry's widest voltage range
  • Programmable digital and analog peripherals enable custom functions
  • Flexible routing of any analog or digital peripheral function to any pin

PSoC devices employ a highly configurable system-on-chip architecture for embedded control design. They integrate configurable analog and digital circuits, controlled by an on-chip microcontroller. A single PSoC device can integrate as many as 100 digital and analog peripheral functions, reducing design time, board space, power consumption, and system cost while improving system quality.

Features

  • Operating characteristics
    • Voltage range: 1.71 to 5.5 V, up to six power domains
    • Temperature range (ambient) -40 to 85 °C
    • DC to 50-MHz operation
    • Boost regulator from 0.5-V input up to 5-V output
  • Performance
    • 8-bit 8051 CPU, 32 interrupt inputs
    • 24-channel direct memory access (DMA) controller
  • Memories
    • Up to 64 KB program flash, with cache and security features
    • Up to 8 KB additional flash for error correcting code (ECC)
    • Up to 8 KB RAM
    • Up to 2 KB EEPROM
  • For more, see pdf
]]>
Fri, 10 Apr 2015 00:40:44 -0600
Datasheet – PSoC® 3 CY8C38 Programmable System-on-Chip http://www.cypress.com/?rID=35178 General Description

PSoC® 3 is a true programmable embedded system-on-chip, integrating configurable analog and digital peripherals, memory, and a microcontroller on a single chip. The PSoC 3 architecture boosts performance through:

  • 8051 core plus DMA controller and digital filter processor, at up to 67 MHz
  • Ultra low power with industry's widest voltage range
  • Programmable digital and analog peripherals enable custom functions
  • Flexible routing of any analog or digital peripheral function to any pin

PSoC devices employ a highly configurable system-on-chip architecture for embedded control design. They integrate configurable analog and digital circuits, controlled by an on-chip microcontroller. A single PSoC device can integrate as many as 100 digital and analog peripheral functions, reducing design time, board space, power consumption, and system cost while improving system quality.

Features

  • Operating characteristics
    • Voltage range: 1.71 to 5.5 V, up to six power domains
    • Temperature range (ambient) -40 to 85 °C
    • DC to 67-MHz operation
    • Boost regulator from 0.5-V input up to 5-V output
  • Performance
    • 8-bit 8051 CPU, 32 interrupt inputs
    • 24-channel direct memory access (DMA) controller
    • 24-bit 64-tap fixed-point digital filter processor (DFB)
  • Memories
    • Up to 64 KB program flash, with cache and security features
    • Up to 8 KB additional flash for error correcting code (ECC)
    • Up to 8 KB RAM
    • Up to 2 KB EEPROM
  • For more, see pdf
]]>
Fri, 10 Apr 2015 00:35:37 -0600
Sleep Timer as a Wake-Up Source in PSoC<sup>®</sup> 3 and PSoC 5LP – KBA90926 http://www.cypress.com/?rID=110612 Answer: The Sleep Timer can be used as a wake-up source to wake up PSoC 3 or PSoC 5LP devices from Alternate Active or Sleep. It uses the Central Time Wheel (CTW), which is based on the 1-kHz internal low-speed oscillator (ILO).

The following figure shows the Sleep Timer Component that is available with PSoC Creator™:

Important: When the Sleep Timer is used as a wake-up source, the SleepTimer_GetStatus API must be called every time the Sleep Timer generates an interrupt. If the SleepTimer_GetStatus() function is not called in an interrupt associated with the Sleep Timer, the interrupt is not cleared. As soon as the interrupt is exited, it will be re-entered. This function can be written inside the ISR associated with the Sleep Timer.

The SleepTimer_GetStatus() function internally calls the CyPmReadStatus function with CY_PM_CTW_INT, which is the second bit of the CY_PM_INT_SR_REG Status Register, as the parameter. The status register also contains status bits for other events such as FTW and OPPS. However, because only the Mask Bit is passed for the CTW event, this function clears only the bit corresponding to the CTW event. Thus, the CTW interrupt status is cleared.

For a proper operation of the Sleep Timer Component, you should call the SleepTimer_GetStatus() function every time the device wakes up and every time the Sleep Timer interrupt is issued.

]]>
Wed, 08 Apr 2015 07:22:32 -0600
Using a Sheet Connector in PSoC<sup>®</sup> Creator™ – KBA85341 http://www.cypress.com/?rID=46340 Answer: A sheet connector connects Components without necessarily using a wire, across multiple pages in a schematic. It can also be used to simplify the process of connecting a Component output to multiple Component inputs. You may find the sheet connector in the left pane of the TopDesign.cysch file. Refer to Figure 1.

Figure 1. Sheet Connector Icon in PSoC Creator

The following example shows you how to use a sheet connector:

There is an input pin (Pin_1) in "Page 1" of the TopDesign schematic (refer to Figure 2).

Figure 2. Page 1 of the TopDesign Schematic Where Pin_1 Is Placed

There is an AND gate in "Page2" of the TopDesign schematic (refer to Figure 3).

Figure 3. Page 2 of the TopDesign Schematic Where the AND Gate Is Placed

You will connect Pin_1 from Page 1 to the AND gate’s input in Page 2.

  1. Place a wire on the AND gate’s input where you wish to connect Pin_1.
  2. Click the sheet connector icon as shown in Figure 1.
  3. Place this icon on the wire at Pin_1 as shown in Figure 2.
  4. Right-click the wire connected Pin_1. Click Edit Name and Width on the dialog box that appears. Give a particular name to the wire—say, "and_input_1" as shown in Figure 4.

    Figure 4. Specifying Signal Name for the Wire

  5. Likewise, place a wire to AND gate’s input in Page 2 and connect it to the sheet connector.
  6. Right-click the wire in Page 2 and give the same name as given to the sheet connector’s wire in Page 1—that is, "and_input_1"

The above operations are equivalent to placing Pin_1 in Page 2 of the TopDesign schematic and connecting it directly to the AND gate. By following this method, you can route the input from Pin_1 to different Components placed in different pages in the TopDesign schematic file.

]]>
Wed, 08 Apr 2015 07:10:15 -0600
Displaying a Float Value on LCD Using PSoC<sup>®</sup> 3 or PSoC 5LP – KBA94460 http://www.cypress.com/?rID=43905 .style1 {color:#0000CC;} .style2 {color:#339900;} .style3 {color:#FF0000;}

Answer:

To display a float value on LCD, you first need to convert the float value to a string using the sprintf function.

Use the following snippet of code to display a float value (say -1.2345) on the LCD.

#include <project.h>
#include <stdio.h>

int main()
{
	/* Place your initialization/startup code here (e.g. MyInst_Start()) */
	
	
	char tstr[16];
	float compValue = -1.2345;
	LCD_Start();
	LCD_Position(0,0);
	sprintf(tstr, "%+1.4f", compValue ); //converts floats to ASCII and stores it in char array tstr
	LCD_PrintString(tstr);
	for(;;)
	{
	/* Place your application code here. */
	}
}

Now, -1.2345 will be printed on the LCD.

]]>
Wed, 08 Apr 2015 04:56:22 -0600
PSoC® Programmer 3.22.3 http://www.cypress.com/?rID=38050

PSoC Programmer 3.22.3 offers the user a simple GUI that connects to programming hardware to program and configure PSoC, Clock, and configurable Cypress devices. Also provided with PSoC Programmer is the Bridge Control Panel, which can be used to debug, graph and log I2C serial communications. PSoC Programmer also provides a hardware layer for customers to design custom applications or use existing code examples for testing hardware and firmware designs.

PSoC Programmer 3.22.3 supports both PSoC Creator and PSoC Designer in a single installation.

PSoC Programmer 3.22.3 is a minor release. For additional information regarding the installation and the new features please see the release notes in the downloads table below.


PSoC Programmer:

PSoC Programmer is a flexible, integrated programming application for programming PSoC devices. PSoC Programmer can be used with PSoC Designer and PSoC Creator to program any design onto a PSoC device. PSoC Programmer supports all PSoC 1, PSoC 3, PSoC 4, and PSoC 5LP devices.

Supported PC Operating Systems:

PSoC Programmer currently supports the following windows operating systems:

  • Windows XP (32/64 bit)
  • Windows Vista (32/64 bit)
  • Windows 7 (32/64 bit)
  • Windows 8 (32/64 bit) 
  • Windows 8.1 (32/64 bit)

COM Hardware Layer Supported Languages:

PSoC Programmer provides the user a hardware layer with API’s to design specific applications utilizing the programmers and bridge devices. The PSoC Programmer hardware layer is fully detailed in the COM guide documentation as well as example code across the following languages: C#, C, Perl, and Python.

PSoC Programmer Secondary Software

PSoC Programmer includes additional software beyond just PSoC Programmer. For more information on that additional software please: Click Here

Third Party IDE and Programming Support

PSoC Programmer delivers a number of files and utilities that enable 3rd party programming and debugging support for PSoC device families. In the downloads table below we include the 3rd party user guide which will assists the user in configuring and enabling the support in the IDEs or programming utilities. The files and applications can be found in the root installation directory for each programmer installation.

Archived Software:

PSoC Programmer software is archived at the following page: Click Here

Additional Programming Links:
Prototype Programming Hardware:

PSoC Programmer is part of a suite of programming options and programming content available to PSoC users. For customers who are looking for more information on general programming options and information please navigate to the web page linked below. On the General Programming web page we discuss all of the available programming options for customers including Software, Schematics, Programming Specifications, and 3rd party mass programming.

www.cypress.com/go/programming

All PDF documents require at least a PDF reader installed prior to opening.

]]>
Mon, 30 Mar 2015 13:09:34 -0600
Differences Between SIO and GPIO Pins in PSoC® 3 and PSoC 5LP – KBA91716 http://www.cypress.com/?rID=38583 Answer: Table 1 summarizes the major differences between SIO and GPIO pins in PSoC3 and PSoC 5LP.

Table 1. Differences Between SIO and GPIO Pins

Feature SIO GPIO
Current Sink 25 mA/pin 8 mA/pin
Programmable
Output Level (Voh)
Yes No
Programmable
Input Threshold
Yes No
Hot Swap Yes No
Overvoltage
Tolerance
6 V VDDIO+0.5 V
LCD Drive No Yes
CapSense No Yes
Analog
Connectivity
No Yes
Physical
Availability
Port 12 Multiple other ports

For more information on using SIO pins, please refer to AN60580 - SIO Tips and Tricks in PSoC® 3 / PSoC 5LP.

For usage details of GPIO pins, refer to AN72382 - Using PSoC® 3 and PSoC 5LP GPIO Pins.

]]>
Fri, 27 Mar 2015 06:10:18 -0600
PSoC 3 Known Problems and Solutions http://www.cypress.com/?rID=40741 Mon, 16 Mar 2015 17:00:19 -0600 CPU Code Execution and Writing to Flash Memory of PSoC<sup>®</sup> 3/4/5LP Devices - KBA90912 http://www.cypress.com/?rID=109020 Answer: In PSoC 3/4/5LP devices, writing into the flash memory is blocking. PSoC 3/4/5LP devices have an internal hardware block named System Performance Controller (SPC), which performs erase and program operations on the nonvolatile memory. CPU code execution from the flash memory will be halted until SPC completes writing the data to the flash memory.

In PSoC 3/5LP devices, the flash memory can be read either by the cache controller or the SPC; however, flash memory write can be performed only by the SPC. SPC and cache controller cannot simultaneously access the flash memory. If the cache controller tries to access the flash memory at the same time as the SPC, then the cache controller must wait until the SPC completes its flash memory access operation. The CPU, which accesses the flash memory through the cache controller, is therefore stalled in this circumstance.

The CyWriteRowFull(), CyWriteRowData(), and CyWriteRowConfig() APIs write to the flash memory via the SPC. If a CPU code fetch has to be done from the flash memory due to a cache miss condition, then the cache controller will have to wait until the SPC completes the flash memory write operation. Thus the CPU code execution from the flash memory will be halted until the flash memory write is complete.

PSoC 4 devices do not have cache memory. However, writing to the flash memory using the CySysFlashWriteRow() API is a blocking instruction and therefore CPU execution from the flash memory will be halted while a flash memory write is taking place. CPU execution will resume after the flash memory write operation.

For PSoC 4 and PSoC 5LP devices, CPU can execute code from the SRAM memory while the flash write operation is underway.

]]>
Wed, 11 Mar 2015 05:32:09 -0600
File System Library (emFile) http://www.cypress.com/?rID=58694 Features Symbol Diagram
  • Up to four Secure Digital (SD) cards in SPI mode
  • FAT12/16 or FAT32 format
  • Optional integration with an Operating System (OS)
  • Optional Long File Name (LFN) handling

General Description

The emFile component provides an interface to SD cards formatted with a FAT file system. The SD card specification includes multiple hardware interface options for communication with an SD card. This component uses the SPI interface method for communication. Up to four independent SPI interfaces can be used for communication with one SD card each. Both FAT12/16 and FAT32 file system formats are supported. This component provides the physical interface to the SD card and works with the emFile library licensed from SEGGER Microcontroller to provide a library of functions to manipulate a FAT file system.

Firmware Installation:  The firmware files for this component are not distributed with PSoC Creator and can be downloaded below. Please refer to the component datasheet for installation instructions.

IMPORTANT NOTICE REGARDING LONG FILE NAMES: If you configure the software to support long file names on FAT file systems, you should determine whether a license from Microsoft is required. Cypress and its suppliers grant no license under Microsoft's intellectual property rights and assume no liability for any use of the software without obtaining any license that may be required.

PSoC® Creator emFile Component Video

use for camtasia screencasts

]]>
Wed, 04 Mar 2015 22:49:22 -0600
AN72845 - Design Guidelines For Cypress Quad Flat No-Lead (QFN) Packaged Devices http://www.cypress.com/?rID=57189 AN72845 offers guidelines for the design, manufacturing, and handling of Cypress quad flat no-lead (QFN) packages on printed circuit boards (PCBs) and flexible printed circuits (FPC).

Introduction

This application note is intended for engineers who design and develop surface mount technology (SMT) printed circuit boards (PCBs) or flexible printed circuits (FPCs), with QFN-packaged devices.

]]>
Wed, 04 Mar 2015 01:12:06 -0600
QTP 101101: PSoC®3 Family, S8P-5RP, Fab4 http://www.cypress.com/?rID=49098 Thu, 19 Feb 2015 03:00:17 -0600 AN56377 - PSoC<sup>®</sup> 3 and PSoC 5LP - Introduction to Implementing USB Data Transfers http://www.cypress.com/?rID=39553 AN56377 describes the four USB transfer types: Interrupt, Bulk, Isochronous, and Control. It then shows how to configure PSoC® 3 and PSoC 5LP to perform each of these transfers. Code examples are also included for specific considerations, including vendor commands for custom USB functionality, and to use DMA for faster data throughput. This application note assumes a basic-level knowledge of USB and is intended as an initial hands-on introduction to USB on PSoC 3 and PSoC 5LP. For a general introduction to USB, see AN57294.

Below are some of videos demonstrating  how to impliment bulk transfers and vendor commands which are discussed in this application note.

 

 

 

The following table indicates the PSoC devices, PSoC Creator versions, compilers, and development kits that will work with this application note project:


Project
Device
PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Compiler
Architecture
Silicon
Revision
V2.1 SP1
or higher
V2.1
/ V2.0
001
DVK
030/050
DVK
003/014
FTK
Keil
GCC
RVDS
MDK

AN56377.zip

Prod
YES
NO
YES
YES*
NO
YES
N/A
N/A
N/A
Prod
YES
NO
YES
YES*
NO
N/A
YES
YES
YES
AN56377_Archive.zip
ES2,ES3, Prod
NO
YES
YES
YES*
NO
YES
N/A
N/A
N/A
ES1, Prod
NO
YES
YES
YES*
NO
N/A
YES
YES
YES

*Refer to Migrating CY8CKIT-001 DVK project to CY8CKIT 030/ 050

Notes:

  1. For PSoC 5 project and related document, please download file AN56377_Archive.zip.

Projects associated with this application note can be downloaded from the ‘Related Files’ section below. For your convenience, we have provided projects that are compatible with the two most recent versions of PSoC Creator:

  • AN56377.zip is used with PSoC Creator 3.0 SP1 and 2.1 SP1
  • AN56377_Archive.zip is used with PSoC Creator 2.1 /2.0

The project’s default settings may not be compatible with your device or kit, and you may need to change your project settings. For more information, see:
PSoC® 3, PSoC 4 and PSoC 5LP AN Project File Naming Convention and Use

]]>
Wed, 18 Feb 2015 04:03:19 -0600
QTP 120407: 44 QFN (5X5X0.6MM), NIPDAU, MSL3, 260C REFLOW, ASEK-TAIWAN (G) http://www.cypress.com/?rID=62416 Wed, 18 Feb 2015 03:00:17 -0600 QTP 114905: 48 QFN (7x7x1.0mm) NiPdAu, 100% Cu Wire MSL3, 260°C Reflow ASEK-Taiwan (G) http://www.cypress.com/?rID=61295 Tue, 17 Feb 2015 03:00:17 -0600 QTP 114906: 68/56 QFN (8x8x1.0mm) NiPdAu, 100% Cu Wire MSL3, 260°C Reflow ASEK-Taiwan (G) CYPRESS http://www.cypress.com/?rID=61294 Tue, 17 Feb 2015 03:00:17 -0600 PSoC®1 Getting Started Debugging - Part1 - The Hardware http://www.cypress.com/?rID=68835 The video shows a block diagram of the major components of a PSoC1 debugging setup, the two types of pods – the CY3210 pod and the CY3250 pod, complete hardware setup for both types of the pods and a pod selector guide that lists all the PSoC1 devices and the relevant pod and pod feet.

use for camtasia screencasts

]]>
Tue, 17 Feb 2015 02:51:56 -0600
Introduction to PsoC® Power Management Board Kit http://www.cypress.com/?rID=68621
 

]]>
Tue, 17 Feb 2015 02:49:46 -0600
PSoC drives camera control in Chilean mine rescue http://www.cypress.com/?rID=46874

]]>
Mon, 16 Feb 2015 03:39:49 -0600
PSoC 3 Low Power with Real-Time Clock http://www.cypress.com/?rID=42739
 

]]>
Mon, 16 Feb 2015 03:16:53 -0600
PSoC Expansion Board Kit For iPhone & iPod Accessories Video http://www.cypress.com/?rID=41078
 

]]>
Mon, 16 Feb 2015 03:15:03 -0600
The PSoC Closet http://www.cypress.com/?rID=40358

]]>
Mon, 16 Feb 2015 00:34:38 -0600
Announcing PSoC 3 and PSoC 5 http://www.cypress.com/?rID=40357

]]>
Mon, 16 Feb 2015 00:33:55 -0600
Creating a Voltmeter with PSoC http://www.cypress.com/?rID=40356
 

]]>
Mon, 16 Feb 2015 00:33:14 -0600
CY8CKIT-006 PSoC 3 LCD Segment Drive Evaluation Kit http://www.cypress.com/?rID=40355

]]>
Mon, 16 Feb 2015 00:32:29 -0600
CY8CKIT-029 PSoC LCD Segment Drive Expansion Board Kit http://www.cypress.com/?rID=40354

]]>
Mon, 16 Feb 2015 00:31:31 -0600
Exploring the New PSoC Platform http://www.cypress.com/?rID=40352
 

]]>
Mon, 16 Feb 2015 00:30:26 -0600
Executing Code While Writing to EEPROM in PSoC<sup>®</sup> 3 and PSoC 5 - KBA83440 http://www.cypress.com/?rID=107212 Answer: PSoC 3 and PSoC 5 device continue to execute code while a write to EEPROM is in progress. The EEPROM Component provides two types of APIs for writing to EEPROM: blocking and non-blocking APIs.

  • EEPROM_StartWrite(parameters) is a non-blocking API. This implies that after this API is called, the code execution is not held up by the EEPROM write operation. You can obtain the status of the write operation performed by this API using the API EEPROM_QueryWrite(parameters).
  • EEPROM_Write(parameters) is a blocking API, which does not return a status until the write operation is completed. If this API is used, code execution cannot continue until the EEPROM is written. It returns a status code indicating whether the write operation is successful or not.

Refer to the EEPROM Component datasheet in PSoC Creator™ to know more about how to use these APIs.

]]>
Fri, 06 Feb 2015 02:16:41 -0600
CE95284 - CapSense® CSD Design with PSoC® 3 and PSoC 5LP http://www.cypress.com/?rID=105685 Objective

This code example demonstrates the usage of the CapSense® CSD component in PSoC® 3 and PSoC 5LP.

Overview

This code example shows how to implement CapSense button sensors and linear slider using the CapSense CSD Component.

In this code example, the CapSense CSD Component is configured to scan two CapSense button sensors and one linear slider with five segments. The CapSense button sensor on/off status is indicated using the LEDs and the finger position on the linear slider is indicated on a character LCD using a bar graph.

This code example can be tested on PSoC development kits such as CY8CKIT-001, CY8CKIT-030, and CY8CKIT-050.

Requirements

Tool: PSoC Creator 3.0 SP2
Programming Language: C (DP8051 Keil 9.51, ARM GCC 4.7.3, and ARM MDK compilers)
Associated Parts: All PSoC 3 and PSoC 5LP parts
Related Hardware: CY8CKIT-001, CY8CKIT-030, and CY8CKIT-050

]]>
Thu, 05 Feb 2015 07:22:57 -0600
CE95314 - PSoC® 3, PSoC 4, and PSoC 5LP EZI2C http://www.cypress.com/?rID=105776 Objective

These code examples demonstrate the usage of EZI2C slave and I2C master Components in PSoC 3, PSoC 4, and PSoC 5LP.

Overview

These code examples show how two I2C Components – EZI2C slave and I2C master – communicate with each other. Normally, these Components would be on separate devices, but for this example project, they are on the same PSoC chip. An off-chip connection is made between them.

There are two examples:

  • For PSoC 3 and PSoC 5LP, running on a kit with two buttons and a character LCD, such as the Cypress CY8CKIT-030 and CY8CKIT-050 kits.
  • For PSoC 4200, running on the Cypress CY8CKIT-042 kit, which has one button and an RGB LED.

Each I2C Component maintains its own data buffer. Note that an EZI2C buffer can be defined such that only the first N bytes are writeable by the master and the remaining bytes are read-only. This functionality is demonstrated in this example.

Requirements

Tool: PSoC Creator 3.0 SP2.
Programming Language: C (DP8051 Keil 9.51, ARM GCC 4.7.3, and ARM MDK compilers)
Associated Parts: All PSoC 3, PSoC 4200, and PSoC 5LP parts
Related Hardware: CY8CKIT-030, CY8CKIT-050, CY8CKIT-042, CY8CKIT-001

]]>
Thu, 05 Feb 2015 06:38:41 -0600
PSoC® Creator™ Component Author Guide http://www.cypress.com/?rID=49025 This guide provides instructions and information that will help you create components for PSoC Creator. This guide is intended for advanced users to create sophisticated components that other users employ to interact with PSoC Creator. However, there are some basic principles in this guide that will also benefit novice users who may wish to create their own components. This chapter includes:

  • Component Creation Process Overview
  • Conventions
  • References
  • Revision History
]]>
Tue, 03 Feb 2015 23:18:44 -0600
PSoC Creator Training http://www.cypress.com/?rID=40547 PSoC 3 and PSoC 5 Workshops:

Introduction to PSoC 3
This half day workshop will give you hands-on experience using and developing PSoC3 and PSoC5 solutions utilizing Cypress's PSoC® Creator™ Software development environment and the PSoC Development Kit (CY8CKIT-001)

Introduction to PSoC 5
This half day workshop will give you hands-on experience using and developing PSoC 5 solutions utilizing Cypress's PSoC® Creator™ Software development environment and the PSoC Development Kit (CY8CKIT-001)

PSoC 3 and PSoC 5 Intermediate Workshop
This full day workshop provides in depth training on how to use the high precision and programmable analog, programmable digital and advanced CPU subsystems in your embedded designs. This workshop builds off of the first, half-day, Introduction to PSoC 3 and PSoC 5 Workshop and provides more in depth and hands-on training for you to fully understand these features and how to use them with the PSoC Creator integrated development environment.

-->
PSoC Videos:

PSoC Creator: Made for Engineers
Meet Alan Hawse, Executive Vice President of Software for Cypress, and his vision for PSoC Creator.

PSoC Today! Introducing PSoC 4 Part I
Special Guest Max Kingsbury kicks off a series introducing the PSoC 4 and the Pioneer kit.

PSoC 5LP Analog Design
Jim Davis, Product Marketing Manager for PSoC, introduces you to the analog design methodology of PSoC and PSoC Creator

For more PSoC videos visit our video library at video.cypress.com

PSoC On-Demand Training:

PSoC Creator 101 Lesson 1: Introduction to PSoC Creator 101
PSoC Creator 101 Lesson 2: Introduction to PSoC
PSoC Creator 101 Lesson 3: Getting to Know PSoC Creator
PSoC Creator 101 Lesson 4: Let's Get an LED to Blink Part 1
PSoC Creator 101 Lesson 5: Let's Get an LED to Blink Part 2
PSoC Creator 101 Lesson 6: Let's Get CapSense Working
PSoC Creator 101 Lesson 7: IDE Export
PSoC Creator 101 Lesson 8: PSoC Resources
PSoC Creator 101: PSoC Creator File Structure
PSoC Creator 101: PSoC 4200 Low Power Modes
PSoC Creator 101: PSoC 4200 Low Power Modes - Tips and Tricks
PSoC Creator 101: PSoC 4200 Low Power Modes - Using the Sleep Mode

Getting Started

Using the UDB Editor

Component Creation Tutorials


Component Development Training For PSoC using PSoC Creator

PSoC Creator 110: Schematic Components
PSoC Creator 111: Component Parameters
PSoC Creator 112: Intro to Component API Generation
PSoC Creator 113: PLD Based Verilog Components
PSoC Creator 210: Intro to Datapath Components
PSoC Creator 211: Datapath Computation
PSoC Creator 212: Datapath FIFOs
PSoC Creator 213: Multi-Byte Datapath Components
PSoC Creator 214: Datapath API Generation
PSoC Creator: Custom Components
]]>
Wed, 28 Jan 2015 00:41:58 -0600
EZI2C Slave http://www.cypress.com/?rID=48917 Features
  • Industry standard NXP® I2C bus interface
  • Emulates common I2C EEPROM interface
  • Only two pins (SDA and SCL) required to interface to I2C bus
  • Standard data rates of 50/100/400/1000 kbps
  • High level APIs require minimal user programming
  • Supports one or two address decoding with independent memory buffers
  • Memory buffers provide configurable Read/Write and Read Only regions
Symbol Diagram

General Description

The EZI2C Slave component implements an I2C register-based slave device. It is compatible with I2C Standard-mode, Fast-mode, and Fast-mode Plus devices as defined in the NXP I2C-bus specification. The master initiates all communication on the I2C bus and supplies the clock for all slave devices. The EZI2C Slave supports standard data rates up to 1000 kbps and is compatible with multiple devices on the same bus.

The EZI2C Slave is a unique implementation of an I2C slave in that all communication between the master and slave is handled in the ISR (Interrupt Service Routine) and requires no interaction with the main program flow. The interface appears as shared memory between the master and slave. Once the EZI2C_Start() function is executed, there is little need to interact with the API.
 

]]>
Tue, 27 Jan 2015 03:45:55 -0600
AN89611 - PSoC<sup>®</sup> 3 and PSoC 5LP – Getting Started With Chip Scale Packages (CSP) http://www.cypress.com/?rID=90919 This application note provides guidelines for using Cypress PSoC® 3 and PSoC 5LP devices in wafer-level chip scale packages (CSP). Included are instructions for using the I2C bootloader that is factory installed in these devices.

Introduction

Cypress is now offering its PSoC 3 and PSoC 5LP family of products in wafer-level chip scale packages (WLCSP, or CSP for short). These devices are designed to pack the maximum mixed-signal SoC capability per cubic millimeter. They feature package sizes as small as 4.25 × 4.98 × 0.6 mm to fit into tiny spaces on very small PCBs or flexible printed circuits (FPC). However, their small size mandates special manufacturing techniques and design considerations.

]]>
Tue, 27 Jan 2015 03:12:52 -0600
SC/CT Comparator (SCCT_Comp) http://www.cypress.com/?rID=82358 Features Symbol Diagram
  • Output routable to digital logic blocks or pins
  • Selectable output polarity

General Description

The SC/CT Comparator (SCCT_Comp) component provides a hardware solution to compare two analog input voltages. The implementation uses a mode of the Switched Capacitor / Continuous Time (SC/CT) analog block to implement the comparator. The output can be digitally routed to another component. A reference or external voltage can be connected to either input. You can also invert the output of the comparator using the Polarity parameter.

]]>
Tue, 27 Jan 2015 01:23:44 -0600
Power Monitor http://www.cypress.com/?rID=63922 Features

  • Interfaces to up to 32 DC-DC power converters
  • Measures power converter output voltages and load currents using a DelSig-ADC
  • Monitors the health of the power converters generating warnings and faults based on user-defined thresholds
  • Support for measuring other auxiliary voltages in the system
  • Support 3.3V and 5V chip power supply
Symbol Diagram


General Description

Power Converter Voltage Measurements:

For power converter voltage measurements, the ADC can be configured into single-ended mode (0-4.096 V range or 0-2.048 V range). The ADC can also be configurable into differential mode (±2.048 V range) to support remote sensing of voltages where the remote ground reference is returned to PSoC over a PCB trace. In cases where the analog voltage to be monitored equals or exceeds Vdda or the ADC range, external resistor dividers are recommended to scale the monitored voltages down to an appropriate range.

Power Converter Current Measurements:

For power converter load current measurements, the ADC can be configured into differential mode (+/- 64 mV or +/- 128 mV range) to support voltage measurement across a high-side series shunt resistor on the outputs of the power converters. Firmware APIs convert the measured differential voltage into the equivalent current based on the external resistor component value used. The ADC can also be configured into single-ended mode (matching the selected voltage measurement range) to support connection to external current sense amplifiers (CSAs) that convert the differential voltage drop across the shunt resistor into a single ended voltage or to support power converters or hot-swap controllers that integrate similar functionality.

PSoC Creator Power Monitor Component Video  

use for camtasia screencasts

]]>
Tue, 27 Jan 2015 01:18:39 -0600
Mixer http://www.cypress.com/?rID=48920 Features
Symbol Diagram
  • Single-ended mixer
  • Continuous-time up mixing:
    • Input frequencies up to 500 kHz
    • Sample clock up to 1 MHz
  • Discrete-time, sample-and-hold down mixing:
    • Input frequencies up to 14 MHz
    • Sample clock up to 4 MHz
  • Adjustable power settings
  • Selectable reference voltage

General Description

The Mixer component provides a single-ended modulator. The Mixer component can be used for frequency conversion of an input signal using a fixed Local Oscillator (LO) signal as the sampling clock. The manipulations of signal frequencies that a mixer performs can be used to move signals between frequency bands or to encode and decode signals. A mixer can be used to convert signal power at one frequency into power at another frequency to make signal processing easier, typically shifting higher frequencies to baseband.

]]>
Tue, 27 Jan 2015 01:13:45 -0600
Thermocouple Calculator http://www.cypress.com/?rID=69779 Features
  • Supports B, E, J, K, N, R, S, and T Type Thermocouples
  • Provides functions for thermo-emf to temperature and temperature to voltage conversions
  • Displays Calculation Error Vs. Temperature graph
Symbol Diagram

General Description

In thermocouple temperature measurement, the thermocouple temperature is calculated based on the measured thermo-emf voltage. The voltage to temperature conversion is characterized by the National Institute of Standards and Technology (NIST), and NIST provides tables and polynomial coefficients for thermo-emf to temperature conversion. The NIST tables and polynomial coefficients can be found in the following link:

http://srdata.nist.gov/its90/download/download.html

Thermocouple temperature measurement also involves measuring the thermocouple reference junction temperature and converting it into a voltage. The Thermocouple Calculator component simplifies the thermocouple temperature measurement process by providing APIs for thermo-emf to temperature conversion and vice versa for all thermocouple types mentioned above, using polynomials generated at compile time. The thermocouple component evaluates the polynomial in an efficient way to reduce computation time.

]]>
Fri, 23 Jan 2015 07:25:54 -0600
Thermistor Calculator http://www.cypress.com/?rID=69783 Features
  • Adaptable for majority of negative temperature coefficient (NTC) thermistors
  • Look-Up-Table (LUT) or equation implementation methods
  • Selectable reference resistor, based on thermistor value
  • Selectable temperature range
  • Selectable calculation resolution for LUT method
Symbol Diagram

General Description

The Thermistor Calculator component calculates the temperature based on a provided voltage measured from a thermistor. The component is adaptable to most NTC thermistors. It calculates the Steinhart-Hart equation coefficients based on the temperature range and corresponding user-provided reference resistances. The component provides API functions that use the generated coefficients to return the temperature value based on measured voltage values.

This component doesn't use an ADC or AMUX inside and thus requires those components to be placed separately in your projects.

]]>
Fri, 23 Jan 2015 07:21:22 -0600