• Three modes of operation of the FX1/FX2LP
• Endpoint Configuration and Multiple Buffering
• Three Domains that form the basic component of the FIFO architecture
• Arming and committing endpoint buffers
• Endpoint operation in manual vs. auto mode

Features

• Powerful Harvard-architecture processor
• Flexible on-chip memory
• Complete development tools
• Precision, programmable clocking
• Programmable pin configurations
• Full-Speed USB (12 Mbps)
• Additional system resources
• For more, see pdf
   

Functional Overview

The enCoRe V family of devices are designed to replace multiple traditional full-speed USB microcontroller system components with one, low cost single-chip programmable component. Communication peripherals (I2C/SPI), a fast CPU, Flash program memory, SRAM data memory, and configurable I/O are included in a range of convenient pinouts.

Flow Control. Choose this function if the two UART links have different processing speeds. If the UART receiver has a processing delay between two consecutive receptions over the UART, it can signal ‘wait’ to the UART transmitter by deasserting the CTS line. When you are ready to send data, the transmitter can use the RTS pin to signal the receiver to keep its receiving line active. The DTR/DSR pin can enable and disable the Transmit/Receive function. The RTS/CTS pin can enable and disable the transfer of individual blocks of data.

I/O. You can choose this function if the UART transmitter and receiver have similar processing speeds. You can use the CTS, RTS, DTR, and DSR pins as I/Os that can be read and written to from the PC by USB requests. In this mode, CTS and DSR serve as input pins and RTS and DTR serve as output pins.

The device can resume normal operations when the USB detects activity or a reset signal. When the device is in Suspend, and Remote wakeup is enabled, then asserting the wakeup signal generates remote wakeup signaling on the upstream. The device resumes normal operations when the host acknowledges the signal.

The ReadFile API returns are based on the following conditions:

1. A short data packet is received.
2. The ReadFile API buffer is completely filled.
3. A read timeout has occurred.
4. The device port is closed.

A short data packet is as small as one byte or as much as the maximum data packet size described in the device descriptors. You can use the User Mode Driver or the application to check the number of bytes read by the ReadFile API.

Contact Cypress Sales for more information about Windows CE Driver.

• Baud rate: 230K baud. This rate does not support flow control.
• Parity bit: ‘None’.

The current implementation takes the next available COM port number and assigns it to the Cypress USBUART driver. This avoids any COM port number conflicts. However, you can change the registry setting to use a fixed COM port number. For more information, refer to Windows CE documentation.

You can follow these steps to load the driver without using the Cypress VID and PID:

1. Change Windows registry settings to reflect the new VID and PID.
2. Add and set a new global environment variable called BSP_NO_CYP_VID. Recompile the source and build the Windows CE image.

Features

• Universal Serial Bus (USB) Integration
• Universal Asynchronous Receiver Transmitter (UART)
• Full device operation from a single voltage supply of 3.3 V or 5 V
• Low power consumption in suspend mode
• Integrated 24 MHz oscillator
• Integrated 3.3 V regulator
• Integrated flash to store device configuration
• Software support for ease of development
• For more, see pdf

Functional Overview

Cypress’s USB-to-UART bridge controller enables seamless PC connectivity for peripherals with UART interface. It integrates a USB 2.0 Full-Speed device controller, UART, voltage regulator, oscillator and flash memory for storing configuration parameters, offering a cost-effective solution. The controller supports bus-powered and self-powered modes, and enables efficient system power management with suspend and remote wake-up signals. It is available in 28-pin SSOP package.

• Industry standard Philips I2C bus compatible interface
• Master and Slave operation, Multi Master capable
• Only two pins (SDA and SCL) required to interface to I2C bus
• Standard data rate of 100/400 kbps, also supports 50 kbps
• High level API requires minimal user programming
• 7-bit addressing mode
   

The I2C Hardware User Module implements an I2C device in firmware. The I2C bus is an industry standard, two-wire hardware interface developed by Philips®. The master initiates all communication on the I2C bus and supplies the clock for all slave devices. The I2CHW User Module supports the standard mode with speeds up to 400 kbps. No digital or analog user blocks are consumed with this module. The I2CHW User Module is compatible with other slave devices on the same bus.

Features and Overview

• The 32-bit general purpose counter uses four PSoC blocks
• Source clock rates up to 48 MHz
• Automatic reload of period on terminal count
• Programmable pulse width
• Input enables/disables continuous counter operation
• Interrupt option on compare output or terminal count
   

The 32-bit Counter User Module provides a down counter with a programmable period and pulse width. The clock and enable signals can be selected from any system time base or external source. Once started, the counter operates continuously and reloads its internal value from the period register upon reaching terminal count. During each clock cycle, the counter compares the current count to the value stored in the compare register. Each clock cycle, the Counter tests the count against the value of the compare register for either a “less than" or “less than or equal to" condition. The comparator output provides a logic level that may be routed to pins and to other user modules.

• 8-bit general purpose timer uses one PSoC block
• Source clock rates up to 48 MHz
• Automatic reload of period on terminal count
• Capture for clocks up to 24 MHz
• Terminal count output pulse may be used as input clock for other analog and digital functions
• Interrupt option on terminal count, capture (on some devices), or when counter reaches a preset value
   

The 8-Bit Timer User Modules provides a down counter with programmable period and capture ability. The clock and enable signals can be selected from any system time base or external source. Once started, the timer operates continuously and reloads its internal value from the period register upon reaching terminal count. The output pulses high in the clock cycle following terminal count. Events can capture the current Timer count value by asserting the edge-sensitive capture input signal. Each clock cycle, the Timer tests the count against the value of the compare register for either a “Less Than" or “Less Than or Equal To" condition. Interrupts may be generated based on terminal count and compare signals. Some device families offer two additional features. The interrupt options include “interrupt on capture" and, in addition, the compare signal may be routed onto the row buses. If these options are available on your chosen device they will be shown in the Device Editor.

• 32-bit general purpose timer uses four PSoC blocks
• Source clock rates up to 48 MHz
• Automatic reload of period on terminal count
• Capture for clocks up to 24 MHz.
• Terminal count output pulse may be used as input clock for other analog and digital functions
• Interrupt option on terminal count, capture (on some devices), or when counter reaches a preset value
   

The 32-bit Timer User Module provides a down counter with programmable period and capture ability. The clock and enable signals can be selected from any system time base or external source. Once started, the timer operates continuously and reloads its internal value from the period register upon reaching terminal count. The output pulses high in the clock cycle following terminal count. Events can capture the current Timer count value by asserting the edge-sensitive capture input signal. Each clock cycle, the Timer tests the count against the value of the compare register for either a “Less Than" or “Less Than or Equal To" condition. Interrupts may be generated based on terminal count and compare signals. Some device families offer two additional features. The interrupt options include “interrupt on capture" and, in addition, the compare signal may be routed onto the row buses. If these options are available on your chosen device they will be shown in the Device Editor.  

• 24-bit general purpose timer three PSoC blocks
• Source clock rates up to 48 MHz
• Automatic reload of period on terminal count
• Capture for clocks up to 24 MHz
• Terminal count output pulse may be used as input clock for other analog and digital functions
• Interrupt option on terminal count, capture (on some devices), or when counter reaches a preset value
   

The 24-bit Timer User Module provides a down counter with programmable period and capture ability. The clock and enable signals can be selected from any system time base or external source. Once started, the timer operates continuously and reloads its internal value from the period register upon reaching terminal count. The output pulses high in the clock cycle following terminal count. Events can capture the current Timer count value by asserting the edge-sensitive capture input signal. Each clock cycle, the Timer tests the count against the value of the compare register for either a “Less Than" or “Less Than or Equal To" condition. Interrupts may be generated based on terminal count and compare signals. Some device families offer two additional features. The interrupt options include “interrupt on capture" and, in addition, the compare signal may be routed onto the row buses. If these options are available on your chosen device they will be shown in the Device Editor.

Features and Overview

• Industry standard Philips I2C bus compatible interface
• Only two pins (SDA and SCL) required to interface several slave I2C devices
• Standard mode data supports rate of 100 kbps
• High level API requires minimal user programming
• Low level API provided for flexibility

The I2Cm User Module implements a master I2C device in firmware. The I2C bus is an industry standard,  two-wire interface developed by Philips®. An I2C bus master may communicate with several slave devices  using only two wires. The master initiates all communication on the I2C bus and supplies the clock for all slave devices. The I2Cm User Module supports speeds up to 100 kbps. No digital or analog user blocks  are consumed with this module. 

USB has long been the interface of choice between PCs and their peripherals. However, many legacy PCs still use an RS232 serial interface— in some cases referred to as a UART interface—to communicate with their peripherals.

Cypress’s USB-to-UART Bridge Controller enables seamless connectivity between USB and UART devices. It is a low-power, single-chip, plug-and-play solution that is easy to design and reuses existing application software and firmware—accelerating time to market.

Cypress includes an evaluation version of the 8051 Keil Software Tools in the Full Speed USB 2.0 development kit. The evaluation version of the C-Compiler lets the designer write 8051 microcontroller applications in C and still get the efficiency and speed of assembly language. Advanced features from Keil tools include the ability to single step through code. This makes it easy to detect errors, handle source level debugging, and set breakpoints. With the ability to debug code one line at a time and to quickly compile and one-step download new code, developers have a more efficient means to complete firmware faster than using emulators. The supplied Keil tools are fully functional, but are limited in object size to 4 kilobytes.

New! The new generation of the General Programmable Interface (GPIF) Tool is available. Download GPIF Designer now!

For part delails you can access the EZ-USB(R) Technical Reference Manual (TRM) at http://www.cypress.com/?rID=38232.

Hardware Description

The kit includes the following: 

• EZ-USB development board with CY7C64713-128AXC
• Peripheral board for prototyping
• USB cable
• An RS232 9-pin to 9-pin cable

(5) Using Scripting method.See application note on Downloading FX2LP/FX1 Firmware Using CyConsole Script Capabilities 

• Nlradio.asm
• Nlradio.h
• Nlradio.inc
• Nlspi.asm

This document describes the APIs exposed by the WUSB-NL driver.

The WUSB-NL radio driver is used in wireless mouse, keyboard, and bridge application software stacks. The WUSB-NL radio driver is modular and can be used as a library. The API exported by this module is explained in this document.

• Supports Serial Peripheral Interconnect (SPI) Slave protocol
• Supports protocol modes 0, 1, 2, and 3
• Selectable input sources for MOSI, SCLK, and ~SS
• Selectable output routing for MISO
• Programmable interrupt on SPI done condition
• SS may be firmware controlled

The SPIS User Module is a Serial Peripheral Interconnect Slave. It performs full duplex synchronous 8-bit data transfers. SCLK phase, SCLK polarity, and LSB First can be specified to accommodate most SPI protocols. The SPIS PSoC block has selectable routing for the input and output signals, and programmable interrupt driven control. Application Programming Interface (API) firmware provides a highlevel programming interface for either assembly or C application software.

• Implements CapSense® capacitive sensing in the CY8C20xx6A family of PSoC® devices using sigma-delta data conversion.
• Configurable system parameters allow tuning to optimize performance in a broad range of applications.
• Supports up to 36 capacitive sensors and 6 sliders.
• Capable of detecting touches as low as 0.1 pF, that is, detecting a finger is possible through up to 15 mm of glass or 5 mm of plastic.
• High immunity to AC mains noise, other EMI, and power supply noise.
• Supports capacitive sensors configured as independent buttons and/or as dependent arrays to form sliders.
• Effective number of slider elements can double the number of dedicated I/O pins using diplexing technique.
• Supports slider resolution greater than physical pitch through interpolation.
• Shield electrode provided for reliable operation with high parasitic capacitance and/or in the presence of water film.
• Guided sensor and pin assignments using the CSD Wizard.
• The CY8C20045 family does not support sliders.

• 6 to 14-bit resolution
• Optional synchronous 8-bit PWM output
• Optional differential Input
• Signed or unsigned data format
• Sample rate up to 15.6 ksps (6-bit resolution)
• Input range defined by internal and external reference options
• Internal or external clock
   

Note: If this user module is used with the 29K family, it consumes an extra 6 mA. As an alternative, use the ADCINCVR user module.

The ADCINC is a differential or single input ADC that returns a 6 to 14 bit result. The maximum DataClock frequency is 8 MHz, but 2 MHz is the maximum frequency recommended for improved linearity. This ADC may only be placed one time, due to its implementation which uses the hardware decimator rather than a digital block. This is the most resource efficient ADC. A 2nd order modulator may be implemented with an additional switch-capacitor block, allowing better linearity with an 8 MHz DataClock.

• Provides a global shadow register for a selected port data register
• Generates a set of macros for port pin manipulation
• Prevents corruption of GPIO pin settings during CPU control of GPIO
• Cooperates with other user modules that allocate shadow registers.
   

• 6-bit resolution with 32X oversampling to 14-bit resolution with 256X oversampling
• Data in unsigned or signed 2’s complement formats
• Maximum sample rates of 65,500 sps at 6 bit resolution, 7812 sps at 14-bit resolution
• Sinc² filter fully implemented in hardware reduces CPU overhead and anti-alias requirements
• 1st-Order or 2nd-Order modulator, user selectable
• Input range defined by internal and external reference options
• Optional synchronized PWM Output

The DelSig is an integrating converter, requiring from 32 to 256 integration cycles to generate a single output sample. Changing multiplexed inputs, invalidates the first two samples following the change.

Features and Overview

• 16-bit general purpose timer uses two PSoC blocks
• Source clock rates up to 48 MHz
• Automatic reload of period on terminal count
• Capture for clocks up to 24 MHz
• Terminal count output pulse may be used as input clock for other analog and digital functions
• Interrupt option on terminal count, capture (on some devices), or when counter reaches a preset value
   

The 16-bit Timer User Modules provides a down counter with programmable period and capture ability. The clock and enable signals can be selected from any system time base or external source. Once started, the timer operates continuously and reloads its internal value from the period register upon reaching terminal count. The output pulses high in the clock cycle following terminal count. Events can capture the current Timer count value by asserting the edge-sensitive capture input signal. Each clock cycle, the Timer tests the count against the value of the compare register for either a “Less Than" or “Less Than or Equal To" condition. Interrupts may be generated based on terminal count and compare signals. Some device families offer two additional features. The interrupt options include “interrupt on capture" and, in addition, the compare signal may be routed onto the row buses. If these options are available on your chosen device they will be shown in the Device Editor. 

• Flexible memory map
• Device reprogramming without engineering tools
• Product resident reprogramability
• Communication interface integrated to minimize code overhead
• Field deployment of firmware upgrades
• USB Full Speed device interface driver
• Support for interrupt and control transfer types
• Setup wizard for easy and accurate descriptor generation
• Runtime support for descriptor set selection
• Optional USB string descriptors
• Optional USB HID class support

• Flexible memory map
• Device reprogramming without engineering tools
• Product resident reprogramability
• Communication interface integrated to minimize code overhead
• Field deployment of firmware upgrades
• USB Full Speed device interface driver
• Support for interrupt and control transfer types
• Setup wizard for easy and accurate descriptor generation
• Runtime support for descriptor set selection
• Optional USB string descriptors
• Optional USB HID class support
• Optional USB-UART (CDC) class support

The USB Bootloader User Module implements a bootloader that can reprogram the PSoC device over the USB interface. The PSoC device already gives an in-system serial programming interface (ISSP) that allows downloading new code into the device. However, the bootloader allows a code update to occur through an industry standard communication interface, such as USB. This User Module can be useful for any device that has to be reprogrammed in the field. The bootloading information can be sent through a Cypress USB Bootloader Host interface.    

• Industry standard Philips I2C bus compatible interface.
• Enables you to reprogram a PSoC device using the I2C system bus instead of in-system programming pins.

The I2C Bootloader User Module implements a bootloader that can reprogram the PSoC device over the I2C interface. The PSoC device already gives an in-system serial programming interface (ISSP) that allows downloading new code into the device. However, the bootloader allows a code update to occur through an industry standard communication interface, such as I2C.

• The 8-bit general purpose counter uses one PSoC block
• Source clock rates up to 48 MHz
• Automatic reload of period on terminal count
• Programmable pulse width
• Input enables/disables continuous counter operation
• Interrupt option on compare output or terminal count
   

The 8-Bit Counter User Module provides a down counter with a programmable period and pulse width. The clock and enable signals can be selected from any system time base or external source. Once started, the counter operates continuously and reloads its internal value from the period register upon reaching terminal count. During each clock cycle, the counter compares the current count to the value stored in the compare register. Each clock cycle, the Counter tests the count against the value of the compare register for either a “less than" or “less than or equal to" condition. The comparator output provides a logic level that may be routed to pins and to other user modules. Most PSoC device families also permit the terminal count output to be routed in the same manner.

• Does not require digital blocks
• Selectable 8, 16, or 32-bit tick counter
• Three types of timer functions.

The SleepTimer User Module provides basic timing functions without the use of valuable digital blocks. This user modules makes use of the standard sleep timer to create a variety of timing functions that are often useful in a project.

• 16-bit general purpose pulse width modulator uses two PSoC blocks
• Source clock rates up to 48 MHz
• Automatic reload of period for each pulse cycle
• Programmable pulse width
• Input enables/disables continuous counter operation
• Interrupt option on rising edge of the output or terminal count
   

The 16-bit PWM User Module is a pulse width modulator with programmable period and pulse width. The clock and enable signals can be selected from several sources. The output signal can be routed to a pin or to one of the global output buses, for internal use by other user modules. An interrupt can be programmed to trigger on the rising edge of the output or when the counter reaches the terminal count condition.   

• 8 -bit general purpose pulse width modulator uses one PSoC block
• Source clock rates up to 48 MHz
• Automatic reload of period for each pulse cycle
• Programmable pulse width
• Input enables/disables continuous counter operation
• Interrupt option on rising edge of the output or terminal count
   

The 8-bit PWM User Module is a pulse width modulator with programmable period and pulse width. The clock and enable signals can be selected from several sources. The output signal can be routed to a pin or to one of the global output buses, for internal use by other user modules. An interrupt can be programmed to trigger on the rising edge of the output or when the counter reaches the terminal count condition.

Features and Overview

• The USBUART Device uses a USB interface to emulate a COM port.
• UART-like high level functions are available on the PSoC device side.
   

Functional Description

Many embedded applications use the RS-232 interface to communicate with external systems such as PCs, especially when debugging. But in the PC world, the RS-232 COM port will soon disappear from most new computers, leaving USB as the replacement for serial communication. The simplest way to migrate a device to USB is to emulate RS-232 over the USB bus. The primary advantage of this method is that PC applications use the USB connection as an RS-232 COM connection, making it very simple to debug. This method uses a standard Windows® driver that is included with all versions Microsoft® Windows from Windows 98SE through Windows XP.

• USB Full Speed device interface driver
• Support for interrupt and control transfer types
• Setup wizard for easy and accurate descriptor generation
• Runtime support for descriptor set selection
• Optional USB string descriptors
• Optional USB HID class support
   

• Industry standard Philips I²C-bus compatible interface (version 2.1)
• Only two pins (SDA and SCL) required to interface several slave I²C devices
• Standard mode data supports rate of 100 kbits/s
• High level API requires minimal user programming
• Low level API provided for flexibility

• Uses the industry standard Hitachi HD44780 LCD display driver chip protocol
• Requires only seven I/O pins
• Routines provided to print RAM or ROM strings
• Routines provided to print numbers
• Routines provided to display horizontal and vertical bar graphs
• Uses a single I/O port
   

The Character LCD User Module is a set of library routines that writes text strings and formatted numbers to a common two- or four-line LCD module. Vertical and horizontal bar graphs are supported, using the character graphics feature of these LCD modules. This module was developed specifically for the industry standard Hitachi HD44780 two-line by 16 character LCD display driver chip, but will work for many other four-line displays. This library uses the 4-bit interface mode to limit the number of I/O pins required.

• Supports Serial Peripheral Interconnect (SPI) Master protocol.
• Supports SPI clocking modes 0, 1, 2, and 3.
• Selectable input sources for clock and MISO.
• Selectable output routing for MOSI and SCLK.
• Programmable interrupt on SPI done condition.
• SPI Slave devices are independently selected.
   

The SPIM User Module is a Serial Peripheral Interconnect Master. It performs full duplex synchronous 8- bit data transfers. SCLK phase, SCLK polarity, and LSB First are available to accommodate most SPI clocking modes. Controlled by user supplied software, the slave select signal is able to control one or more SPI Slave devices. The SPIM PSoC block has selectable routing for the input and output signals and programmable interrupt driven control.

• Supports Serial Peripheral Interconnect (SPI) slave protocol.
• Supports protocol modes 0, 1, 2, and 3.
• Selectable input sources for MOSI, SCLK, and ~SS.
• Selectable output routing for MISO.
• Programmable interrupt on SPI done condition.
• SS may be firmware controlled.
   

The SPIS User Module is a Serial Peripheral Interconnect Slave (SPIS). It performs full duplex synchronous 8 bit data transfers. You can specify SCLK phase, SCLK polarity, and LSB First to accommodate most SPI protocols. The SPIS PSoC block has selectable routing for the input and output signals and programmable interrupt driven control. Application Programming Interface (API) firmware provides a high level programming interface for either assembly or C application software.

• Industry standard Philips I2C bus compatible interface
• Emulates common I2C EEPROM interface
• Only two pins (SDA and SCL) required to interface to I2C bus
• Standard data rate of 100/400 kbps
• High level API requires minimal user programming
   

The EzI2Cs user module implements an I2C register-based slave device. The I2C bus is an industry standard, two wire hardware interface developed by Philips® (now NXP).The master initiates all communication on the I2C bus and supplies the clock for all slave devices. The EzI2Cs user module supports the standard mode with speeds up to 400 kbps. No digital or analog PSoC blocks are consumed with this module. The EzI2Cs user module is compatible with multiple devices on the same bus.

• 8 to 10-bit resolution
• Sample rate up to 11.71 ksps (10-bit resolution)
• Sample rate up to 46.875 ksps (8-bit resolution)
• Input range up to reference voltage
• Internal clock divider
   

The ADCINC User Module is part of the System Performance Controller (SPC). SPC is a modular system for product performance compensation over process, voltage, and temperature variations. The system is based on the M8C microcontroller. The heart of the SPC is the microcontroller core, temperature sensor, and the SPC system bus.
 

• Industry standard Philips I2C bus compatible interface
• Slave only operation
• Only two pins (SDA and SCL) required to interface to I2C bus
• Standard data rate of 100/400 kbits/s, also supports 50 kbits/s
• High level API requires minimal user programming
• 7-bit addressing mode
   

The I2C Hardware User Module implements an I2C Slave device in firmware. The I2C bus is an industry standard, two wire hardware interface developed by Philips®. The master initiates all communication on the I2C bus and supplies the clock for all slave devices. The I2CHW User Module supports the standard mode with speeds up to 400 kbits/s and is compatible with other slave devices on the same bus.

• Full byte-oriented EEPROM emulation
• Abstracts block-oriented flash architecture
• Efficient use of memory

• PID and VID
• Manufacturer string descriptor
• Product string descriptor
• Power source (self/bus)
• Remote wakeup
• Power consumption
   

The configuration parameters are stored in the internal EEPROM of CY7C64225. This eliminates the need for an external memory component for configuration. An illustration of how to use the configuration utility is in the product user guide available for download at
http://www.cypress.com/?id=4143&rtID=108.

 

• For self-powered devices, connect the VBUS pin to the upstream USB supply pin with a 1 kΩ resistor in series.
• Because bus-powered designs power down when unplugged from the USB port, they do not require the monitoring of the upstream VBUS. Therefore, connect the VBUS pin to logic high (or upstream USB supply) through a 1 kΩ resistor.
   

• 8 data bits
• 1 stop bit
• No parity
   

1. Launch zterm. Select Settings > Connection.
2. Update all the connection settings, such as baudrate, data bits, parity and so on of the host application (zterm) to be consistent with the device configuration.
3. Select Settings > Modem Preferences, and then select usbmodem*
   * is a wildcard to represent the device instance.

1. Open Minicom on a terminal.
2. Press Ctrl-A and then Z in the menu that opens up.
3. Press 'O' to configure Minicom.
4. In the Configuration window, select Serial Port Setup.
5. Press ‘A’ and then type ‘dev/ttyACM*’ to select the Serial Device.
   * is a wildcard to represent the number of the device node.
6. Press ‘E’ to configure the Baud Rate in same window.
7. Press Esc to leave the active window and Select ‘save set up as’ in the previous window and exit Minicom.

1. Open menu config of your kernel source.
2. Go to Device Driver > USB Support > USB modem (CDC ACM) support. Select the module as shown in the figure.
   
   
    
3. Rebuild the kernel and reboot the Android device.
4. Connect the Cypress USB to UART bridge controller to the Android device. Verify that the ttyACM* node is created in the /dev directory of Android device.
   * is a wildcard to represent the number of the device node. If a node exists, the CDC-ACM driver is successfully bound to the Cypress USB to UART device.
    

By default, Android does not provide any application to emulate USB-Serial devices. For hosts running Microcom (terminal emulation program) on Android, you can use the following procedure below to communicate with the CY7C64225 and stream data:
 

1. Download busybox from http://www.busybox.net/downloads/binaries/latest/ For an ARM based platform, select busybox-ARMv6l.
2. Copy the binary to /system/bin of rootfs.
3. Boot Android and get root access for the command shell.
4. Run the following command in terminal:
   cd /system/bin and run ./busybox-armv6l microcom -s 115200 /dev/ttyACM0

• Supports Serial Peripheral Interconnect (SPI) Master protocol
• Supports SPI clocking modes 0, 1, 2, and 3
• Selectable input sources for clock and MISO
• Selectable output routing for MOSI and SCLK
• Programmable interrupt on SPI-done condition
• SPI Slave devices can be independently selected

• Scan 1 to 36 capacitive sensors.
• Sensing possible with up to a 15 mm glass overlay.
• Proximity detection to 20 cm with a wire-based sensor.
• High immunity to AC mains noise, EMC noise, and power supply voltage changes.
• Supports different combinations of independent and slide capacitive sensors.
• Double slide sensor physical resolution using diplexing.
• Increase slide sensor resolution using interpolation.
• Touchpad support with two slide sensors.
• Sensing support through high resistive conductive materials (ITO films for example).
• Shield electrode support for reliable operation in the presence of water film or droplets.
• Guided sensor and pin assignments using the CSD Wizard.
• Integrated baseline update algorithm for handling temperature, humidity, and electrostatic discharge (ESD) events.
• Easily adjustable operational parameters.
• PC GUI application support for raw data monitoring and parameter optimization in real-time.
   

The CSD (Capacitive Sensing using a Sigma-Delta Modulator) provides capacitance sensing using the switched capacitor technique with a sigma-delta modulator to convert the sensing switched capacitor current to digital code. 

• Programmable threshold and reference
• Direct connection to digital PSoC block and interrupt
• Programmable speed and power

• 7/8-bit software serial transmitter
• Data framing consists of start, optional parity, and one or two stop bits
• RS-232 serial-data compatible format with optional parity
   

The TX8SW User Module is an 7- or 8-bit RS-232 data-format compliant serial transmitter. The data transmitted is framed with a leading start bit and a final one or two stop bits. Transmitter firmware is used to start and stop device and control transmission of complex structures like strings, HEX value representations, and so on.

• Asynchronous receiver and transmitter
• Data-format compliant with RS-232 serial-data format
• Burst rates up to 6 Mbits/second
• Data framing consists of start, optional parity, and stop bits
• Optional interrupt on receive register full and/or transmit buffer empty
• Parity, overrun, and framing error detection
• High level transmit and receive functions
   

The UART User Module is an 8-bit Universal Asynchronous Receiver Transmitter that supports duplex RS-232-compliant, data format serial communications over two wires. Received and transmitted data format includes a start bit, optional parity, and a stop bit. Programmable clocking and selectable interrupt or polling style operation is supported. Application Programming Interface (API) firmware routines are provided to initialize, configure, and operate the UART. An additional high level API is also given to support background command receiving and string printing.
 

• AutoTuning algorithms optimize the operational parameters at runtime based on the parasitic capacitance of each sensor.
• Scans 1 to 36 capacitive sensors.
• Capable of detecting 0.1 pF touch with parasitic sensor capacitance (Cp) up to 50 pF as long as layout guidelines of are followed.
• Sensing possible through up to a 15 mm glass overlay.
• High immunity to AC mains noise, other EMI, and power supply voltage changes.
• Supports capacitive sensors configured as independent buttons, proximity sensors and/or as dependent arrays to form sliders. Sliders and proximity sensors not fully supported in this beta version.
• Effective number of slider elements can double the number of dedicated IO pins using diplexing technique.
• Supports slider resolution greater than physical pitch through interpolation.
• Touchpads can be implemented as pairs of interwoven orthogonal sliders.
• Shield electrode provides for reliable operation with high parasitic capacitance and/or in the presence of water film.
• Guided sensor and pin assignments using the CSDAUTO Wizard.
• PC GUI application support for raw data monitoring in real-time.
   

The CSDAUTO (Autotuning CapSense® using a Sigma-Delta Modulator) User Module provides capacitance sensing using the switched capacitor technique with a sigma-delta modulator to convert the sensor capacitance into digital code.

Features

• Single Chip Integrated USB Transceiver, SIE, and Enhanced 8051 Microprocessor
• Fit, Form, and Function Upgradable to the FX2LP (CY7C68013A)
  • Pin compatible
  • Object code compatible
  • Functionally compatible (FX1 functionality is a Subset of the FX2LP)
• Draws No More than 65 mA in Any Mode, Making the FX1 Suitable for Bus Powered Applications
• Software: 8051 Runs from Internal RAM, which is:
  • Downloaded using USB
  • Loaded from EEPROM
  • External memory device (128 pin configuration only)
• For more, see pdf
   

Functional Description

EZ-USB FX1™ (CY7C64713) is a full speed, highly integrated, USB microcontroller. By integrating the USB transceiver, Serial Interface Engine (SIE), enhanced 8051 microcontroller, and a programmable peripheral interface in a single chip, Cypress has created a very cost effective solution that provides superior time-to-market advantages.

Features

• Powerful Harvard-architecture processor
• Advanced peripherals (enCoRe™ III blocks)
• Complex peripherals by combining blocks
• Full-speed USB (12 Mbps)
• Flexible on-chip memory
• Programmable pin configurations
• Precision, programmable clocking
• Additional system resources
• Complete development tools
• For more, see pdf
   

enCoRe III Functional Overview

The enCoRe III is based on the flexible PSoC architecture and is a full-featured, full-speed (12-Mbps) USB part. Configurable analog, digital, and interconnect circuitry enable a high level of integration in a host of consumer, and communication applications.

This architecture enables the user to create customized peripheral configurations that match the requirements of each individual application. Additionally, a fast CPU, flash program memory, SRAM data memory, and configurable I/O are included in both 28-pin SSOP and 56-pin QFN packages.

Features

• Full-speed USB Microcontroller
• 8-bit USB Optimized Microcontroller
  • Harvard architecture
  • 6-MHz external clock source
  • 12-MHz internal CPU clock
  • 48-MHz internal clock
• Internal memory
  • 256 bytes of RAM
  • 8 KB of PROM (CY7C64013C, CY7C64113C)
• For more, see pdf
   

Functional Overview

The CY7C64013C and CY7C64113C are 8-bit One Time Programmable microcontrollers that are designed for full-speed USB applications. The instruction set has been optimized specifically for USB operations, although the microcontrollers can be used for a variety of non-USB embedded applications.

Application Note "AN52970 - Windows Hardware Quality Labs (WHQL) Signing Procedure for Customer Modified Cypress USB Driver Files" not available now.

Please review knowledge base article in this link to learn about "Windows Hardware Certification Process for Customer Modified Cypress USB Driver Files".

Driver Signing for Windows Hardware Certification

A complete beginning-to-end walkthrough of how to digitally sign drivers is provided by Microsoft and is available at http://www.microsoft.com/whdc/winlogo/drvsign/kmcs_walkthrough.mspx

FAQs

Question 1: I get the following error while binding my device to CyUSB.sys in Windows 7/Vista 64-bit environment, “Windows encountered a problem installing the driver software for your device” or usage of CyUSB.sys in Vista 64-bit operating system gives Code 39 error (Code 52 in the case of Windows 7). What do these errors mean? How can they be resolved?

Answer: CyUSB.sys downloaded through our website is an unsigned driver. This error reported while an unsigned driver used in 64-bit operating systems in normal mode. Following are the steps to disable driver signature enforcement in 64-bit operating system:

a) During boot-up press F8.

b) In the list of options that appear select “Disable driver signature enforcement”.

This should resolve the issues.

Note: In the case of Windows Vista 64-bit operating system the error message is “Windows cannot load the device driver for this hardware. The driver may be corrupted or missing. (Code 39)”. In the case of Windows 7 64-bit operating system it is "Windows cannot verify the digital signature for the drivers required for this device. A recent hardware or software change might have installed a file that is signed incorrectly or damaged, or that might be malicious software from an unknown source. (Code 52)".

Question 2: What is the signing procedure when script files are used?

Answer:When script files are used, the Inf file should contain both VID/PID combinations while signing the driver. The procedure for signing the procedure is the same as that for regular drivers. The script file (.spt file) will need to be shipped along with the Inf/Sys files.

In-Circuit Emulation (ICE) Pod Kit for Debugging 32-pin QFN enCoRe V (CY7C64343/45) Devices

• One (1) 64345Q Pod
• One (1) Flexcable
• Two (2) 32QFN Feet

• One (1) 60445Q Pod
• One (1) Flexcable
• Two (2) 32QFN Feet

Hardware Description:

The CY3250-60445QFN emulation POD is designed to work with the PSoC ICE Cube (In-Circuit Emulator), which can be purchased separately as a part of the CY3215-DK kit available from the Cypress Online Store at www.cypress.com.

• Two (2) 64315Q Pod

Hardware Description:

The ICE pod provides the interconnection between the CY3215-DK In-Circuit Emulator via a flex cable and the target device in a prototype system or PCB via device-specific pod feet. Pod feet sold separately.

• Two (2) 64345Q Pod

• Two (2) 60445Q Pod

Hardware Description:

The ICE pod provides the interconnection between the CY3215-DK In-Circuit Emulator via a flex cable and the target device in a prototype system or PCB via device-specific pod feet. Pod feet sold separately.

• One (1) 64315Q Pod
• One (1) Flexcable
• Two (2) 16QFN Feet

Hardware Description:

The CY3250-64315QFN emulation POD is designed to work with the PSoC ICE Cube (In-Circuit Emulator), which can be purchased separately as a part of the CY3215-DK kit available from the Cypress Online Store at www.cypress.com.

ICE Debugging Support for QFN CY8C23x33 PSoC Devices in a Prototype System or PCB

CY3250-23x33QFN Kit Contents:
 

• One (1) QFN CY8C23533 ICE Pod
• One (1) Flex Cable
• Two 32-pin QFN Pod Feet

Replacement In-Circuit Emulation (ICE) Pods (2) for Debugging 48-pin QFN CY7C60455/56 Device




CY3250-60455QFN-POD Kit Contents:

• Two (2) 60455Q Pod
   

Hardware Description:

The ICE pod provides the interconnection between the CY3215-DK In-Circuit Emulator via a flex cable and the target device in a prototype system or PCB via device-specific pod feet. Pod feet sold separately.

• Two (2) 64355Q Pod
   

Hardware Description:

The ICE pod provides the interconnection between the CY3215-DK In-Circuit Emulator via a flex cable and the target device in a prototype system or PCB via device-specific pod feet. Pod feet sold separately.

For installation instructions, please read the readme file after executing the self-extracting, executable file (bc_3e.exe).

Bitcalc requires a PC running MS Windows 3.1x, Windows 95/98, or Windows NT. Note: The current version of Bitcalc is Bitcalc3, which was released in May, 1996. Cypress has since developed several new frequency synthesizers that are not supported by Bitcalc.

Following is the list of Kits tested and their respective web links

1. CY3655-EXT :Encore-II Development Kit

             weblink: www.cypress.com/go/cy3655-ext

Download CY3655-EXT_Firmware_PSOC_Designer_5_2.zip

2. CY3631 :Wireless Manufacturing Test Kit

             weblink: www.cypress.com/go/cy3631

Download CY3631_WirelessUSB_MTK_Firmware_PSOC_Designer_5_2.zip

3. CY4623:EncoreII Mouse Reference Design

             weblink: www.cypress.com/go/cy4623

Download CY4623_RDK_Firmware_PD_5_2.zip

4. CY4672:PROC Lp Keyboard/Mouse Reference Design

             weblink: www.cypress.com/go/cy4672

Download CY4672_Firmware_Examples_PSOC_Designer_5_2.zip

5.CY4638:VOIP Demo kit

             weblink: www.cypress.com/go/cy4638

Download CY4638_Firmware_Examples_PSOC_Designer_5_2.zip

6.CY3660:Encore V LV Development Kit

             weblink: www.cypress.com/go/cy3660

Download CY3660_Firmware_Examples_PSOC_Designer_5_2.zip

Note:Please download and install PSOC designer 5.2 prior to testing the firmware examples.The weblink to PSoC designer is mentioned on above listed Kit weblinks.