Cypress.com: Documentation

USB 3.0: Super Speed

Wed, 13 Feb 2013 06:59:27 -0600

USB - Known Problems and Solutions

Tue, 12 Feb 2013 21:54:02 -0600

AN85514 - Designing a USB-to-RS232 Solution Using Cypress's Bridge Controller

Fri, 08 Feb 2013 05:37:07 -0600

Introduction

USB has long been the interface of choice between PCs and their peripherals. However, many legacy PCs still use an RS232 serial interface— in some cases referred to as a UART interface—to communicate with their peripherals.

Cypress’s USB-to-UART Bridge Controller enables seamless connectivity between USB and UART devices. It is a low-power, single-chip, plug-and-play solution that is easy to design and reuses existing application software and firmware—accelerating time to market.

AN78446 - Interrupt Handling in EZ-USB® FX2LP™

Fri, 08 Feb 2013 05:36:44 -0600

Introduction

EZ-USB® FX2LP™ incorporates 13 interrupt sources in its interrupt architecture, five standard 8051 interrupts and eight additional EZ-USB interrupts.

Standard 8051 Interrupts:

IE0(INT0): External Interrupt0
IE1(INT1): External Interrupt1
RI_0 & TI_0: USART1 Interrupt
TF0: Timer0 Overflow
TF1: Timer1 Overflow

Additional EZ-USB interrupts:

TF2: Timer2 Overflow
PF1: Wake up pin(WU2)
RI_1 & TI_1: UART 1 Transmit and receive
USBINT(INT2): USB specific Interrupt
I2CINT(INT3): I2C Bus Interrupt
IE4(INT4): External Interrupt 4
IE5(INT5): External Interrupt 5
IE6(INT6): External Interrupt 6

For more, see pdf.

CY3236A-PIRMOTION - Pyroelectric Infrared (PIR) Motion Detection Evaluation Kit (EVK)

Thu, 07 Feb 2013 04:29:23 -0600

CY3236A-PIRMOTION Rev. A Kit Contents:

PIR Motion Sensor Board using CY8C27443-24PVXI PSoC(R) device
12V Power Supply
PSoC Designer(TM) and PSoC Programmer CD
Design Files CD (Schematic, BOM, Gerber Files, PSoC Designer Example Project)

Hardware Description

The CY3236A-PIRMOTION EVK allows you to evaluate Cypress' PSoC (Programmable System-on-Chip(TM)) device's ability to control a Pyroelectric Infrared (PIR) sensor to implement motion sensing applications such as automatic lighting controls, automatic door openers, security systems, kiosk wakeup and activating wireless cameras.

The human body radiates a certain amount of infrared light in the realm of about 10 micrometers at normal body temperature. PIR sensing captures this radiated light, filters the analog signals, converts those signals to digital and then uses the digital signals to control hardware depending on the application -- turning on a light, opening or unlocking a door, enabling or activating a security alarm, waking up a kiosk or ATM machine, activating a wireless camera, etc.

The CY3236A-PIRMOTION EVK includes all of the software, hardware, example projects and documentation you need to implement all of these PIR sensing control functions in one flexible and powerful PSoC device, the CY8C27443.

AN70707 - EZ-USB® FX3™/FX3S™ Hardware Design Guidelines and Schematic Checklist

Thu, 07 Feb 2013 01:32:13 -0600

The Cypress EZ-USB FX3 is the next generation USB 3.0 peripheral controller. With its highly integrated and flexible features, developers can add USB 3.0 functionality to any system. All recommendations apply to FX3 and FX3S, unless specifically mentioned otherwise.

Introduction

Cypress's EZ-USB® FX3 is the next-generation USB 3.0 peripheral controller, providing integrated and flexible features. FX3 has a fully configurable, parallel, general programmable interface called GPIF II, which can connect to any processor, ASIC, or FPGA. It provides easy and glue less connectivity to popular interfaces, such as asynchronous SRAM, asynchronous and synchronous address data multiplexed interfaces, and parallel ATA. FX3 has an embedded 32-bit ARM926EJ-S microprocessor for powerful data processing and for building custom applications. It implements an architecture that enables 375-MBps data transfer from GPIF II to the USB interface.

Cypress Semiconductor Leadtime Guide

Wed, 06 Feb 2013 22:01:35 -0600

CY3668 WirelessUSB NL Development Kit

Tue, 05 Feb 2013 23:50:00 -0600

Overview

CYRF8935 WirelessUSB NL is Cypress’s third generation of 2.4 GHz low-power RF technology, bringing next level of low-power performance into a small 4 mm x 4 mm footprint. WirelessUSB NL implements a GFSK radio using a differentiated single-mixer, closed-loop modulation design that optimizes power ef_ciency and interference immunity. This also translates into the highest on-air throughput which makes WirelessUSB NL particularly powerful for streaming applications such as audio, along with HID applications such as wireless keyboards, mice and USB dongles.

The CY3668 WirelessUSB NL development kit provides a generic platform for developing wireless applications based on the WirelessUSB NL, enCoRe II and enCoRe V devices. The out-of-box examples that come with this kit also demonstrates the new enhanced agile HID protocol for secure and reliable wireless data transfers.

Kit Contents:

CY3668 bridge/keyboard development boards (2)
NL modules (2)
CY3668- enCoRe II module (1)
CY3668-enCoRe V modules (2)
3.3-V LCD (2)
Power adaptor (2)
Quick Start Guide
Resource CD which includes, PSoC Designer, PSoC Programmer, Projects and documentation.

Software Title	Description	Link
PSoC Designer	This kit requires PSoC Designer for development
PSoC Programmer	This kit requires PSoC Programmer for programming

AN75779 - Interfacing an Image Sensor to EZ-USB® FX3™ in a USB video class (UVC) Framework

Tue, 05 Feb 2013 23:42:48 -0600

Introduction

EZ-USB® FX3™ is the USB 3.0 peripheral controller that enables developers to add USB 3.0 device functionality to any system. FX3 has a fully configurable General Programmable Interface (GPIF™ II), which can interface with virtually any processor, ASIC, image sensor or FPGA. UVC is a USB standard class that allows a video streaming device to be connected to a USB host to stream video like a webcam using standard UVC driver. This application note discusses how to design an application, which is compatible with UVC, by interfacing FX3 and an image sensor with an interface that has the following signals: frame valid, line valid, pixel clock, and 8bit to 32bit parallel data bus.

AN76405 - EZ-USB® FX3 Boot Options

Tue, 05 Feb 2013 23:34:42 -0600

Introduction

EZ-USB® FX3 is the next generation USB 3.0 peripheral controller, providing highly integrated and flexible features that enable developers to add USB 3.0 functionality to a wide range of applications.

FX3 supports several boot options including booting over I2C, SPI, USB, Synchronous ADMux and Asynchronous SRAM interfaces. This application note describes the details of the different booting options for FX3.

The default state of the FX3 IOs during boot are also documented. The Appendix describes the step-wise sequence for testing the different boot modes using the FX3 DVK.

AN77960 - Introduction to EZ-USB® FX3™ High-Speed USB Host Controller

Tue, 05 Feb 2013 23:33:39 -0600

A hands-on USB host example in this document can help developers create applications for FX3’s high-speed USB host controller.

Introduction

USB is so commonplace that it has almost completely replaced other communication methods between peripheral devices and a PC. This holds true both for general-purpose devices, such as flash drives and mice, and special-purpose devices for specific applications. According to the standard USB 2.0 specification, USB peripherals do not communicate directly with one another; they may communicate only with a USB host, which fully controls data traffic on the bus. The Cypress EZ-USB FX3 with integrated high-speed USB host controller, along with the USB function and On-The-Go (OTG) capabilities accomplishes two things: It retains the device functions and allows embedded systems to act as a USB host.

USB Hosts, Hubs, Transceivers

Tue, 05 Feb 2013 05:37:48 -0600

Reset Problems When Re-programming the 24LC64 EEPROM on the FX2 - KBA83436

Thu, 31 Jan 2013 23:31:35 -0600

Answer: The reason is that this utility defaults to a 0xB2 load (for example, it writes the first byte as 0xB2 in the EEPROM), which is for the older EZ-USB chips. To avoid this error, follow these steps:

In the µVision2 Editor, click ‘Options for Target’ and then select the ‘Output’ Tab. Ensure that the following path is described in the ‘ Run User Program #1’:

..\..\..\Bin\hex2bix -i -f 0xC2 -o fw.iic fw.hex
If at power-on-reset, the EZ-USB detects an EEPROM connected to its I2C with the value 0xC2 at address zero, the EZ-USB loads the firmware in EEPROM into an on-chip RAM. It also sets the RENUM bit to ‘1’, causing standard device requests to be handled by the firmware instead of the default USB device.

Design modularity: the fool-proof way to maintain market leadership in the mobile handset arena

Thu, 31 Jan 2013 01:15:05 -0600

Mobile handset has become the most dominant portable consumer electronics of all time, with worldwide shipments of 990 million units in 2006 and exceeding 1.1 billion units in 2007 (iSuppli). The double-digit year-on-year compounded growth rate is expected to continue for the next few years, as many developing countries are quickly ramping up on wireless infrastructures to meet the booming wireless communications demand. For many developed countries, it is also not uncommon to see individuals carrying multiple handsets; typically one for personal use and another dedicated for business. Forward looking, mobile handset OEMs and ODMs will be constantly challenged to stay competitive, and their most challenging task is to attract new adopters as well as to retain brand loyalty among current users. Having periodic product releases that keep consumers freshly engaged is the key to success in this fast-paced industry, while shortening the product design cycle and releasing products with innovative features are proven to be the two most effective ways to capture a bigger piece of the pie. This article explores the modular architecture approach to mobile handset design that enables both faster time to market and better features support that will lead mobile handset vendors to a successful future. To read more, click the download link above or visit Wireless Design and Development.

USB 3.0 - The Next-Generation Interconnect

Thu, 31 Jan 2013 01:12:25 -0600

When was the last time you got impatient with technology not being fast enough? Here is a situation: your flight from San Francisco to New York takes off in 3 hours and you are ready to head to the airport, but you really want to catch up with the all new season of your favorite series “House” which you missed. A friend just sent you a message on Facebook about how much he enjoyed a blockbuster movie he watched last night and you wish you could watch it on the long flight you are about to get on. If I were you, I would be wondering “if only I had the time to simply get all the content I need right now”. Today, it would take about 14 minutes to transfer an HD movie of 25GB and almost 9 minutes to transfer a TV Show of 16GB from a PC to your handheld media device. Thankfully, technological innovations are happening at a pace that enables users to get the content they want a lot faster. One such evolution is that of the most universal and ubiquitous interface – USB. USB 3.0 SuperSpeed is here and promises to be the panacea to such situations. To read more, click the download link below or visit: Electronic Design.

USB On-The-Go Specification Adds Muscle To Portable Devices

Thu, 31 Jan 2013 00:59:08 -0600

Electronic Design (USA)

Reprinted with permission from Electronic Design,
June 10, 2002. Copyright 2002, Penton Media Inc.
611 Route 46 West, Hasbrouck Heights, NJ 07604, USA

Read the article here.

For more information on our USB Embedded Hosts products, visit: cypress.com

USB High-Speed Peripherals

Wed, 30 Jan 2013 02:58:57 -0600

USB Full-Speed Peripherals

Mon, 21 Jan 2013 18:31:47 -0600

AN47994 - Interfacing TI OMAPV1030 Processor to Cypress West Bridge® Antioch™

Mon, 21 Jan 2013 08:08:05 -0600

Cypress West Bridge® Antioch™ device provides high speed USB peripheral and mass storage control capabilities to the system processor through its host processor port. This application note presents a system example of interfacing a TI OMAPV1030 baseband processor to an Antioch device, using Antioch’s Pseudo-CRAM processor-port (P-port) interface.

Product Selector Guide (PSG) - USB Controllers

Mon, 21 Jan 2013 03:36:40 -0600

Cypress USB Solutions:

USB Hi-Speed Peripherals
USB Hubs
USB Low-Speed Peripherals
USB Full-Speed Peripherals
MoBL-USB
USB Embedded Hosts
WirelessUSB™

AN61345 - Implementing an FX2LP™- FPGA Interface

Fri, 18 Jan 2013 06:36:41 -0600

The interface, described in a sample implementation, adds High-Speed USB connectivity to applications such as data acquisition, industrial control and monitoring, and image processing. The Project provided with this Application Note is implemented and tested with Xilinx Virtex 5 and Spartan 3E FPGAs.

An FX2LP™-FPGA interface is implemented to add High-Speed USB connectivity for FPGA based applications, such as data acquisition, industrial control and monitoring, and image processing. The FX2LP acts in Slave-FIFO mode and the FPGA acts as the master. This Application Note also gives a sample FX2LP firmware for Slave-FIFO implementation and a sample VHDL and Verilog project for FPGA implementation.

Astoria Software Development Kit

Fri, 18 Jan 2013 06:33:12 -0600

The Astoria SDK provides firmware sources that provide support for,

Stand-alone SD/MMC/CEATA firmware flexible enough to add custom functions
Drivers to initialize and read/write data on SD/MMC/SDIO/CEATA devices.
USB 2.0 compliant mass storage drivers to access SD/MMC/CEATA storage devices.
A software protocol that allows drivers running on external processor to:
a. Initialize the Astoria device in the appropriate mode
b. Configure and control the USB functionality of the Astoria device.
c. Access SD/MMC/SDIO/CEATA devices connected to Astoria.

Antioch Software Development Kit

Fri, 18 Jan 2013 06:32:38 -0600

The Antioch SDK provides firmware binaries that provide support for

Stand-alone SD/MMC/NAND firmware
Drivers to initialize and read/write data on SD/MMC/NAND devices.
USB 2.0 compliant mass storage drivers to access SD/MMC/NAND storage devices.
A software protocol that allows drivers running on external processor to:
      a. Initialize the Antioch device in the appropriate mode.
      b. Configure and control the USB functionality of the Antioch device.
      c. Access SD/MMC/NAND devices connected to Antioch.

HX2VL (CY7C65632/34/42) - IBIS

Fri, 18 Jan 2013 06:31:14 -0600

This is the IBIS model of HX2VL (CY7C65632/34/42)

CY3687 MoBL-USB FX2LP18 Development Kit

Fri, 18 Jan 2013 06:29:14 -0600

The development kits for the MoBL-USB FX2LP18(TM) family provide complete hardware and software solutions for accelerating the firmware and device driver development for all the products in the family. The development kits use the actual silicon for the entire development. Cypress's software utilities and example firmware allow the user to generate USB traffic in hours, not weeks!

Cypress includes an evaluation version of the 8051 Keil Software Tools in the USB 2.0 development kit. The evaluation version of the C-Compiler lets the designer write 8051 microcontroller applications in C and still get the efficiency and speed of assembly language. Advanced features from Keil tools include the ability to single step through code. This makes it easy to detect errors, handle source level debugging, and set breakpoints. With the ability to debug code one line at a time and to quickly compile and one-step download new code, developers have a more efficient means to complete firmware faster than using emulators. The supplied Keil tools are fully functional, but are limited in object size to 4 kilobytes.

New! The new generation of the General Programmable Interface (GPIF) Tool is available. Download GPIF Designer now!

Hardware Description

The kit includes the following: MoBL-USB development board with CY7C68053-56BAXC, peripheral board for prototyping, USB cable, and an RS232 9-pin to 9-pin cable.

For part details you can access the MoBL-USB(R) FX2LP18 Technical Reference Manual (TRM) at:
http://www.cypress.com/?rID=14666

EZ-USB® FX3™ HD 720p Camera Kit

Fri, 18 Jan 2013 00:57:02 -0600

Features

Aptina 720p image sensor, 30 fps, 24-bit color
Full FX3 firmware implementation of USB video class
Highly configurable GPIF™ II interface
ARM9 sets up transfer, video runs over DMA
Boards and schematics available (Aptina NDA required)

Kit Contents

CYUSB3KIT-001, EZ-USB® FX3™ Development Kit
MT9M114, Aptina 720p Image Sensor Headboard
Aptina Interconnection Board
USB 3.0 Cable

How to Get the Kit?

Sign NDA with Aptina (send request to fx3@cypress.com for expedited process)
Buy the Aptina MT9M114 Image Sensor Headboard from Aptina Distributors
Buy the $295 EZ-USB FX3 Development Kit (CYUSB3KIT-001)
Buy the Interconnection Board from a Cypress Design Partner

Kit Software and Quick Start Guide

Software Title	Description	Link
EZ-USB FX3 SDK (with GPIF II Designer)	This kit requires GPIF II Designer and SDK for image sensor firmware development
Demo Firmware (cyfxuvc.img)	Program the camera kit with the demo firmware to stream HD 720p video over USB 3.0 (also works on USB 2.0 port at reduced resolution and frame rate) * Source code available upon request. Contact fx3@cypress.com with a copy of Aptina NDA*
Camera Kit Guide	The camera kit guide provides instructions from board setup to running the demo

Code/Memory Banking Using EZ-USB® - AN58170

Thu, 17 Jan 2013 05:28:50 -0600

The EZ-USB® family of chips has an 8051 core. The 8051 core has a 16-bit address line and is only able to access 64 KB of memory. However, the firmware size sometimes exceeds 64 KB This application note describes methods of overcoming this 64 KB limitation and also demonstrates the implementation of one such method.

EZ-USB FX3 Software Development Kit

Thu, 17 Jan 2013 01:00:27 -0600

Cypress delivers the complete software and firmware stack for FX3, in order to easily integrate SuperSpeed USB into any embedded application. The Software Development Kit (SDK) comes with tools, drivers and application examples, which help accelerate application development.

The SDK installation package as well as zip/tar archives of individual components are available below for download. Given below is a brief description of these downloadable items to help you select the right file(s) to download.

EZ-USB FX3 SDK Installer - This is the master installer file that will install the firmware library with samples, USB Suite with Windows host driver and applications, Eclipse IDE & GCC tool chain. Once installed using the installer, Cypress Update Manager will enable users to look for updated versions of these software modules and facilitate upgrades.
Firmware Library Zip – A zip archive that contains the FX3 firmware libraries, driver sources for serial peripheral modules, header files, example code, firmware conversion utility and documentation. The following firmware source samples are also part of the library zip file.
- USB Bulk data loopback and source/sink
- USB Isochronous loopback and source/sink
- DMA examples: Interleaved and multicast data
- Serial Interface Loopback: UART, SPI, I2C and I2S
- Slave FIFO: Synchronous and Asynchronous
- USB Video Class: Isochronous and Bulk
- USB Mass Storage Bulk-Only transport
- USB Audio Class: Input (microphone) device
USB Suite Zip – A zip archive containing windows host driver, C++ & C# API libraries, and the control center, bulkloop and streamer applications for 32 bit platforms (Windows XP, Vista and Windows 7) and 64 bit platforms (Windows Vista and Windows 7)
FX3 SDK for Linux platforms – A tar archive containing the FX3 firmware libraries and examples, the ARM GNU toolchain, Eclipse IDEs (x64 and x86 versions) and the CyUSB suite for Linux platforms
USB Suite for MacOS - A libusb based wrapper library for Mac OS, to facilitate USB host application development.
Documentation
- FX3 Programmer's Manual
- FX3 API guide
- FX3 Release Notes

CYWBDVK002AB Westbridge Astoria USB 2.0 High Speed Multimedia Mass Storage Peripheral Controller Development Kit

Tue, 15 Jan 2013 05:42:06 -0600

The Cypress's West Bridge® Astoria™ multimedia mass storage controller offers a broad support of mass storage standards and the same industry-leading, Hi-Speed USB data transfer performance as the West Bridge® Antioch™. Astoria continues to equip Cypress’s Simultaneous Link to Independent Multimedia (SLIM®) architecture, which optimizes multitasking functionality and improves overall user experience.

Key Features

Integration: Hi-Speed USB 2.0 compliant with built-in PHY
SLIM® Architecture: simultaneous data paths between USB, storage, and processor
Turbo-MTP: Optimize data throughput for Microsoft® Media Transfer Protocol
Mass Storage Support: Up to two SD, SDIO, MMC, MMC, and CE-ATA devices
Flexible Processor I/F Support: SRAM, ADMux, PCRAM, PNAND, SPI
FlexBoot: Boot processor from processor interface port
Ultra low power: 1.8 V core operation
Flexible Clock: selectable clock input at 19.2 MHz, 24 MHz, 26 MHz, 48 MHz
Small Footprint: 6x6 mm 100-pin VFBGA package and 3.91x3.91 mm 81-pin WLCSP

Hardware Description

The CYWBDVK002AB Westbridge Astoria Development Kit Box includes:

Astoria Development Kit Board
5 VDC, 2A wall power supply
USB cable (A-B)
Quick Start Guide booklet.

Firmware Source

For the latest Astoria firmware sources, please visit Astoria Software Development Kit

CY4623 Mouse Reference Design

Tue, 15 Jan 2013 05:32:27 -0600

The CY4623 reference design kit offers a complete production-ready solution for a USB or PS/2 optical mouse. The design showcases the revolutionary new enCoRe II device family for an overall reduction in system cost.

Features

Agilent ADNS-2620 optical sensor
USB or PS/2 support, may be customized for full combi support
No external transistors or pull-ups
3 buttons with I/O for 6-10 more
Scroll wheel
CY7C638xx device family
USB 2.0 specification-compliant
WHQL-compliant

Kit Components

Evaluation 3-button combi optical mouse
PS/2 adapter
"MiniProg" programmer and USB receptacle programming adapter
Firmware source and object code
Complete hardware design files
Comprehensive design documentation

A modified version of the CY4623supporting the PixArt PAN3101 sensor is also available.

CY4608M: Multi-TT HX2VL Very Low-Power 4-Port Hub Development Kit

Tue, 15 Jan 2013 05:25:47 -0600

CY4608M HX2VL™ USB 2.0 Multi-TT 4-Port Hub

Cypress offers a complete development kit for developing a fixed-function, very low-power Multi-TT 4-port USB 2.0 hub controller (28 QFN package) that is production ready and USB-IF compliant.

Key Features:

Multiple Transaction Translator.
Compliance with USB 2.0 specification.
480/12/1.5-Mbps operation.
Very Low-power consumption.
Highly integrated solution for reduced BOM cost.
Supports Internal or External Voltage regulation.
Space Saving 5x5mm 28-pin QFN package.
Maximum configurability using EEPROM programming.
Individual or ganged port power switching and over current detection.

Hardware Description

The CY4608M HX2VL Development Kit Box includes:

CY7C65642-based USB 2.0 4-port Hub Board.
5 VDC, 2.5A wall power supply.
USB cable (A-B).
Quick Start Guide booklet.

CY4607M: Multi-TT HX2VL Very Low-Power 4-Port Hub Development Kit

Tue, 15 Jan 2013 05:15:38 -0600

CY4607M HX2VL™ USB 2.0 Multi-TT 4-Port Hub

Cypress offers a complete development kit for developing a fixed-function, very low-power Multi-TT 4-port USB 2.0 hub controller (48 TQFP package) that is production ready and USB-IF compliant.

Key Features:

Multiple Transaction Translator.
Compliance with USB 2.0 specification.
480/12/1.5-Mbps operation.
Very Low-power consumption.
Highly integrated solution for reduced BOM cost.
Supports Internal or External Voltage regulation.
Space Saving 7x7mm 48-pin TQFP package.
Maximum configurability using EEPROM programming.
Individual or ganged port power switching and over current detection.

Hardware Description

The CY4607M HX2VL Development Kit Box includes:

CY7C65642-based USB 2.0 4-port Hub Board.
5 VDC, 2.5A wall power supply.
USB cable (A-B).
Quick Start Guide booklet.

CY4605 - High-Speed Low-Power USB 2.0 Compliant 2-Port Hub

Tue, 15 Jan 2013 05:02:09 -0600

EZ-USB HX2LP(TM) USB 2.0 2-Port Hub

Cypress offers a complete reference design for developing a fixed-function, low-power 2-port USB 2.0 hub that is production ready.

Key Features:

Compliance with USB 2.0
480/12/1.5-Mbps operation
Low-power operation for bus-powered applications
Fit/Form/Function Compatible with CY7C65640 & CY7C65640A TetraHub(TM)
8x8mm 56-lead QFN (quad flat no-lead) package
Integrated components for lower BOM cost
Individual or ganged port power switching and over current detection
Dedicated LED ports

Hardware Description

The EZ-USB HX2LP(TM) reference design kit includes:

CY7C65620-based demonstration unit
5 VDC, 2.5A wall power supply
USB cable
Datasheet
Design & Application Notes
Hardware files
Schematics
Bill of Materials
Gerber and OrCAD source files

CY3688 MoBL-USB™ TX2UL Development Kit

Tue, 15 Jan 2013 04:55:01 -0600

The TX2UL is the industry's smallest Hi-Speed USB PHY and supports both High-Speed (480Mbits/sec) and Full-Speed (12Mbits/sec) modes. TX3LP18 answers the need for a ULPI interfaced Hi-Speed USB2.0 transceiver for use with next generation processors. Its small packaging and low power consumption make it a perfect solution for mobile applications.

Design and integrate TX2UL into your platform today with the help of the MoBL-USB™ TX3LP18 Development Kit. The CY3688 can be connected to any existing development platform with a ULPI interface, enabling system designers to easily integrate high-speed USB functionalities into their applications.

CY3688 board features include: the TX2UL device itself, USB connector, ULPI connector and three separate power measurement test points. To provide more flexibility in the configuration of the board, jumper options are available to toggle power supply and ULPI controller options.

Hardware Description:

Kit contents include:

MoBL-USB™ TX2UL DVK Board
Power supply
USB cable
Quick Start Booklet
Complete documentation CD including a comprehensive user guide as well as board schematic and layout

To order, please contact your local sales distributor.

CY3674 EZ-USB FX1 Development Kit

Tue, 15 Jan 2013 03:52:58 -0600

The development kits for the EZ-USB FX1(TM) family provide complete hardware and software solutions for accelerating the firmware and device driver development for all the products in the family. The development kits use the actual silicon for the entire development. Cypress's software utilities and example firmware allow the user to generate USB traffic in hours, not weeks!

Cypress includes an evaluation version of the 8051 Keil Software Tools in the Full Speed USB 2.0 development kit. The evaluation version of the C-Compiler lets the designer write 8051 microcontroller applications in C and still get the efficiency and speed of assembly language. Advanced features from Keil tools include the ability to single step through code. This makes it easy to detect errors, handle source level debugging, and set breakpoints. With the ability to debug code one line at a time and to quickly compile and one-step download new code, developers have a more efficient means to complete firmware faster than using emulators. The supplied Keil tools are fully functional, but are limited in object size to 4 kilobytes.

New! The new generation of the General Programmable Interface (GPIF) Tool is available. Download GPIF Designer now!

For part delails you can access the EZ-USB(R) Technical Reference Manual (TRM) at http://www.cypress.com/?rID=38232.

Hardware Description

The kit includes the following:

EZ-USB development board with CY7C64713-128AXC
Peripheral board for prototyping
USB cable
An RS232 9-pin to 9-pin cable

CY3664-EXT Rev Development Kit

Tue, 15 Jan 2013 03:27:57 -0600

Overview:

This part requires CY3655-DK (which includes CY3655-EXT & CY3215-DK) or CY3215-DK

The CY3664 extension kit is intended for any customer who already has the ICE-Cube emulation kit (CY3215-DK). This kit supports all items specific to enCoRe III devices in the CY7C64215 families without having to pay for a duplicate in-circuit-emulator. The CY3664-EXT Development Kit includes:

Application Board (1)
MiniProg USB Programmer (1)
CY7C64215-28PVXC samples (3)
CY7C63823-56LFXC samples (3)
Standard-A to Mini-B USB cable (1)
Jumper wire kit (1)
PSoC Designer Software CD-ROM (1)
12V power supply (1)
Cover Letter
Release Notes
Getting Started

CY3660 enCoRe V / LV Development Kit

Tue, 15 Jan 2013 03:15:33 -0600

The enCoRe™ V development system, based on the highly refined PSoC®; (Programmable System-on-Chip™) tools, supplies the user with an in-circuit emulator (ICE) that works in conjunction with actual silicon to provide an accurate and efficient development system. The PSoC Designer™ software consists of a graphical user interface, assembler, C compiler, linker and debugger for a highly integrated code development environment. A compliant Full-Speed USB "User Module" along with other peripheral User Modules simplifies the learning curve and speeds development time.

Application:

Wireless Dongles
Laser Mice
Gaming Keyboards
Gaming
Point-of-Sale Devices

Key Features:

Hardware Description:

This development kit includes:

Two DVK Boards (enCoRe V and enCoRe V LV development boards)
Two LP Radio Modules (2.4 GHz wireless modules using Cypress’s WirelessUSB LP radio)
Two 12V Power Supplies
PSoC MiniProg (for programming the onboard On-Chip-Debugger (OCD) chips)
CD-ROM
USB Type A to Mini-B Cable
Wire Pack
LCD Module
CY3210-MPAdapter
PSoC Designer software development tool with complete set of User Modules
Four firmware examples with compete source code

CY3655-EXT Extension Kit

Tue, 15 Jan 2013 03:05:46 -0600

Overview:

This part requires CY3655-DK (which includes CY3655-EXT & CY3215-DK) or CY3215-DK

The CY3655 extension kit is intended for any customer who already has the ICE-Cube emulation kit (CY3215-DK). This kit provides all items specific to the enCoRe II and Wireless enCoRe II (CY7C601xx and CYC602xx) families without having to pay for a duplicate in-circuit-emulator.

The CY3655-EXT Development Kit includes:

Application Board
enCoRe II emulation pod (CY3655-PODUSB)
Wireless enCoRe II emulation pod (CY3655-PODWIR)
Collection of PDIP feet
- 40-PDIP foot
- 18-PDIP foot
- 16-PDIP foot
Modular Programmer (CY3216)
- Programmer base board
- 3 matrix cards for various packages
5-pin to USB-A-receptacle programming adaptor (CY3655-PLG)
Device samples
- (2) CY7C63913-PXC
- (2) CY7C60123-PXC
- (2) CY7C60223-PXC
Standard USB cable
PS/2 male-to-male cable
PSoC Designer Software CD-ROM
Various printed documents

How to Interface FPGA to Ez-USB® FX3™ DVK (Rev 3) - KBA85373

Thu, 10 Jan 2013 05:50:48 -0600

Answer:

Cypress FX3 DVK Bridge Boards provides interface for Cypress FX3 DVK to all the Xilinx and Altera FPGA boards. You can use the Xilinx or Altera bridge board to connect FX3 DVK either by using FMC or HSMC connector.

To connect FX3 DVK to Xilinx (Spartan/Virtex) FPGA boards, use FMC to FX3 DVK interconnection board. You can buy this board from Agile Solutions (http://www.agile-sdr-solutions.com)

To connect FX3 DVK to Altera (Stratix/Arria/Cyclone) FPGA boards, use HSMC to FX3 DVK interconnection board. You can buy this board from Agile Solutions (http://www.agile-sdr-solutions.com)

Implementing an 8-Bit Parallel MPEG2-TS Interface Using Slave FIFO Mode in FX2LP - AN58069

Thu, 10 Jan 2013 04:32:52 -0600

The example code uses EZ-USB FX2LP™ (CY7C68013/14/15/16) at the receiver end and a data generator as the source for the data stream. The hardware connections and example code are included with this application note. In addition, this application note describes a design example that uses this interface.

Introduction

The EZ-USB FX2LP is an excellent solution if you want to a high-performance high-speed USB to a design. In applications similar to a TV dongle, an MPEG2-TS to USB Bridge is critical. The EZ-USB FX2LP not only takes care of glueless logic, but also makes it easier for the designer to complete the design. This application note addresses the hardware connections and example firmware required to implement the MPEG2-TS interface using the Slave FIFO mode.

CY7C65621, CY7C65631: EZ-USB HX2LP Lite™ Low Power USB 2.0 Hub Controller Family

Wed, 09 Jan 2013 00:00:57 -0600

EZ-USB HX2LP Lite™ Low Power USB 2.0 Hub Controller Family

Features

USB 2.0 hub controller
Compliant with the USB 2.0 specification
USB-IF certified: TID# 30000009
Windows Hardware Quality Lab (WHQL) compliant
Up to four downstream ports supported
Supports bus powered and self powered modes
Single Transaction Translator (TT)
Bus power configurations
For more, see pdf

Introduction

EZ-USB HX2LP Lite™ is Cypress’s next generation family of high performance, low power USB 2.0 hub controllers. HX2LP Lite is an ultra low power single chip USB 2.0 hub controller with integrated upstream and downstream transceivers, a USB Serial Interface Engine (SIE), USB Hub Control and Repeater logic, and Transaction Translator (TT) logic. Cypress has also integrated many external passive components such as pull up and pull down resistors, reducing the overall bill of materials required to implement a hub design.

CYWB022XX Family: West Bridge®: Astoria™ USB and Mass Storage Peripheral Controller

Fri, 04 Jan 2013 02:39:18 -0600

West Bridge®: Astoria™ USB and Mass Storage Peripheral Controller

Features

Multimedia device support
Supports Microsoft® Media Transfer Protocol (MTP) with optimized data throughput
Simultaneous Link to Independent Multimedia (SLIM®) architecture, enabling simultaneous and independent data paths between the processor and USB, and between the USB and mass storage
High-speed USB at 480 Mbps
GPIF (General Programmable Interface)
For more, see pdf

Functional Overview

Turbo-MTP Support

Turbo-MTP is an implementation of Microsoft’s MTP enabled by West Bridge. In the current generation of MTP-enabled mobile phones, all protocol packets needs to be handled by the main processor. West Bridge Turbo-MTP switches these packet types and sends only control packets to the processor, while data payloads are written directly to mass storage, thereby bringing the high performance of West Bridge to MTP.

CYWB0124AB, CYWB0125AB: West Bridge® Antioch™ USB/Mass Storage Peripheral Controller

Fri, 04 Jan 2013 02:34:35 -0600

West Bridge® Antioch™ USB/Mass Storage Peripheral Controller

Features

SLIM™ architecture, enabling simultaneous and independent data paths between processor and USB, and between USB and mass storage
High speed USB at 480 Mbps
Mass storage device support
Memory mapped interface to main processor
DMA slave support
Supports Microsoft® media transfer protocol (MTP) with optimized data throughput
Ultra low power, 1.8 V core operation
Low power modes
For more, see pdf

Functional Overview

SLIM™ Architecture

The Simultaneous Link to Independent Multimedia (SLIM) architecture allows three different interfaces (the P-port, the S-port, and the U-port) to connect to one another independently.

Bus-Powered USB Hub Design Using EZ-USB HX2LP™/HX2VL - AN15454

Wed, 02 Jan 2013 04:33:36 -0600

The content of this application note is now available in AN72332 Guidelines on System Design using Cypress' USB 2.0 Hub (HX2VL)

AN69025 - Schematic Review Checklist for HX2VL

Wed, 02 Jan 2013 04:26:16 -0600

The content of this application note is now available in AN72332 Guidelines on System Design using Cypress' USB 2.0 Hub (HX2VL)

AN73052 - Configuring HX2VL Parameters

Wed, 02 Jan 2013 04:16:07 -0600

The content of this application note is now available in AN72332 - Guidelines on System Design using Cypress' USB 2.0 Hub (HX2VL)

AN72332 - Guidelines on System Design using Cypress' USB 2.0 Hub (HX2VL)

Wed, 02 Jan 2013 04:07:30 -0600

AN72332 provides guidelines on system design with HX2VL, a high-performance, low-power USB 2.0 high speed hub that is optimized for low-cost designs. Recommended system design and PCB Layout techniques are included here to ensure best performance and full compliance with USB 2.0 specification.

Introduction

HX2VL is the next-generation family of high-performance, low-power USB 2.0 hub controllers. The HX2VL has integrated upstream and downstream transceivers, a USB serial interface engine (SIE), USB hub control and repeater logic, and transaction translator (TT) logic. The HX2VL portfolio has Single-TT and Multi-TT versions, lowcost options with high performance.

USB Low-Speed Peripherals

Mon, 31 Dec 2012 03:13:58 -0600

AN50963 - EZ-USB® FX1™/FX2LP™ Boot Options

Thu, 27 Dec 2012 01:06:17 -0600

AN58009 - Serial (UART) Port Debugging of FX1/FX2LP Firmware

Wed, 26 Dec 2012 08:02:17 -0600

This application note describes the code to be added to FX2LP firmware for serial port debugging. This code enables the developer to print debug messages and real-time values of variables to the HyperTerminal program on a Windows computer or to capture it in a file using the UART in FX2LP.

CY3684 EZ-USB FX2LP Development Kit

Fri, 21 Dec 2012 03:54:53 -0600

The development kits for the EZ-USB FX2LP™ family provide complete hardware and software solutions for accelerating the firmware and device driver development for all the products in the family. The development kits use the actual silicon for the entire development. Cypress's software utilities and example firmware allow the user to generate USB traffic in hours, not weeks!

Cypress includes an evaluation version of the 8051 Keil Software Tools in the USB 2.0 development kit. The evaluation version of the C-Compiler lets the designer write 8051 microcontroller applications in C and still get the efficiency and speed of assembly language. Advanced features from Keil tools include the ability to single step through code. This makes it easy to detect errors, handle source level debugging, and set breakpoints. With the ability to debug code one line at a time and to quickly compile and one-step download new code, developers have a more efficient means to complete firmware faster than using emulators. The supplied Keil tools are fully functional, but are limited in object size to 4 kilobytes.

New! The new generation of the General Programmable Interface (GPIF) Tool is available. Download GPIF Designer now!

For part delails you can access the EZ-USB® Technical Reference Manual (TRM) at http://www.cypress.com/?rID=38232.

For software collaterals download SuiteUSB (http://www.cypress.com/?rID=34870)

Hardware Description

The kit includes the following: EZ-USB development board with CY7C68013A-128AXC, peripheral board for prototyping, USB cable, and an RS232 9-pin to 9-pin cable.

Related Datasheet: CY7C68013A

Downloading the firmware to FX2 chip.

Fri, 21 Dec 2012 03:43:08 -0600

There are three ways to download the firmware

(1) Firmware download from host (Using the control panel host application for example)

(2) Firmware upload from EEPROM ( Perform a C2 boot load). See the TRM chapter 3 for more details on this

(3) Using the custom loader driver. See the EZLOADER Custom Firmware Loader Driver application note.

(4) External Memory. External EPROM, flash can be used. This is limited to EZ-USB FX. 64 KBytes can interface directly to our device without external logic. Large memory can be supported using programmable I/O pins and other paging techniques. Please open a support case for a specific example on interfacing with flash.

(5) Using Scripting method.See application note on Downloading FX2LP/FX1 Firmware Using CyConsole Script Capabilities

Maximum throughput using FX3 - KBA84084

Thu, 20 Dec 2012 04:28:52 -0600

Answer: The throughput obtained using FX3 depends on the USB 3.0 host as well. The data transfer rates obtained using FX3 SDK 1.2 and Intel C216 chipset are as follows:

Bulk transfer from FX3 device to USB host: 430 MBps

Bulk transfer from USB host to FX3 device: 360 MBps

Maximum throughput using Bulk Source Sink Example - KBA84083

Thu, 20 Dec 2012 03:52:51 -0600

Answer:

Change CY_FX_EP_BURST_LENGTH from ‘1’ to ‘16’ in cyfxbulksrcsink.h
Change the Manual OUT DMA channel’s buffer size to 63 KB and reduce the buffer count to two
Have only one endpoint (IN or OUT) this avoids any USB host bandwidth issues.

Building Custom .nx2 File - KBA83970

Thu, 20 Dec 2012 02:45:23 -0600

Answer: New .nx2 file may be built using BldNx2.exe utility that comes with CY3686 SDK. The hex file selection for the custom .nx2 file desired, which is to be downloaded onto the NX2LP Flex Kit, is made on the basis of the page size of the NAND Flash, the NX2LP is interfacing with. The BldNx2.exe requires two separate set of firmware: 512-NAND firmware inand_fw.hex and either 2K-NAND firmware, nand_mc2k.hex or 4K-NAND firmware, nand_mc4k.hex.

Utilization of the Unused GPIF Control Lines - KBA83964

Thu, 20 Dec 2012 02:38:31 -0600

Answer: No, triggering of the GPIF does not change the state of the unused control lines. This is an advantage in a situation when we are using only a few of the GPIF control lines. Let us say, of the 6 available control lines, we are using only 2 for GPIF and the rest 4 can be used for other purposes. When the GPIF is idle, we can manipulate (enable and drive a value) the state of the unused 4 control lines using the GPIFIDLECTL register. Even when the GPIF is triggered, the unused control lines will retain the value they were initialized to in the GPIFIDLECTL register.

FX2LP does not enumerate for Firmware (code+xdata) of Size Greater than 16 K - KBA83973

Thu, 20 Dec 2012 02:09:24 -0600

Answer: Check in your .m51 file where the compiler is placing the descriptor files. The issue might be that the compiler is putting the descriptor table into external memory. When this happens fw.c relocates the descriptor table to memory location 0x0080 where it overwrites some portion of the code. This might cause error in enumeration or incorrect functioning of some part of code. You can specify the starting location of your code memory after leaving space for the interrupt vector tables and the descriptor table.

For example, in the BL51 locate tab, you can specify your code to begin at a location greater than (0x0080 + length of your descriptor table). Here, 0x0000 - 0x0080 will contain the interrupt vector table. For example if the length of your descriptor table is 80h, you can safely start your code from 0x120h.

Multiple FX2LP Devices Connected to Host - KBA83974

Thu, 20 Dec 2012 01:54:16 -0600

Answer: The iSerialNumber byte in the DeviceDescriptor can be used to uniquely identify the devices even if the devices have the same VID/PID.

AN70983 - EZ-USB FX2LP™ Bulk Transfer Application in C# Using SuiteUSB C# Library (CyUSB.dll)

Wed, 19 Dec 2012 03:04:43 -0600

Overview

Cypress EZ-USB FX2LP™ is one of the most popular programmable high-speed USB controllers in the industry. This application note has two parts.

Host application: This application is built on the Microsoft Visual C# 2008 platform. The application communicates to BULK IN and BULK OUT endpoints of FX2LP™ using the interfaces given by CyUSB.dll. The CyUSB.dll, in-turn communicates internally with the Cypress USB driver CyUSB.sys, for talking to these endpoints.

Target firmware: This describes related firmware residing on target, which transfers the data sent from the host application on BULK OUT endpoint to the BULK IN endpoint, for sending it back to the host application in loopback fashion.

AN70486 - EZ-USB® FX2LP™ Host Application in VC++ 2008 Using Suite USB Library (CyUSB.dll)

Wed, 19 Dec 2012 03:02:48 -0600

Overview

AN70486 describes a host application built on the Microsoft Visual C++ 2008 platform that uses CyUSB.dll to communicate with Cypress USB driver, CyUSB.sys. The host application communicates with the BULK IN and BULK OUT endpoints of FX2LP, using the interfaces provided by the APIs of CyUSB.dll. The CyUSB.dll in-turn communicates internally with Cypress USB driver (CyUSB.sys), for talking to these endpoints. This host application implements the transfer only with devices that pass the particular VID/PID identification. The example device used in this application note is the Bulkloop device. The firmware that is attached along with this application note causes a loop back of data inside the device. Thus this host application, with the attached Bulkloop device, demonstrates the loopback of data.

USB & Wireless/RF Kits

Wed, 19 Dec 2012 02:34:37 -0600

Kit Classification

Cypress offers a wide range of kits to help you develop with Cypress parts. The ultimate goal is to get you to market faster - with minimum risk - by reducing learning and development time. Cypress USB and Wireless/RF kits fall into one of the following categories:

Development Kits (DVKs)

First Touch Kits (FTKs)

Reference Design Kits (RDKs)

Programmers

Debugger

Emulation Kit (POD)

Kit Selection

Development Kits

Reference Design Kits

First Touch Kits

Programmers

Debuggers

Emulation Kit/Pod

Third Party Kits

Documentation

Application Notes

Support

Do you need support from a technical expert? File a technical support case.

Or Call 1-800-541-4736 and select option 8.

AN65974 - Designing with the EZ-USB® FX3 Slave FIFO Interface

Tue, 18 Dec 2012 01:14:50 -0600

The hardware interface and configuration settings for the FLAGs are described in detail and examples are provided. References to the GPIF II Designer are included in order to make the Slave FIFO interface easy to design with. Finally, a complete design example is included to demonstrate how an FPGA can be interfaced to FX3 using synchronous Slave FIFO.

EZ-USB®: USB to UART Bridge Controller Demo Providing USB connectivity to UART peripheral

Mon, 17 Dec 2012 00:58:49 -0600

WUSB-NL Radio Driver API Guide

Wed, 12 Dec 2012 01:38:43 -0600

The WUSB-NL radio driver provides users with a consistent interface to the WUSB-NL radio. The driver is designed to interface with both C and M8C assembly written applications and consists of the following files:

Nlradio.asm
Nlradio.h
Nlradio.inc
Nlspi.asm

This document describes the APIs exposed by the WUSB-NL driver.

The WUSB-NL radio driver is used in wireless mouse, keyboard, and bridge application software stacks. The WUSB-NL radio driver is modular and can be used as a library. The API exported by this module is explained in this document.

AN72419 - West Bridge® Benicia™ Hardware Design Guidelines and Schematic Checklist

Tue, 11 Dec 2012 06:28:47 -0600

The application note provides effective system design and PCB layout techniques to jumpstart your project.

Introduction

West Bridge Benicia is a USB 3.0 SuperSpeed peripheral controller optimized for sideloading and streaming applications. West Bridge Benicia supports the latest removable and embedded mass-storage devices such as SD 3.0 (SDXC with UHS-I) and eMMC 4.41. It also boosts the USB data rate from 480 Mbps (High Speed) to 5 Gbps (SuperSpeed).

To successfully integrate this high-performance peripheral in a system, the designer should consider the provided configuration and layout recommendation and ensure correct system operation.

CY7C65642: HX2VL - Very Low Power USB 2.0 TetraHub™ Controller

Mon, 03 Dec 2012 22:43:47 -0600

HX2VL - Very Low Power USB 2.0 TetraHub™ Controller

Features

High-performance, low-power USB 2.0 hub, optimized for low-cost designs with minimum bill-of-material (BOM).
USB 2.0 hub controller
Very low-power consumption
Highly integrated solution for reduced BOM cost
Downstream port management
Maximum configurability
Available in space saving 48-pin (7 × 7 mm) TQFP and 28-pin (5 × 5 mm) QFN packages
Supports 0 °C to +70 °C temperature range
For more, see pdf

Functional Overview

The Cypress CY7C65642 USB 2.0 Hubs are low-power hub solutions for USB which provide maximum transfer efficiency with no TT multiplexing between downstream ports. The CY7C65642 USB 2.0 Hubs integrate 1.5 kΩ upstream pull-up resistors for full speed operation and all downstream 15 kΩ pull-down resistors and series termination resistors on all upstream and downstream D+ and D– pins. This results in optimization of system costs by providing built-in support for the USB 2.0 specification.

Interfacing SRAM with FX2LP over GPIF - AN57322

Wed, 28 Nov 2012 23:52:45 -0600

It describes how to create read and write waveforms using the GPIF Designer. This application note is also useful as a reference to connect FX2LP to other SRAMs.

Introduction

The GPIF is an 8-bit or 16-bit programmable parallel interface that helps to reduce system costs by providing a glueless interface between the EZ-USB FX2LP™ and an external peripheral. It is a highly configurable and flexible piece of hardware that allows you to get the most out of your USB 2.0 design. GPIF fits into applications that need an external mastering device to exchange information.

CY7C63310, CY7C638xx: enCoRe™ II Low Speed USB Peripheral Controller

Wed, 28 Nov 2012 06:30:02 -0600

enCoRe™ II Low Speed USB Peripheral Controller

Features

USB 2.0-USB-IF certified (TID # 40000085)
enCoRe™ II USB - ‘enhanced Component Reduction’
- Crystalless oscillator with support for an external clock. The internal oscillator eliminates the need for an external crystal or resonator.
- Two internal 3.3 V regulators and an internal USB Pull-up resistor
- Configurable I/O for real world interface without external components
USB Specification compliance
- Conforms to USB Specification, Version 2.0
- Conforms to USB HID Specification, Version 1.1
- Supports one low speed USB device address
For more, see pdf

Introduction

Cypress has reinvented its leadership position in the low speed USB market with a new family of innovative microcontrollers. Introducing enCoRe II USB - ‘enhanced Component Reduction.’ Cypress has leveraged its design expertise in USB solutions to advance its family of low speed USB microcontrollers, which enable peripheral developers to design new products with a minimum number of components.

CY7C65620/CY7C65630: EZ-USB HX2LP™ Low Power USB 2.0 Hub Controller Family

Wed, 28 Nov 2012 01:34:37 -0600

EZ-USB HX2LP™ Low Power USB 2.0 Hub Controller Family

Features

USB 2.0 hub controller
Automotive AEC grade option (–40 °C to 85 °C)
Industrial grade option (–40 °C to 85 °C)
Compliant with USB 2.0 specification
USB-IF certified: TID# 30000009
Windows Hardware Quality Lab (WHQL) Compliant
Up to four downstream ports supported
Supports bus powered and self powered modes
Single transaction translator (TT)
Bus power configurations
For more, see pdf

Introduction

EZ-USB HX2LP™ is Cypress’s next generation family of high-performance, low-power USB 2.0 hub controllers. HX2LP is an ultra low power single chip USB 2.0 hub controller with integrated upstream and downstream transceivers, a USB serial interface engine (SIE), USB hub control and repeater logic, and TT logic. Cypress has also integrated many of the external passive components, such as pull-up and pull-down resistors, reducing the overall bill of materials required to implement a hub design.

AN56835 - Interfacing West Bridge® Astoria to WirelessUSB™ LP

Wed, 28 Nov 2012 01:12:51 -0600

This application note describes how to connect the West Bridge Astoria with WirelessUSB™ LP and also provides an example of a wireless presentation tool with storage.

AN73304 - Booting EZ-USB® FX3 over Synchronous ADMux Interfaces

Tue, 27 Nov 2012 23:41:33 -0600

The content of this application note is now available in AN76405 - EZ-USB FX3 Boot Options

AN68914 - EZ-USB® FX3 I2C Boot Option

Tue, 27 Nov 2012 23:36:45 -0600

The content of this application note is now available in AN76405 - EZ-USB FX3 Boot Options

AN70193 - EZ-USB® FX3 SPI Boot Option

Tue, 27 Nov 2012 23:33:19 -0600

The content of this application note is now available in AN76405 - EZ-USB FX3 Boot Options

AN73150 - Booting EZ-USB® FX3 over High-Speed USB

Tue, 27 Nov 2012 23:29:41 -0600

The content of this application note is now available in AN76405 - EZ-USB FX3 Boot Options

User Module Datasheet: SPI Slave Datasheet SPIS V 2.70 (CY8C29/27/24/22/21, CY8C23x33, CY7C603xx, CY7C64215, CYWUSB6953, CY8CLED02/04/08/16, CY8CLED0xD, CY8CLED0xG, CY8CTST110, CY8CTMG110, CY8CTST120, CY8CTMG120, CY8CTMA120, CY8CTMA140, CY8CTMA300, CY8C21x45, CY8C22x45, CY8CTMA30xx, CY8C28x45, CY8CPLC20, CY8CLED16P01, CY8C28xxx, CY8C21x12)

Fri, 23 Nov 2012 02:19:24 -0600

Features and Overview

Supports Serial Peripheral Interconnect (SPI) Slave protocol
Supports protocol modes 0, 1, 2, and 3
Selectable input sources for MOSI, SCLK, and ~SS
Selectable output routing for MISO
Programmable interrupt on SPI done condition
SS may be firmware controlled

The SPIS User Module is a Serial Peripheral Interconnect Slave. It performs full duplex synchronous 8-bit data transfers. SCLK phase, SCLK polarity, and LSB First can be specified to accommodate most SPI protocols. The SPIS PSoC block has selectable routing for the input and output signals, and programmable interrupt driven control. Application Programming Interface (API) firmware provides a highlevel programming interface for either assembly or C application software.

Demo: EZ-USB® FX3™ for HD Video

Thu, 22 Nov 2012 06:07:12 -0600

This video demonstrates the benefits of EZ-USB FX3 in HD video applications. In this demo, we will showcase a USB Video Class, or UVC device that is capable of streaming uncompressed 720p video at 30 frames per second (fps) over USB 3.0. The 720p demo kit consists of three boards: EZ-USB FX3 development kit, Aptina MT9M114 image sensor headboard, and an interconnection board.

FX2LP DMB-T/H TV Dongle Reference Design Guide

Wed, 21 Nov 2012 22:29:03 -0600

The Cypress FX2LP and Legend Silicon based DMB-TH TV Dongle Reference Design consists of all files required for the complete design. It has a tuner from ADI, which tunes the RF signal to the Legend Silicon demodulator. This sends the TV signals in MPEG2_TS stream to Cypress FX2LP, which then sends them to the PC through the USB interface. In the PC, the BDA driver forwards the data from the USB to the Media Player application where it is played.

Reference Design Contents:

Schematics in .pdf and .dsn format
Gerber files
Bill of Materials
Firmware source code
Driver Object Code
Reference Design Guide

OS Supported: The above given reference design has been tested with Windows XP/32 bit platform and WHQL certified. The process of testing with other OS platforms are underway and will be updated once it is done.

Note: We recommend the users not to use the reference design with any other OS Platform other than Win XP32.

For more information about the entire design , please contact your local Cypress sales office.

USB Selective Suspend Compliance Test - KBA84678

Wed, 21 Nov 2012 22:07:02 -0600

Answer: To conserve power, USB devices automatically enter the Suspended state when the device senses that there is no USB traffic for a specified period. All devices must ‘suspend’ if bus activity has not been observed for 3 ms time. In Suspend mode the current consumption should not be more than 2.5 mA.

To ensure that enCoRe MCU based USB devices comply with this, follow the steps below:

Configure the unused pins on the enCoRe MCU to High impedance analog mode.
Configure the sleep timer for 2 ms. Check the USB bus activity every 2 ms. If there is no activity on the bus for more than 3 ms, put the device into Sleep mode.

Cypress enCoRe MCUs pass the test for USB compliance, and the selective suspend current is less than 2.5 mA.

For selective suspend current test procedure, follow this link.

User Module Datasheet: CapSense® Sigma-Delta Datasheet CSD V 2.10 (CY8C20x66A, CY8C20x36A, CY8C20x46A, CY8C20x96A, CY8C20xx6AS, CY8C20xx6H, CY8C20XX6L, CYONS2110-LBXC, CYONSFN2053-LBXC, CYONSFN2061-LBXC, CYONSFN2151-LBXC, CYONSFN2161-LBXC, CYONSFN2162-LBXC)

Wed, 21 Nov 2012 02:24:27 -0600

Features and Overview

Implements CapSense® capacitive sensing in the CY8C20xx6A family of PSoC® devices using sigma-delta data conversion.
Configurable system parameters allow tuning to optimize performance in a broad range of applications.
Supports up to 36 capacitive sensors and 6 sliders.
Capable of detecting touches as low as 0.1 pF, that is, detecting a finger is possible through up to 15 mm of glass or 5 mm of plastic.
High immunity to AC mains noise, other EMI, and power supply noise.
Supports capacitive sensors configured as independent buttons and/or as dependent arrays to form sliders.
Effective number of slider elements can double the number of dedicated I/O pins using diplexing technique.
Supports slider resolution greater than physical pitch through interpolation.
Shield electrode provided for reliable operation with high parasitic capacitance and/or in the presence of water film.
Guided sensor and pin assignments using the CSD Wizard.
The CY8C20045 family does not support sliders.

User Module Datasheet:Incremental ADC Datasheet ADCINC V 1.20 (CY8C29xxx, CY8C24x94, CY8C23x33, CY7C64215, CY8CLED04/08/16, CY8CLED0xD, CY8CLED0xG, CY8CTST120, CY8CTMG120, CY8CTMA120, CY8C28x45, CY8C28x43, CY8C28x52, CY8CPLC20, CY8CLED16P01, CY8C27/24/22xxx, CY8CLED08)

Wed, 07 Nov 2012 06:19:55 -0600

Features and Overview

6 to 14-bit resolution
Optional synchronous 8-bit PWM output
Optional differential Input
Signed or unsigned data format
Sample rate up to 15.6 ksps (6-bit resolution)
Input range defined by internal and external reference options
Internal or external clock

Note: If this user module is used with the 29K family, it consumes an extra 6 mA. As an alternative, use the ADCINCVR user module.

The ADCINC is a differential or single input ADC that returns a 6 to 14 bit result. The maximum DataClock frequency is 8 MHz, but 2 MHz is the maximum frequency recommended for improved linearity. This ADC may only be placed one time, due to its implementation which uses the hardware decimator rather than a digital block. This is the most resource efficient ADC. A 2nd order modulator may be implemented with an additional switch-capacitor block, allowing better linearity with an 8 MHz DataClock.

Working With inf File of a Device Using CyUSB.sys - AN61465

Wed, 07 Nov 2012 03:20:35 -0600

The content of Working With inf File of a Device Using CyUSB.sys - AN61465 is now available with the Cypress CyUsb3.sys Programmer's Reference document available at http://www.cypress.com/?rID=57990

CY3686 EZ-USB NX2LP-Flex™ USB 2.0 Development Kit

Tue, 06 Nov 2012 23:45:08 -0600

CY3686 EZ-USB NX2LP-Flex Development Kit

The CY3686 EZ-USB NX2LP-Flex(TM) USB 2.0 Development Kit is designed to accelerate your development of a NAND flash based USB 2.0 application featuring industry's first and only programmable USB 2.0 NAND controller (CY7C68033 and CY7C68034). Design a feature-rich thumbdrive with fingerprint sensor or GPS or add NAND storage to your DVB card. NX2LP-flex eliminates the need of EEPROMs in your firmware based designs!

The combination of revolutionary hardware and programming utility software provides the designer with complete development and manufacturing support. This development kit allows scalable testing and evaluation of the Cypress EZ-USB NX2LP-Flex NAND Flash Controller device (CY7C68033 and CY7C68034) with different NAND flash devices. The hardware platform is designed to support between 1-8 single-device NAND flash chips, or 1-4 dual-device NAND flash chips for scalable density testing.

Additionally, Cypress includes a Device Programming Utility to assist in the manufacturing environment. This programming utility allows easy NAND flash configuration during the design and manufacturing process. Use NX2LP-Flex Release Notes.pdf as your starting point.

Kit Contents

This kit includes the following items:

EZ-USB NX2LP-Flex DVK Platform Board
EZ-USB FX2LP Base Board
Prototyping Board
EZ-USB NX2LP-Flex DVK CD-ROM - CD-ROM provides kit documentation, hardware schematics and bills of materials, development tools, and Manufacturing programming tools (see CD-ROM Contents below)
USB Cable - USB type A-to-type B cable connects the USB host PC to the DVK board
Documentation Packet - Contains welcome letter and selected documentation

Software Contents

Firmware Source and Object Code (supports 512, 2K and 4K page sized NAND devices)
Manufacturing Tools
GPIF_Designer Tool

Documentation Contents

EZ-USB NX2LP-Flex Customer Welcome Letter
EZ-USB NX2LP-Flex Development Kit User's Guide
EZ-USB NX2LP-Flex Firmware Design Notes
EZ-USB NX2LP-Flex Datasheet
EZ-USB FX2LP Datasheet
EZ-USB FX2LP-DVK User's Guide
USB Mass Storage Test Guide

Note: MfgTool_Directory_Update_Nov_2012.zip contains following updates

CY3686 Firmware fix for Toshiba 2K SLC NAND parts (TC58NVG0S3ETA00, TC58DVG02D5TA00).
Added new SLC part-Spansion -S34ML01G1 to the compatibility list.

Refer Readme.txt for more details.

AN74505 - EZ-USB® FX2LP™ - Developing USB Application on MAC OS X using LIBUSB

Mon, 05 Nov 2012 03:38:54 -0600

Introduction

AN74505 describes a host application built on the MAC OS platform that uses libusb. The host application (Cocoa Application) communicates with the BULK IN and BULK OUT endpoints of FX2LP, using the interfaces provided by the APIs of libusb. This host application implements the transfer only with devices that pass the particular VID/PID(=0x04B4/0x1004) identification.

Cypress also provides a Cypress SuperSpeed Suite for MacOS platforms, which includes a Cypress API wrapper based on LibUSB. The Wrapper library for MacOS can be downloaded from this link http://www.cypress.com/?rID=57990

RESERVED Pin of FX2/FX2LP - KBA83346

Tue, 30 Oct 2012 02:48:46 -0600

Answer: The RESERVED pin of FX2/FX2LP USB device is used for internal testing and verification, and should be connected to GND in the design.

Gerber Files of CY3684 FX2LP Development Kit – KBA83343

Tue, 30 Oct 2012 02:46:26 -0600

Answer: The Gerber files can be found in the link CY3684 EZ-USB FX2LP Development Kit in the zip file PDC-9086-A.zip.

QTP 044504: (CY7C65620/CY7C65630) HX1TT Device Family, C8Q-3R Technology, Fab4

Thu, 25 Oct 2012 05:40:45 -0600

Can AT2LP be used for SATA Drives - KBA83342

Thu, 25 Oct 2012 00:42:09 -0600

Answer: No, AT2LP cannot be used for SATA drives. It only supports PATA drives. The PATA interface on AT2LP enables the use of hard disk drives (HDD), Compact Flash, and solid state drives (SSD) in your design.

User Module Datasheet: Shadow Registers Datasheet ShadowRegs V 1.1 (CY8C20x34/36, CY8C21x12, CY8C29/27/24/22/21xxx, CY8C20336AN/436AN/636AN, CY8C20xx6AS, CY8C20XX6L, CY8C20x46/96, CY8C20045/55, CY7C64215/343, CY7C60413, CY7C603xx, CY8CLED02/04/08/16, CY8CLED0xD/G, CY8CTST110/120/200, CY8CTMG110/120, CY8CTMG2xx, CY8CTMA120/30xx, CY8C28x45, CY8CPLC20, CY8CLED16P01, CYONS2010/11, CYONSFN2051/53/61, CYONSFN2151/61/62, CYONSFN2010-BFXC, CYONSCN2024-BFXC, CYONSCN2028-BFXC, CYONSCN2020-BFXC)

Tue, 23 Oct 2012 06:43:00 -0600

Features and Overview

Provides a global shadow register for a selected port data register
Generates a set of macros for port pin manipulation
Prevents corruption of GPIO pin settings during CPU control of GPIO
Cooperates with other user modules that allocate shadow registers.

The ShadowRegs user module creates a RAM variable (the shadow register) that caches values written to a port data register (PRTxDR). Using a shadow register enables CPU control of an individual GPIO output pin without the risk of corrupting the settings of other GPIO pins sharing the same port.

User Module Datasheet: Delta Sigma ADC Datasheet DelSig V 1.40 (CY8C29xxx, CYC8C24x94, CY7C64215, CY8CLED04/16, CY8CLED0xD, CY8CLED0xG, CY8CTST120, CY8CTMG120, CY8CTMA120, CY8C28x45, CY8CPLC20, CY8CLED16P01, CY8C28x43, CY8C28x52)

Tue, 23 Oct 2012 01:24:16 -0600

Features and Overview

6-bit resolution with 32X oversampling to 14-bit resolution with 256X oversampling
Data in unsigned or signed 2’s complement formats
Maximum sample rates of 65,500 sps at 6 bit resolution, 7812 sps at 14-bit resolution
Sinc² filter fully implemented in hardware reduces CPU overhead and anti-alias requirements
1st-Order or 2nd-Order modulator, user selectable
Input range defined by internal and external reference options
Optional synchronized PWM Output

The DelSig is an integrating converter, requiring from 32 to 256 integration cycles to generate a single output sample. Changing multiplexed inputs, invalidates the first two samples following the change.

User Module Datasheet: I2C Hardware Block Datasheet I2CHWV 1.90 (CY8C29/27/24/22/21xxx, CY8C23x33, CY7C603xx, CY7C64215, CYWUSB6953, CY8CLED02/04/08/16, CY8CLED0xD, CY8CLED0xG, CY8CTST110, CY8CTMG110, CY8CTST120, CY8CTMG120, CY8CTMA120, CY8C21x45, CY8C22x45, CY8C28x45, CY8CPLC20, CY8CLED16P01, CY8C28xxx, CY8C21x12)

Tue, 23 Oct 2012 01:09:53 -0600

Features and Overview

Industry standard Philips I2C bus compatible interface
Master and Slave operation, Multi Master capable
Only two pins (SDA and SCL) required to interface to I2C bus
Standard data rate of 100/400 kbps, also supports 50 kbps
High level API requires minimal user programming
7-bit addressing mode

The I2C Hardware User Module implements an I2C device in firmware. The I2C bus is an industry standard, two-wire hardware interface developed by Philips®. The master initiates all communication on the I2C bus and supplies the clock for all slave devices. The I2CHW User Module supports the standard mode with speeds up to 400 kbps. No digital or analog user blocks are consumed with this module. The I2CHW User Module is compatible with other slave devices on the same bus.

User Module Datasheet: 8-Bit Timer Datasheet, Timer8 V 2.70 (CY8C29/27/24/22/21xxx, CY8C23x33, CYWUSB6953, CY7C64215, CY8CLED02/04/08/16, CY8CLED0xD, CY8CLED0xG, CY8CTST110, CY8CTMG110, CY8CTST120, CY8CTMG120, CY8CTMA120, CY8CTMA140, CY8C21x45, CY8CTMA30xx, CY8C28x45, CY8CPLC20, CY8CLED16P01, CY8C28xxx, CY8C21x12)

Tue, 23 Oct 2012 00:49:42 -0600

Features and Overview

8-bit general purpose timer uses one PSoC block
Source clock rates up to 48 MHz
Automatic reload of period on terminal count
Capture for clocks up to 24 MHz
Terminal count output pulse may be used as input clock for other analog and digital functions
Interrupt option on terminal count, capture (on some devices), or when counter reaches a preset value

The 8-Bit Timer User Modules provides a down counter with programmable period and capture ability. The clock and enable signals can be selected from any system time base or external source. Once started, the timer operates continuously and reloads its internal value from the period register upon reaching terminal count. The output pulses high in the clock cycle following terminal count. Events can capture the current Timer count value by asserting the edge-sensitive capture input signal. Each clock cycle, the Timer tests the count against the value of the compare register for either a “Less Than" or “Less Than or Equal To" condition. Interrupts may be generated based on terminal count and compare signals. Some device families offer two additional features. The interrupt options include “interrupt on capture" and, in addition, the compare signal may be routed onto the row buses. If these options are available on your chosen device they will be shown in the Device Editor.

User Module Datasheet: 16-Bit Timer Datasheet Timer16 V 2.6 (CY8C29/27/24/22/21xxx, CY8C23x33, CYWUSB6953, CY7C64215, CY8CLED02/04/08/16, CY8CLED0xD, CY8CLED0xG, CY8CTST110, CY8CTMG110, CY8CTST120, CY8CTMG120, CY8CTMA120, CY8CTMA140, CY8C21x45, CY8CTMA30xx, CY8C28x45, CY8CPLC20, CY8CLED16P01, CY8C28xxx)

Mon, 22 Oct 2012 21:35:26 -0600

Features and Overview

16-bit general purpose timer uses two PSoC blocks
Source clock rates up to 48 MHz
Automatic reload of period on terminal count
Capture for clocks up to 24 MHz
Terminal count output pulse may be used as input clock for other analog and digital functions
Interrupt option on terminal count, capture (on some devices), or when counter reaches a preset value

The 16-bit Timer User Modules provides a down counter with programmable period and capture ability. The clock and enable signals can be selected from any system time base or external source. Once started, the timer operates continuously and reloads its internal value from the period register upon reaching terminal count. The output pulses high in the clock cycle following terminal count. Events can capture the current Timer count value by asserting the edge-sensitive capture input signal. Each clock cycle, the Timer tests the count against the value of the compare register for either a “Less Than" or “Less Than or Equal To" condition. Interrupts may be generated based on terminal count and compare signals. Some device families offer two additional features. The interrupt options include “interrupt on capture" and, in addition, the compare signal may be routed onto the row buses. If these options are available on your chosen device they will be shown in the Device Editor.

User Module Datasheet: 24-Bit Timer Datasheet, Timer24 V 2.6 (CY8C29/27/24/22/21xxx, CY8C23x33, CYWUSB6953, CY7C64215, CY8CLED02/04/08/16, CY8CLED0xD, CY8CLED0xG, CY8CTST110, CY8CTMG110, CY8CTST120, CY8CTMG120, CY8CTMA120, CY8CTMA140, CY8C21x45, CY8CTMA30xx, CY8C28x45, CY8CPLC20, CY8CLED16P01, CY8C28xxx)

Mon, 22 Oct 2012 21:28:00 -0600

Features and Overview

24-bit general purpose timer three PSoC blocks
Source clock rates up to 48 MHz
Automatic reload of period on terminal count
Capture for clocks up to 24 MHz
Terminal count output pulse may be used as input clock for other analog and digital functions
Interrupt option on terminal count, capture (on some devices), or when counter reaches a preset value

The 24-bit Timer User Module provides a down counter with programmable period and capture ability. The clock and enable signals can be selected from any system time base or external source. Once started, the timer operates continuously and reloads its internal value from the period register upon reaching terminal count. The output pulses high in the clock cycle following terminal count. Events can capture the current Timer count value by asserting the edge-sensitive capture input signal. Each clock cycle, the Timer tests the count against the value of the compare register for either a “Less Than" or “Less Than or Equal To" condition. Interrupts may be generated based on terminal count and compare signals. Some device families offer two additional features. The interrupt options include “interrupt on capture" and, in addition, the compare signal may be routed onto the row buses. If these options are available on your chosen device they will be shown in the Device Editor.

User Module Datasheet: 32-Bit Timer Datasheet Timer32 V 2.6 (CY8C29/27/24/22/21xxx, CY8C23x33, CYWUSB6953, CY7C64215, CY8CLED02/04/08/16, CY8CLED0xD, CY8CLED0xG, CY8CTST110, CY8CTMG110, CY8CTST120, CY8CTMG120, CY8CTMA120, CY8CTMA140, CY8C21x45, CY8CTMA30xx, CY8C28x45, CY8CPLC20, CY8CLED16P01, CY8C28xxx)

Mon, 22 Oct 2012 21:20:42 -0600

Features and Overview

32-bit general purpose timer uses four PSoC blocks
Source clock rates up to 48 MHz
Automatic reload of period on terminal count
Capture for clocks up to 24 MHz.
Terminal count output pulse may be used as input clock for other analog and digital functions
Interrupt option on terminal count, capture (on some devices), or when counter reaches a preset value

The 32-bit Timer User Module provides a down counter with programmable period and capture ability. The clock and enable signals can be selected from any system time base or external source. Once started, the timer operates continuously and reloads its internal value from the period register upon reaching terminal count. The output pulses high in the clock cycle following terminal count. Events can capture the current Timer count value by asserting the edge-sensitive capture input signal. Each clock cycle, the Timer tests the count against the value of the compare register for either a “Less Than" or “Less Than or Equal To" condition. Interrupts may be generated based on terminal count and compare signals. Some device families offer two additional features. The interrupt options include “interrupt on capture" and, in addition, the compare signal may be routed onto the row buses. If these options are available on your chosen device they will be shown in the Device Editor.

User Module Datasheet: USBFS Bootloader Datasheet BootLdrUSBFS V 1.60 (CY8C24x94, CY8CLED04, CY7C64215, CY8C20x66, CY8C20x36, CY8C20x46, CY8C20x96, CY8C20xx6AS, CY8C20XX6L, CY7C643xx, CYONS2000, CYONS2110, CY8CTST120, CY8CTMG120, CY8CTMA120, CY8CTST200, CY8CTMG2xx)

Mon, 22 Oct 2012 21:14:46 -0600

Features and Overview

Flexible memory map
Device reprogramming without engineering tools
Product resident reprogramability
Communication interface integrated to minimize code overhead
Field deployment of firmware upgrades
USB Full Speed device interface driver
Support for interrupt and control transfer types
Setup wizard for easy and accurate descriptor generation
Runtime support for descriptor set selection
Optional USB string descriptors
Optional USB HID class support

The USB bootloader supports a fully functional device reprogramming ability with built in error detection and an industry standard communication interface.

Multiple USB device descriptors are coresident in the system to allow commanding a running device to self reconfigure and reprogram. Core USB functions are maintained during the reconfiguration to support host communication, while program data is being transferred and stored. At the end of the reconfiguration process the device resets itself, verifies the new program, and automatically executes it.

User Module Datasheet: USBFS Bootloader Datasheet BootLdrUSBFSe V 1.40 (CY7C64215, CY8C24794, CY8C24894-24LTXI, CY8C24994, CY8CLED04, CY8CTMA120-100BVXI, CY8CTMA120-56LFXI, CY8CTMA120-56LTXI, CY8CTMG120-56LFXI, CY8CTMG120-56LTXI, CY8CTST120, CYRF89235)

Mon, 22 Oct 2012 21:02:09 -0600

Features and Overview

Flexible memory map
Device reprogramming without engineering tools
Product resident reprogramability
Communication interface integrated to minimize code overhead
Field deployment of firmware upgrades
USB Full Speed device interface driver
Support for interrupt and control transfer types
Setup wizard for easy and accurate descriptor generation
Runtime support for descriptor set selection
Optional USB string descriptors
Optional USB HID class support
Optional USB-UART (CDC) class support

The USB Bootloader User Module implements a bootloader that can reprogram the PSoC device over the USB interface. The PSoC device already gives an in-system serial programming interface (ISSP) that allows downloading new code into the device. However, the bootloader allows a code update to occur through an industry standard communication interface, such as USB. This User Module can be useful for any device that has to be reprogrammed in the field. The bootloading information can be sent through a Cypress USB Bootloader Host interface.

User Module Datasheet: I2C Bootloader Datasheet BootLdrI2C V 2.50 (CY7C604xx, CY7C643xx, CY8C20xx6/A/AN/AS/L/H, CY8C20xx7/S, CY8CTST200, CY8CTMG200, CY8CTMA300, CYONS2xxx, CYONSCN2xxx, CYONSFN2xxx, CYONSKN2xxx, CYONSTB2xxx, CYONSTN2xxx, CYRF89x35)

Mon, 22 Oct 2012 20:54:46 -0600

Features and Overview

Industry standard Philips I2C bus compatible interface.
Enables you to reprogram a PSoC device using the I2C system bus instead of in-system programming pins.

The I2C Bootloader User Module implements a bootloader that can reprogram the PSoC device over the I2C interface. The PSoC device already gives an in-system serial programming interface (ISSP) that allows downloading new code into the device. However, the bootloader allows a code update to occur through an industry standard communication interface, such as I2C.

User Module Datasheet: 32-Bit Counter Datasheet Counter32 V 2.5 (CY8C29/27/24/22/21xxx, CY8C23x33, CYWUSB6953, CY7C64215, CY8CLED02/04/08/16, CY8CLED0xD, CY8CLED0xG, CY8CTST110, CY8CTMG110, CY8CTST120, CY8CTMG120, CY8CTMA120, CY8CTMA140, CY8C21x45, CY8C22x45, CY8CTMA30xx, CY8C28x45, CY8CPLC20, CY8CLED16P01)

Mon, 22 Oct 2012 06:54:08 -0600

Features and Overview

The 32-bit general purpose counter uses four PSoC blocks
Source clock rates up to 48 MHz
Automatic reload of period on terminal count
Programmable pulse width
Input enables/disables continuous counter operation
Interrupt option on compare output or terminal count

The 32-bit Counter User Module provides a down counter with a programmable period and pulse width. The clock and enable signals can be selected from any system time base or external source. Once started, the counter operates continuously and reloads its internal value from the period register upon reaching terminal count. During each clock cycle, the counter compares the current count to the value stored in the compare register. Each clock cycle, the Counter tests the count against the value of the compare register for either a “less than" or “less than or equal to" condition. The comparator output provides a logic level that may be routed to pins and to other user modules.

User Module Datasheet: 8-Bit Counter Datasheet Counter8 V 2.60 (CY8C29/27/24/22/21xxx, CY8C23x33, CYWUSB6953, CY7C64215, CY8CLED02/04/08/16, CY8CLED0xD, CY8CLED0xG, CY8CTST110, CY8CTMG110, CY8CTST120, CY8CTMG120, CY8CTMA120, CY8CTMA140, CY8C21x45, CY8C22x45, CY8CTMA30xx, CY8C28x45, CY8CPLC20, CY8CLED16P01, CY8C21x12)

Mon, 22 Oct 2012 06:41:09 -0600

Features and Overview

The 8-bit general purpose counter uses one PSoC block
Source clock rates up to 48 MHz
Automatic reload of period on terminal count
Programmable pulse width
Input enables/disables continuous counter operation
Interrupt option on compare output or terminal count

The 8-Bit Counter User Module provides a down counter with a programmable period and pulse width. The clock and enable signals can be selected from any system time base or external source. Once started, the counter operates continuously and reloads its internal value from the period register upon reaching terminal count. During each clock cycle, the counter compares the current count to the value stored in the compare register. Each clock cycle, the Counter tests the count against the value of the compare register for either a “less than" or “less than or equal to" condition. The comparator output provides a logic level that may be routed to pins and to other user modules. Most PSoC device families also permit the terminal count output to be routed in the same manner.

User Module Datasheet: SleepTimer Datasheet SleepTimer V 1.0 (CY8C29/27/24/22/21/20xxx, CY8C23x33, CY8CLED02/04/08/16, CY7C64215, CY7C64343, CY7C60413, CY8CLED0xD, CY8CLED0xG, CY8CTST110, CY8CTMG110, CY8CTST120, CY8CTMG120, CY8CTMA120, CY8CTMA140, CY8CTST200, CY8CTMG2xx, CY8C21x45, CY8C22x45, CY8CTMA30xx, CY8C28x45, Y8CPLC20, CY8CLED16P01, CY8C20336AN, CY8C20436AN, CY8C20636AN, CY8C20xx6AS, CY8C20XX6L, CY8C21x12, CY8C20xx7/7S, CYRF89x35, CY8C20045, CY8C20055)

Mon, 22 Oct 2012 05:04:12 -0600

Features and Overview

Does not require digital blocks
Selectable 8, 16, or 32-bit tick counter
Three types of timer functions.

The SleepTimer User Module provides basic timing functions without the use of valuable digital blocks. This user modules makes use of the standard sleep timer to create a variety of timing functions that are often useful in a project.

Catergory	Family	Kit Part number	Description
SuperSpeed Peripheral	EZ-USB FX3	CYUSB3KIT-001	Development kit for EZ-USB® FX3™
High Speed Peripheral	West Bridge™ Astoria/Antioch	CYWBDVK002AB	Development Kit for High Speed Multimedia Mass Storage Peripheral Controller
	EZ-USB FX2LP	CY3684	Development kit for the EZ-USB FX2LP™
	MoBL-USB FX2LP18	CY3687	Development kit for the MoBL-USB FX2LP18™
	EZ-USB AT2LP	CY4615B	Development Kit for Hi-speed USB 2.0-to-ATA/ATAPI Bus-Powered
	EZ-USB FX2LP to ATA	CY4611B	Development Kit for USB 2.0 USB to ATA
	EZ-USB NX2LP-Flex	CY3686	Development Kit for NAND flash based USB 2.0 application
Full-Speed Peripheral	EZ-USB FX1	CY3674	Development kit for the EZ-USB FX1
	enCoRe™ V	CY3660	Development kit for WirelessUSB-LP radio and enCoRe V / LV MCU devices
	enCoRe™ V	CY3668	Development kit for WirelessUSB-NL radio and enCoRe II & enCoRe V MCU devices
	enCoRe™ III	CY3664-EXT	Development Kit for enCoRe III
Low Speed Peripheral	enCoRe™ II	CY3655-EXT	Development kit for enCoRe II and Wireless enCoRe II
Low Speed Peripheral	enCoRe™ II	CY3668	Development kit for WirelessUSB-NL radio and enCoRe II & enCoRe V MCU devices
USB Transceivers	MoBL-USB™ TX2UL	CY3688	Development kit for USB PHY with support for both High-Speed and Full-Speed
Wireless/RF	CyFi™ Low-Power RF	CY3271-EXP1	Expansion kit for CY3271 PSoC FirstTouch Starter Kit
	CyFi™ Low-Power RF	CY3271-RFBOARD Wireless Expansion Kit	Expansion kit for CY3271 PSoC FirstTouch Starter Kit
	WirelessUSB™-LP	CY3660	Development kit for WirelessUSB-LP radio and enCoRe V / LV MCU devices
	WirelessUSB™-NL	CY3668	Development kit for WirelessUSB-NL radio and enCoRe II & enCoRe V MCU devices

Catergory	Family	Kit Part number	Description
High Speed Hubs	HX2	CY4602	High-Speed USB 2.0 Compliant 4-Port Hub
	HX2LP	CY4605	High-Speed Low-Power USB 2.0 Compliant 2-Port Hub
	HX2LP	CY4606	High-Speed Low-Power USB 2.0 Compliant 4-Port Hub
	HX2VL	CY4607	High-Speed Very Low-Power USB 2.0 Compliant 4-Port STT Hub with 48-pin TQFP package
		CY4607M	High-Speed Very Low-Power USB 2.0 Compliant 4-Port MTT Hub with 48-pin TQFP package
		CY4608	High-Speed Very Low-Power USB 2.0 Compliant 4-Port STT Hub with 28-pin QFN package
		CY4608M	High-Speed Very Low-Power USB 2.0 Compliant 4-Port MTT Hub with 28-pin QFN package
Low Speed Peripheral	enCoRe™ II	CY4623	Wired Mouse Reference Design Kit
Wireless/RF	PRoC LP	CY4672	Wireless keyboard, mouse, and USB bridge Reference Design Kit
Wireless/RF	WirelessUSB™-LP	CY4638	WirelessUSB LP VoIP Demo Kit

Catergory	Family	Kit Part number	Description
Wireless/RF	CyFi™ Low-Power RF	CY3271 PSoC FirstTouch Starter Kit	PSoC® FirstTouch™ Starter Kit with CYFi™ Low-Power RF

Catergory	Family	Kit Part number	Description
Programmers	enCoRe™ V enCoRe™ III enCoRe™ II	CY3217-MiniProg1	Programming tool for all enCoRe II, enCoRe III & enCoRe V devices
		CY8CKIT-002 PSoC® MiniProg3 Program and Debug Kit	Programming tool for all enCoRe II, enCoRe III & enCoRe V devices
		CY3655-PLG	5-Pin to USB adapter for programming enCoRe II and enCoRe III devices

Catergory	Family	Kit Part number	Description
Low/Full Speed Peripheral	enCoRe™ V enCoRe™ III enCoRe™ II	CY3215-DK In-Circuit Emulation Development Kit	Debug tool for all enCoRe II, enCoRe III & enCoRe V devices
Wireless/RF	WirelessUSB™-LP	CY3631 WirelessUSB(TM) Manufacturing Test Kit	Automated platform to quickly test WirelessUSB-LP products