Refer to Getting Started with CapSense for more information on how to use springs as CapSense sensors.

Features

• XRES pin to support in-system serial programming (ISSP) and external reset control in CY8C24894
• Powerful Harvard-architecture processor
• Advanced peripherals (PSoC® Blocks)
• Full speed USB (12 Mbps)
• Flexible on-chip memory
• Programmable pin configurations
• Precision, programmable clocking
• Additional system resources
• For more, see pdf

PSoC Functional Overview

The PSoC family consists of many devices with on-chip controllers. These devices are designed to replace multiple traditional MCU-based system components with one low-cost single-chip programmable component. A PSoC device includes configurable blocks of analog and digital logic, and programmable interconnect. This architecture makes it possible for you to create customized peripheral configurations, to match the requirements of each individual application.

PSoC Programmer 3.18 offers the user a simple GUI that connects to programming hardware to program and configure PSoC, Clock, and configurable fixed function devices. Also provided with PSoC Programmer is the Bridge Control Panel, which can be used to debug, graph and log I2C serial communications using various supported Cypress Software. PSoC Programmer also provides a hardware layer for customers to design custom applications or use existing code examples for testing hardware and Firmware designs.

PSoC Programmer 3.18 release shall support both PSoC Creator and PSoC Designer in a single installation.

PSoC Programmer 3.18 is a minor release. For additional information regarding the installation and the new features please see the release notes in the downloads table below.

PSoC Programmer:

PSoC Programmer is a flexible, integrated programming application for programming PSoC devices. PSoC Programmer can be used with PSoC Designer and PSoC Creator to program any design onto a PSoC device. PSoC Programmer supports all PSoC 1, PSoC 3 and PSoC 5LP devices.

Supported PC Operating Systems:

PSoC Programmer currently supports the following windows operating systems:

• Windows XP (32/64 bit)
• Windows Vista (32/64 bit)
• Windows 7 (32/64 bit)

PSoC Programmer does not support installations on Windows 8 machines. We will be adding Windows 8 support by August of 2013.

COM Hardware Layer Supported Languages:

PSoC Programmer provides the user a hardware layer with API’s to design specific applications utilizing the programmers and bridge devices. The PSoC Programmer hardware layer is fully detailed in the COM guide documentation as well as example code across the following languages: C#, C, Perl, and Python.

PSoC Programmer Secondary Software

PSoC Programmer includes additional software beyond just PSoC Programmer. For more information on that additional software please: Click Here

Third Party IDE and Programming Support

PSoC Programmer delivers a number of files and utilities that enable 3^rd party programming and debugging support for PSoC device families. In the downloads table below we include the 3^rd party user guide which will assists the user in configuring and enabling the support in the IDEs or programming utilities. The files and applications can be found in the root installation directory for each programmer installation.

Archived Software:

PSoC Programmer software is archived at the following page: Click Here

Additional Programming Links:
Prototype Programming Hardware:

PSoC Programmer is part of a suite of programming options and programming content available to PSoC users. For customers who are looking for more information on general programming options and information please navigate to the web page linked below. On the General Programming web page we discuss all of the available programming options for customers including Software, Schematics, Programming Specifications, and 3rd party mass programming.

www.cypress.com/go/programming

All PDF documents require at least a PDF reader installed prior to opening.

• Full byte-oriented EEPROM emulation
• Abstracts block-oriented Flash architecture
• Efficient use of memory

This code example incorporates CapSense Sigma Delta (CSD) and I2CHW modules to send the CapSense data to the I2C master. The CapSense module scans all the buttons continuously and stores the raw count, difference count, and baseline details in a structure defined by MyI2CRegs.

Response: When the Rb and Cmod is breakdown then there are 4 possibilities which can be detected with the help of supervisory code. The 4 possibilities are as follows:

1. Cmod Short: In this particular case the counts will be zero because it'll connect the input of the CapSense module directly to ground. Thus, supervisory code will be able to detect that the Cmod has been shorted.

Also, in this particular case, no matter whether the sensor was active or not, the rawcounts and baseline will snap down to 0 and the sensor will be turned OFF. The counts will be zero irrespective of the state of Rb (open/shorted/normal).

2. Cmod Open: If CMOD is open device continues to operate at higher level of noise. If your application uses thin overlay and has strong touch signal this could be painless. If touch signal is weak then you could encounter false buttons activation in this case.

3. Rb Shorted: If Rb is shorted device continues to operate at higher level of noise. If your application uses thin overlay and has strong touch signal this could be painless. If touch signal is weak you could encounter false buttons activation in this case.

Also, In this particular case the raw counts will decrease and the baseline will follow this because of its negative baseline reset.

4. Rb Open: If Rb is open counts will get saturated and the counts will be 2^Resolution -1. If resolution is set as 12 then the counts will be 4095 irrespective of Cmod open/normal. You can easily detect this as well from you supervisory code.
 

Answer: You can use supervisory code to detect if Rb or Cmod are damaged by monitoring them for shorts or opens. The four possible failure modes are:

Cmod Shorted: If this is the case, the input of the CapSense module will be connected directly to ground. Whether the sensor is active or not, the raw counts and baseline will snap down to zero and the sensor will be turned OFF. The counts will be zero irrespective of the state of Rb (open/shorted/normal).

Cmod Open: If this is the case, the device will continue to operate with a higher level of noise. If your application uses a thin overlay and has a strong touch signal this may not cause a problem. However, if the touch signal is weak in your application, you could encounter false button activations.

Rb Shorted: If this is the case, the device will continue to operate with a higher level of noise. The raw counts will decrease and the baseline will follow because of its negative baseline reset. If your application uses a thin overlay and has a strong touch signal this may not cause a problem. However, if the touch signal is weak in your application, you could encounter false button activations.

Rb Open: If this is the case, the raw counts will saturate at 2^{(Resolution -1)}. For example, if the resolution is 12, raw counts will be 4095 even if Cmod if open.

Refer to the Register Reference Guide for more information on these registers.

The difference count is calculated by subtracting the raw count without a finger on the sensor (C_S = C_P) from the raw count with a finger present on the sensor (C_S = C_P + C_F):

By substituting the equation for raw counts you can see the linear relationship between difference counts and finger capacitance:

Note: This linear relationship holds true as long as raw counts do not saturate and assumes that the sensors are fully charged and discharged to VDD and Vref respectively within 1/f_{s max}. If PRS is selected as the clock source, the average switching frequency is f_IMO/4 but the maximum switching frequency is f_IMO/2.

For best results, ensure that the voltage remains in one of the three operating ranges. Additionally, at 2.4 VDC the CapSense scanning functions operate at a slower frequency and response time decreases by a factor of 4.

For more details please refer to Application Note AN53490.

Answer: CapSense Express devices are designed to operate at one of three voltage ranges: 2.4 - 2.9 VDC, 3.1 - 3.6 VDC, or 4.75 - 5.25 VDC. CapSense Express devices are not designed to operate continuously over the full range of 5.25 - 2.4 VDC. This is important to know if your application is battery powered and the operating voltage may gradually decrease as the battery gradually discharges. When the operating voltage is not in the initial operating range the device will still communicate over the I2C bus but the CapSense functionality will not work. Once the device returns to the initial operating range the CapSense functionality will start again but the sensing capability may be impaired unless the system is enabled to recalibrate itself with a reset.

For best results, ensure that the voltage remains in one of the three operating ranges. Additionally, at 2.4 VDC the CapSense scanning functions operate at a slower frequency and response time decreases by a factor of 4.

Answer: There is no specific maximum value for overlay thickness. You should select the overlay material and thickness depending on the following factors:

• The sensitivity of your CapSense system is directly proportional to the overlay material and thickness.

C_finger = (ε_o ε_r A)/D

where:

ε_o = free space permittivity
ε_r = dielectric constant of overlay
A = area of finger and sensor pad overlay
D = overlay thickness

• A thicker overlay lowers finger capacitance, which in turn lowers finger response. A thicker overlay can also increase parasitic capacitance. However, the overlay must be thick enough to prevent breakdown during an ESD event. Remember that you can increase finger response by increasing button size to compensate for thicker overlays. The following table gives the minimum overlay thickness for different materials.

For further details, refer to the Capsense Getting Started guide.

The recommended minimum SNR is 5:1. A typical SNR is between 10:1 and 20:1 when finger capacitance is 0.1pF. The actual SNR depends on your project settings, especially scan time and sensitivity. You can increase the SNR by reducing the scan speed but this results in increased power consumption.

Cypress’s PSoC microcontrollers are easy-to-use, flexible, and have a cost-effective mix of reprogrammable analog and digital resources. These features provide many  opportunities for creative designs, one of which is programming the PSoC serially by an on-board host processor. This method is used to install or update firmware in-field or even completely reprogram the PSoC for a different function.

This document helps you to select the proper tool for CapSense sensor data viewing and logging. The two supported communication interfaces are I2C and UART. You should be familiar with CapSense sensing technology before you read this document.

This reference manual provides the information developers and programmer vendors need to create their own in-system programming solutions for CY8C20045, CY8C20055, CY8C20xx6A, and CY8C20xx7 devices. The following topics are covered in this document:

• Information on how to interface a host programmer with CY8C20045, CY8C20055, CY8C20xx6A, and CY8C20xx7 devices
• Description of the ISSP protocol
• AC/DC programming specifications
• Programming vectors
• Introduction to the Intel hex file format

This document is a technical reference manual for all PSoCs with a base part number of CY8C2xxxx, except for the CY8C25122 and CY8C26xxx PSoC devices. It also applies to CY7C64215, CY7C603xx,CY8CNP1xx, and CYWUSB6953.

Sample_PSoC_DesignerProject_Configure_CY8CMBR2110.zip contains a sample project to configure the CY8CMBR2110 device using CY8C29466-24PXI (PSoC) as host processor. This code is implemented with PSoC designer 5.2 and ImageCraft compiler in CY3210-PSoC-EVAL1-kit.This sample project will give a basic idea of how to use Host control APIs for configuring CY8CMBR2110 device

Coming Soon

EZ-Click 1.0 is a simple yet revolutionary customizer tool (GUI) that enables additional design flexibility with device configuration, visual feedback and production line testing within a single tool for the latest, register configurable MBR devices, CY8CMBR2110 thereby accelerating time-to-market .

This tool currently supports CY8CMBR2110 (10 button/GPO)enabling register configurability of advanced features such as customizable LED effects and buzzer for audio feedback. The CY8CMBR2xxx family leverages Cypress’s revolutionary SmartSense™ Auto-tuning algorithm, and eliminates the requirement for system tuning. The EZ-Click tool maintains the CapSense Express value, eliminating the need for large software tools, firmware configuration, device programming or system tuning.
 

SAN JOSE, Calif., February 26, 2013 – Cypress Semiconductor Corp. (NASDAQ: CY) today announced its TrueTouch® and CapSense® controllers drive the capacitive touchscreen, buttons and sliders in the new 2013 Toyota Avalon. The TrueTouch-based 7-inch capacitive touchscreen delivers very clear images and highly responsive multi-touch performance for the navigation system and infotainment control. The stylish, simple-to-adjust IntelliTouch™ capacitive buttons and slider controls for the audio and climate control systems are based on CapSense. The touchscreen and CapSense controls replace a resistive touchscreen and mechanical buttons respectively, dramatically improving the look and functionality of the Avalon interior. The control systems were designed by global automotive supplier DENSO for Toyota Motor Corporation.

“DENSO and Toyota are world renown for unmatched quality,” said Hassane El-Khoury, executive vice president of the Programmable Systems Division at Cypress. “We are pleased that they have chosen to implement our leading touch technology inside the interior of the Avalon. We look forward to working on future projects as we establish Cypress as the world leader in capacitive touch solutions for the automotive market.”

“The engineers at DENSO and Toyota have delivered an elegant and innovative touch-based user interface working with our team in Japan,” said Kazuyoshi Yamada, Vice President of Japan Sales. “This is a testament to the excellent quality of Cypress’s automotive offerings.”

In addition to TrueTouch and CapSense solutions, Cypress offers USB and memory products for the automotive market. To learn more about Cypress’s automotive solutions, visit www.cypress.com/go/automotive.

About TrueTouch

Cypress’s TrueTouch technology provides the industry’s best noise immunity, highest signal to noise ratio (SNR), fastest refresh rates, lowest power consumption, and world’s best accuracy and linearity. The flexible TrueTouch solution allows customers to rapidly develop leading-edge solutions without having to buy turnkey modules. They have a choice of using touch sensors (glass or film) and LCDs from preferred partners, and can develop innovative mechanical designs ranging from flat to curved surfaces of varying thickness. Additional TrueTouch information is available at touch.cypress.com.

About CapSense

Cypress's CapSense touch-sensing solutions have replaced over 4 billion mechanical buttons in mobile handsets, laptops, consumer electronics, white goods, automotive applications, and virtually any system that has a mechanical button or switch, making Cypress the industry touch-sensing leader. The CapSense portfolio, the industry's broadest and most integrated, enhances industrial design and reliability with the most noise-immune and water tolerant capacitive touch-sensing interfaces, including proximity sensing where direct touch is not required. CapSense proximity sensing provides power savings by activating an interface only when needed while further enhancing industrial designs by only exposing interfaces when necessary. Learn more about CapSense online at www.cypress.com/go/capsense.

About Cypress

Cypress delivers high-performance, mixed-signal, programmable solutions that provide customers with rapid time-to-market and exceptional system value. Cypress offerings include the flagship PSoC® 1, PSoC 3, and PSoC 5 programmable system-on-chip families and derivatives, CapSense® touch sensing and TrueTouch® solutions for touchscreens. Cypress is the world leader in USB controllers, including the high-performance West Bridge® solution that enhances connectivity and performance in multimedia handsets, PCs and tablets. Cypress is also the world leader in SRAM memories. Cypress serves numerous markets including consumer, mobile handsets, computation, data communications, automotive, industrial and military. Cypress trades on the NASDAQ Global Select Market under the ticker symbol CY. Visit Cypress online at www.cypress.com.

# # #

Cypress, the Cypress logo, PSoC, TrueTouch, CapSense and West Bridge are registered trademarks of Cypress Semiconductor Corp. All other trademarks are property of their owners.

The ICE-Cube also serves as a single-site device programmer via an ISSP (In-System Serial Programming) Cable and MiniEval board included in the kit. The MiniEval board is a programming and evaluation board which connects to the ICE-Cube via an ISSP Cable and allows programming of DIP devices. There are also other Programming boards available for programming other packages. The MiniEval also includes LEDs and a POT for simple evaluation and demonstration.

PSoC 1 Debugger Includes:

• PSoC Designer Software CD-ROM
• ICE-Cube In-Circuit Emulator
• ICE Flex-Pod for CY8C29xxx Family
• Backward compatibility Cat-5 Adapter
• ISSP Cable
• Mini-Eval Programming Board in One
• USB 2.0 Cable and Blue Cat-5 Cable
• 110 ~ 240V Power Supply, Euro-Plug Adapter
• 2 CY8C29466-24PXI 28-PDIP Chip Samples

Supports following 8 bit PSoC1 (Programmable System-On Chip) families, including automotive, except CY8C25/26xxx devices.

PSoC 1 Getting Started Debugging - Part 1 - The Hardware

PSoC 1 Getting Started Debugging - Part 2 - The PSoC Designer

Software Title	Description	Link
PSoC Designer	This kit requires PSoC Designer for development
PSoC Programmer	This kit requires PSoC Programmer for programming

Related Resources:

• 16-bit general purpose pulse width modulator (PWM) with 8-bit dead band generator, two or three PSoC blocks, respectively
• Phase1 and Phase2 underlapped outputs track the frequency of the generated PWM signal
• Programmable duty cycle
• Programmable dead time
• Dead Band Kill input drives Phase1 and Phase2 outputs low
• Counter clocking up to 48 MHz
• Interrupt option triggered on rising edge of the PWM generated signal or counter terminal count

The 16-bit PWMDB User Module is a pulse width modulator combined with an 8-bit dead band generator.The pulse width modulator provides a programmable period and pulse width input signal to the dead band generator. The dead band generator outputs two under-lapped signals, with programmable dead time at the same frequency as the input signal. When asserted, the Dead Band Kill input drives the Phase1 and Phase2 output signals low.  The clock and enable signals can be selected from several sources. The Phase1 and Phase2 output signals can be routed to the external pin ports or to the global output buses for internal use by other user modules. An interrupt can be programmed to effectively trigger on both edges of the pulse width modulator output.

• Output is digital inverted input
• Requires only one digital block
• Can be used to generate an interrupt on the falling edge of the input

The DigInv User Module is a simple digital inverter. The output is a logical NOT of the input signal.

• Two Digital Buffers
• Input1 can be inverted
• Can be used to generate an interrupt on the rising edge of Output1

• Industry standard Philips I2C bus compatible interface
• Master and Slave operation, Multi Master capable
• Only two pins (SDA and SCL) required to interface to I2C bus
• Standard data rate of 100/400 kbps, also supports 50 kbps
• High level API requires minimal user programming
• 7-bit addressing mode
   

The I2C Hardware User Module implements an I2C device in firmware. The I2C bus is an industry standard, two-wire hardware interface developed by Philips®. The master initiates all communication on the I2C bus and supplies the clock for all slave devices. The I2CHW User Module supports the standard mode with speeds up to 400 kbps. No digital or analog user blocks are consumed with this module. The I2CHW User Module is compatible with other slave devices on the same bus.

Features and Overview

• The 32-bit general purpose counter uses four PSoC blocks
• Source clock rates up to 48 MHz
• Automatic reload of period on terminal count
• Programmable pulse width
• Input enables/disables continuous counter operation
• Interrupt option on compare output or terminal count
   

The 32-bit Counter User Module provides a down counter with a programmable period and pulse width. The clock and enable signals can be selected from any system time base or external source. Once started, the counter operates continuously and reloads its internal value from the period register upon reaching terminal count. During each clock cycle, the counter compares the current count to the value stored in the compare register. Each clock cycle, the Counter tests the count against the value of the compare register for either a “less than" or “less than or equal to" condition. The comparator output provides a logic level that may be routed to pins and to other user modules.

Features and Overview

• The 24-bit general purpose counter uses three PSoC blocks
• Source clock rates up to 48 MHz
• Automatic reload of period on terminal count
• Programmable pulse width
• Input enables/disables continuous counter operation
• Interrupt option on compare output or terminal count
   

The 24-bit Counter User Module provides a down counter with a programmable period and pulse width. The clock and enable signals can be selected from any system time base or external source. Once started, the counter operates continuously and reloads its internal value from the period register upon reaching terminal count. During each clock cycle, the counter compares the current count to the value stored in the compare register. Each clock cycle, the Counter tests the count against the value of the compare register for either a “less than" or “less than or equal to" condition. The comparator output provides a logic level that may be routed to pins and to other user modules.

• 8-bit general purpose timer uses one PSoC block
• Source clock rates up to 48 MHz
• Automatic reload of period on terminal count
• Capture for clocks up to 24 MHz
• Terminal count output pulse may be used as input clock for other analog and digital functions
• Interrupt option on terminal count, capture (on some devices), or when counter reaches a preset value
   

The 8-Bit Timer User Modules provides a down counter with programmable period and capture ability. The clock and enable signals can be selected from any system time base or external source. Once started, the timer operates continuously and reloads its internal value from the period register upon reaching terminal count. The output pulses high in the clock cycle following terminal count. Events can capture the current Timer count value by asserting the edge-sensitive capture input signal. Each clock cycle, the Timer tests the count against the value of the compare register for either a “Less Than" or “Less Than or Equal To" condition. Interrupts may be generated based on terminal count and compare signals. Some device families offer two additional features. The interrupt options include “interrupt on capture" and, in addition, the compare signal may be routed onto the row buses. If these options are available on your chosen device they will be shown in the Device Editor.

• 32-bit general purpose timer uses four PSoC blocks
• Source clock rates up to 48 MHz
• Automatic reload of period on terminal count
• Capture for clocks up to 24 MHz.
• Terminal count output pulse may be used as input clock for other analog and digital functions
• Interrupt option on terminal count, capture (on some devices), or when counter reaches a preset value
   

The 32-bit Timer User Module provides a down counter with programmable period and capture ability. The clock and enable signals can be selected from any system time base or external source. Once started, the timer operates continuously and reloads its internal value from the period register upon reaching terminal count. The output pulses high in the clock cycle following terminal count. Events can capture the current Timer count value by asserting the edge-sensitive capture input signal. Each clock cycle, the Timer tests the count against the value of the compare register for either a “Less Than" or “Less Than or Equal To" condition. Interrupts may be generated based on terminal count and compare signals. Some device families offer two additional features. The interrupt options include “interrupt on capture" and, in addition, the compare signal may be routed onto the row buses. If these options are available on your chosen device they will be shown in the Device Editor.  

• 24-bit general purpose timer three PSoC blocks
• Source clock rates up to 48 MHz
• Automatic reload of period on terminal count
• Capture for clocks up to 24 MHz
• Terminal count output pulse may be used as input clock for other analog and digital functions
• Interrupt option on terminal count, capture (on some devices), or when counter reaches a preset value
   

The 24-bit Timer User Module provides a down counter with programmable period and capture ability. The clock and enable signals can be selected from any system time base or external source. Once started, the timer operates continuously and reloads its internal value from the period register upon reaching terminal count. The output pulses high in the clock cycle following terminal count. Events can capture the current Timer count value by asserting the edge-sensitive capture input signal. Each clock cycle, the Timer tests the count against the value of the compare register for either a “Less Than" or “Less Than or Equal To" condition. Interrupts may be generated based on terminal count and compare signals. Some device families offer two additional features. The interrupt options include “interrupt on capture" and, in addition, the compare signal may be routed onto the row buses. If these options are available on your chosen device they will be shown in the Device Editor.

• Supports 1 to 8 Digits
• Any combination of individual displays up to 8 total digits
• Display both hex and integer values
• Supports decimal points built into 7-Segment display
• Supports both common cathode and common anode displays
• Configurable for both active high and active low segment and digit drives
   

The LED7SEG User Module is capable of multiplexing up to eight 7-segment displays. This user module is compatible with common cathode, common anode, or any drive polarity. This allows a wide range of flexibility with various displays. Digits and segments may be driven directly by PSoC pins without the use of transistors or drivers as long as the current sinking and sourcing limits of the PSoC pins are not exceeded.

• Support for both Active High and Active Low circuits
• Works with system shadow registers
• Functions (Switch, Invert, and GetState )

The LED User Module is just a couple simple functions to control an LED or any simple device that is controlled by on and off.

• Uses the industry standard Hitachi HD44780 LCD display driver chip protocol
• Requires only seven I/O pins
• Routines provided to print RAM or ROM strings
• Routines provided to print numbers
• Routines provided to display horizontal and vertical bar graphs
• Uses a single I/O port
   

The Character LCD User Module is a set of library routines that writes text strings and formatted numbers to a common two or four-line LCD module. Vertical and horizontal bar graphs are supported, using the character graphics feature of these LCD modules. This module was developed specifically for the industry standard Hitachi HD44780 two-line by 16 character LCD display driver chip, but works for many other fourline displays. This library uses the 4-bit interface mode to limit the number of I/O pins required.
 

Features and Overview

• Industry standard Philips I2C bus compatible interface
• Only two pins (SDA and SCL) required to interface several slave I2C devices
• Standard mode data supports rate of 100 kbps
• High level API requires minimal user programming
• Low level API provided for flexibility

The I2Cm User Module implements a master I2C device in firmware. The I2C bus is an industry standard,  two-wire interface developed by Philips®. An I2C bus master may communicate with several slave devices  using only two wires. The master initiates all communication on the I2C bus and supplies the clock for all slave devices. The I2Cm User Module supports speeds up to 100 kbps. No digital or analog user blocks  are consumed with this module. 

Features

• Easiest to use capacitive button controller
  • Four-button solution configurable through Hardware straps
  • No software tools or programming required
  • Four general-purpose outputs (GPOs)
  • GPOs linked to CapSense® buttons
  • GPOs support direct LED drive
• Robust noise performance
  • Specifically designed for superior noise immunity to external radiated and conducted noise
  • Low radiated noise emission
• SmartSense™ auto tuning
• For more, see pdf

Overview

The CY8CMBR2044 incorporates several innovative features to save time and money to quickly enable a capacitive touch sensing user interface in your design. It is a hardware configurable device and does not require any software tools or coding. This device is enabled with Cypress's revolutionary SmartSense™ Auto-Tuning algorithm. SmartSense™ Auto-Tuning ends the need to manually tune the user interface during development and production ramp. This speeds the time to volume and saves valuable engineering time, test time and production yield loss.

• Powerful Harvard-architecture processor
• Advanced peripherals (PSoC® blocks)
• Flexible on-chip memory
• Complete development tools
• Precision, programmable clocking
• Programmable pin configurations
• Versatile analog mux
• Additional system resources
• For more, see pdf

The PSoC family consists of many devices with on-chip controllers. These devices are designed to replace multiple traditional MCU-based system components with one low-cost single-chip programmable component. A PSoC device includes configurable blocks of analog and digital logic, and programmable interconnect. This architecture makes it possible for you to create customized peripheral configurations, to match the requirements of each individual application. Additionally, a fast central processing unit (CPU), flash program memory, SRAM data memory, and configurable I/O are included in a range of convenient pinouts.

Features

• Advanced CapSense block with SmartSense Auto-Tuning
• Driven shield
• Powerful Harvard-architecture processor
• Advanced peripherals (PSoC® blocks)
• Flexible on-chip memory
• Complete development tools
• Precision, programmable clocking
• Programmable pin configurations
• Versatile analog mux
• For more, see pdf.
   

PSoC Functional Overview

The PSoC family consists of many devices with on-chip controllers. These devices are designed to replace multiple traditional MCU-based system components with one low-cost single-chip programmable component. A PSoC device includes configurable blocks of analog and digital logic, and programmable interconnect.

PSoC Designer 5.0 SP6 will continue to be available for System Level Design users, and it will co-exist with future PSoC Designer 5.1 releases. However, we are not recommending System Level Design for production designs.

We suggest users to use the latest version of PSoC Designer located here:

www.cypress.com/go/psocdesigner

PSoC Designer 5.0 SP6 supports Internet Explorer 6 through 8, but does not support Internet Explorer 8 Beta or Internet Explorer 9 due to compatibility issues.

To Install PSoC Designer 5.0 SP6 users must first have PSoC Programmer installed first. For the latest release of PSoC Programmer please, Click Here

PSoC Designer 5.0 PS6 was tested using Beta version of Windows 7. PSoC Designer 5.0 SP6 is not supported for Windows 7 systems.

To Install:

Shut Down any currently running instances of PSoC Designer.

If an earlier service pack of PSoC Designer 5.0 is currently installed, uninstall it. To do this please navigate to Start>Control Panel>Add or Remove Programs.

• Install latest PSoC Programmer.
• Install PSoC Designer 5.0 SP6 by running the installed in the downloads table below.”

Note to HI-TECH Compiler Users:

There are new devices in this release. To compile projects containing these devices with the HI-TECH compiler, you must manually update the psoc.ini file. The HI-TECH psoc.ini file is found in the HI-TECH installation folder. The default location of the psoc.ini is here:

C:\Program Files\HI-TECH Software\HCPSOC\PRO\9.61\dat\psoc.ini

The default location of the replacement psoc.ini file that adds support for the new devices is here:

C:\Program Files\Cypress\Common\CypressSemiBuildMgr\tools\psoc.ini

PSoC Programmer: The latest version of PSoC Programmer must be installed along with PSoC Designer. For the latest release please navigate to the PSoC Programmer web page: Click Here

PSoC Designer: User Guides - Click Here

PSoC Designer Archive - Click Here

• QuietZone™ Controller
• Low power CapSense® block with SmartSense™ auto-tuning
• Driven shield available on five GPIO pins
• Powerful Harvard-architecture processor
• Flexible on-chip memory
• Four clock sources
• Programmable pin configurations
• Versatile analog mux
• Additional system resources
• Complete development tools
• Sensor and Package options
• For more, see pdf

PSoC® Functional Overview

The PSoC family consists of many devices with on-chip controllers. These devices are designed to replace multiple traditional MCU-based system components with one low-cost single-chip programmable component. A PSoC device includes configurable blocks of analog and digital logic, and programmable interconnect. This architecture makes it possible for you to create customized peripheral configurations, to match the requirements of each individual application. Additionally, a fast central processing unit (CPU), flash program memory, SRAM data memory, and configurable I/O are included in a range of convenient pinouts.

Counts are calculated using Equation 1.

Where:

Sensitivity is calculated using Equation 2.

The upper limit of the capacitance measurement range is calculated using Equation 3.

For example, given the following User Module settings:

Sensitivity = 184.3 Counts/pF

Capacitance measurement range (upper limit) = 88.9 pF

Note: The “sensitivity” calculated above is the capacitive measurement module sensitivity, not the system sensitivity to button/sensor activation.

Note: It is not possible to measure capacitance values all the way down to zero because there will always be some parasitic capacitance, C_P, and pin capacitance measured by the sensor.

Where:

For example, given the following User Module settings:

Resolution = 0.00543 pF

Note: Although the calculation indicates that a change as small as 0.00543 pF can be detected, raw-count noise limits the use of such high resolution. CapSense is not recommended for measuring absolute capacitances.

Note: The “sensitivity” calculated above is the capacitive measurement module sensitivity, not the system sensitivity to button/sensor activation.

1. PSoC Designer: The PSoC Designer 5.2 IDE is a full featured development tool for designing and debugging PSoC applications. The PSoC Designer comes with a free Imagecraft C compiler.
2. PSoC Programmer: The PSoC Programmer 3.15.1 programs PSoC devices using the MiniProg1 programmer.
3. Bridge Control Panel and Multichart: These tools are used to tune your CapSense design. The Bridge Control Panel is installed along with PSoC Programmer. The Multichart tool is available for download.
4. USB-to-I2C Bridge: The USB-I2C Bridge Kit allows you to read data from the CapSense controller through the I2C interface and transmit it to your PC through USB. You can use the Bridge Control Panel to view and log the data. For more details see CapSense Data Viewing Tools -AN2397.This method is used with the following devices: CapSense and CapSense Plus: CY8C21x34, CY8C21x34B, CY8C21x45, CY8C22x45, CY8C24x94, CY8C20xx6A, CY8C20xx6H, CY8C20xx7, CY8C20XX6AS
   CapSense Express: CY8C201xxx
5. USB-to-UART Bridge: Implementing a USB-to-UART Bridge as described in USB-to-UART Bridge-AN49943 allows you to read data from the CapSense controller through an RS232 interface and transmit it to your PC through USB. For more details see CapSense Data Viewing Tools -AN2397. This method is used with the following devices: CapSense Express:CY8CMBR2044, CY8CMBR2016, CY8CMBR2010
6. Development Kits:
   • Universal Controller Kits: These kits feature predefined control circuitry and plug-in hardware to make prototyping and debugging easy. Programming and I2C-to-USB Bridge hardware are included.
     CY3280 - 20xx6
     CY3280 - 21x34
     CY3280 - 24x94
     CY3280 - 22x45
     CY3280 - 20x34
   • Universal CapSense Module Boards
     • The CY3280-BSM Simple Button Module consists of ten CapSense buttons and ten LEDs. This module connects to any CY3280 Universal CapSense Controller Board.
     • The CY3280-BMM Matrix Button Module consists of eight LEDs as well as eight CapSense sensors organized in a 4x4 matrix format to form 16 physical buttons. This module connects to any CY3280 Universal CapSense Controller Board.
     • The CY3280-SLM Linear Slider Module consists of five CapSense buttons, one linear slider (with ten sensors), and five LEDs. This module connects to any CY3280 Universal CapSense Controller Board.
     • The CY3280-SRM Radial Slider Module consists of four CapSense buttons, one radial slider (with ten sensors), and four LEDs. This module connects to any CY3280 Universal CapSense Controller Board.
     • The CY3280-BBM Universal CapSense Prototyping Module provides access to every signal routed to the 44-pin connector on the attached controller board(s). The prototyping module board is used in conjunction with a Universal CapSense Controller board to implement additional functionality that is not part of the other single-purpose Universal CapSense Module boards.
   • CapSense Express Evaluation Kits for CY8C201xx: With Cypress's PSoC Designer visual embedded system design tool and CapSense Express configuration tool, designers configure, monitor, and tune buttons or sliders, LEDs, and other general purpose I/Os over I2C in real time using a graphical user interface.
     CY3218-CAPEXP1 CapSense Express Kit
     CY3218-CAPEXP2 CapSense Express Kit
   • CapSense Express Evaluation Kit for CY8CMBR2044:
     CY3280-MBR-Capsense Express kit with Smartsense Auto-tuning

This document is a reference for all the CapSense Express registers in address order.

Features

• Low power CapSense® block with SmartSense Auto-tuning
• Powerful Harvard-architecture processor
• Operating Range: 1.71 V to 5.5 V
• Operating Temperature range: -40 °C to +85 °C
• Flexible on-chip memory
• Four Clock Sources
• Programmable pin configurations
• Versatile Analog functions
• Full-Speed USB
• For more, see pdf

PSoC^® Functional Overview

The PSoC family consists of on-chip controller devices, which are designed to replace multiple traditional microcontroller unit (MCU)-based components with one, low cost single-chip programmable component. A PSoC device includes configurable analog and digital blocks, and programmable interconnect. This architecture allows the user to create customized peripheral configurations, to match the requirements of each individual application.  

Features

• Capacitive Slider and Button Input
• Target Applications
• Low Operating Current
• Industry's Best Configurability
• Advanced Features
• Wide Range of Operating Voltages
• I2C Communication
• Industrial Temperature Range: –40°C to 85°C.
• Available in 16-pin QFN and 16-pin SOIC Package
• For more, see pdf
   

Overview

These CapSense Express™ controllers support 4 to 10 capacitive sensing CapSense buttons. The device functionality is configured through an I2C port and can be stored in onboard nonvolatile memory for automatic loading at power on. The CapSense Express controller enables the control of 10 I/Os configurable as one capacitive sensing slider (10 segments)[1] or one slider (5 segments) with the rest of the pins as buttons or GPIOs (for driving LEDs or interrupt signals based on various button conditions).

Features

• 10/8/6/4 capacitive button input
• Target applications
• Low operating current
• Industry's best configurability
• Advanced features
• Wide range of operating voltages
• I2C communication
• Industrial temperature range: –40 °C to 85 °C.
• Available in 16-pin QFN, 8-pin, and 16-pin SOIC packages
• For more, see pdf

Overview

These CapSense Express™ controllers support four to ten capacitive sensing (CapSense) buttons. The device functionality is configured through an I2C port and can be stored in onboard nonvolatile memory for automatic loading at power-on. The CY8C20110 is optimized for dimming LEDs in 15 selectable duty cycles for back light applications. The device can be configured to have up to 10 GPIOs connected to the PWM output. The PWM duty cycle is programmable for variable LED intensities.

The CSDADC device is sensitive to EMC signals at the operation frequency and harmonics in VC2 configuration. This configuration is only recommended when you do not plan to run EMC/EMI certification tests.

The defect will be fixed in the future versions of PSoC Designer but for the current version the following workaround can be used:

1. Download the attached “SmartSense.asm”.
2. Copy this file (and replace the old SmartSense.asm) to the following folder:
   C:\Program Files\Cypress\PSoC Designer\5.2\Common\CypressSemiDeviceEditor\Data\Stdum\SmartSense\Ver_1_30\CY8C21034

It should be noted that the configuration wizard will still show the R_b connection to P1[1]. But the hardware connection for R_b gets modified when the API SmartSense_Start() is called in “main.c” of the project. This workaround modifies ACE00CR2, ACE00CR1, ALT_CR0, CMP_GO_EN, PRT1DM0, PRT1DM1, and PRT1DM2 registers in the SmartSense_Start() API. The details of these registers can be found in the Technical Reference Manual (TRM) for CY8C21x34.

Features

• Easy to use capacitive button controller
• SmartSense™ Auto-Tuning
• Noise Immunity
• System Diagnostics of CapSense buttons - reports any faults at device power up
• Advanced features
• Wide operating voltage range
• Low power consumption
• Industrial temperature range: –40 °C to +85 °C
• 32-pin Quad Flat No leads (QFN) package (5 mm × 5 mm × 0.6 mm)
   

Overview

The CY8CMBR2010 incorporates several innovative features to save time and money to quickly enable a capacitive touch sensing user interface in your design. It is a hardware configurable device and does not require any software tools or coding. This device is enabled with Cypress’s revolutionary SmartSense™ Auto-Tuning algorithm. SmartSense™ Auto-Tuning ends the need to manually tune the user interface during development and production ramp. This speeds the time to volume and saves valuable engineering time, test time and production yield loss.

• Nominal 10-bit resolution
• Selectable resolution from 2-bit to 12-bit
• Input range 0 to Vdd-1
• Allows a coarse temperature measurement: range of -40°C to +125°; accuracy of ± 40°C with resolution ± 2°C
   

The ADC10 User Module implements a Single Slope A/D Converter that generates up to a 12-bit, full scale output (0 to 4095 count range). Although capable of generating a 12-bit output, it has only 10 effective bits of resolution. Further resolution is achieved by averaging multiple samples.

Features

• 1.71-V to 5.5-V operating range
• Low power CapSense® block
• Powerful Harvard-architecture processor
• Flexible on-chip memory
• Precision, programmable clocking
• Programmable pin configurations
• Integrates Immersion TS2000 Haptics technology for ERM drive control
• Versatile analog mux
• Additional system resources
• Complete development tools
• Package options
• For more, see pdf

PSoC® Functional Overview

The PSoC family consists of on-chip controller devices, which are designed to replace multiple traditional microcontroller unit (MCU)-based components with one, low-cost single-chip programmable component. A PSoC device includes configurable analog and digital blocks, and programmable interconnect. This architecture allows the user to create customized peripheral configurations, to match the requirements of each individual application. Additionally, a fast CPU, flash program memory, SRAM data memory, and configurable I/O are included in a range of convenient pinouts.

Features

• Hardware Configurable Matrix CapSense® Controller
  • Does not require software tools or programming
  • 16 buttons can be configured individually or as a matrix
  • Supports 3x4 and 4x4 matrix configurations
• Matrix Host Interface Communication
  • Industry standard host interface protocols reuse existing host processor firmware
    • Key Scan Interface
    • Truth Table Interface
  • Encoded GPO Interface - minimizes number of pins required
• For more, see pdf

Overview

The CY8CMBR2016 CapSense Express capacitive touch sensing controller incorporates several innovative features to save time and money to quickly enable a capacitive touch sensing user interface in your design. It is a hardware configurable device and does not require any software tools, firmware coding or device programming. This device is enabled with Cypress's revolutionary SmartSense™ auto-tuning algorithm.

• Supports Serial Peripheral Interconnect (SPI) Slave protocol
• Supports protocol modes 0, 1, 2, and 3
• Selectable input sources for MOSI, SCLK, and ~SS
• Selectable output routing for MISO
• Programmable interrupt on SPI done condition
• SS may be firmware controlled

The SPIS User Module is a Serial Peripheral Interconnect Slave. It performs full duplex synchronous 8-bit data transfers. SCLK phase, SCLK polarity, and LSB First can be specified to accommodate most SPI protocols. The SPIS PSoC block has selectable routing for the input and output signals, and programmable interrupt driven control. Application Programming Interface (API) firmware provides a highlevel programming interface for either assembly or C application software.

• Implements CapSense® capacitive sensing in the CY8C20xx6A family of PSoC® devices using sigma-delta data conversion.
• Configurable system parameters allow tuning to optimize performance in a broad range of applications.
• Supports up to 36 capacitive sensors and 6 sliders.
• Capable of detecting touches as low as 0.1 pF, that is, detecting a finger is possible through up to 15 mm of glass or 5 mm of plastic.
• High immunity to AC mains noise, other EMI, and power supply noise.
• Supports capacitive sensors configured as independent buttons and/or as dependent arrays to form sliders.
• Effective number of slider elements can double the number of dedicated I/O pins using diplexing technique.
• Supports slider resolution greater than physical pitch through interpolation.
• Shield electrode provided for reliable operation with high parasitic capacitance and/or in the presence of water film.
• Guided sensor and pin assignments using the CSD Wizard.
• The CY8C20045 family does not support sliders.

CY8C202x6A_16qfn.ibs
CY8C20396A_24qfn.ibs
CY8C203x6A_24qfn.ibs
CY8C20496A_32qfn.ibs
CY8C204x6A_32qfn.ibs
CY8C205x6A_48ssop.ibs
CY8C20636A_48qfn.ibs
CY8C206x6A_48qfn.ibs
CY8C207x6A_30wlcsp.ibs

CY8C20246AS_16qfn.ibs
CY8C20346AS_24qfn.ibs
CY8C204x6AS_32qfn.ibs
CY8C20666AS_48qfn.ibs

CY8C20336h_24qfn.ibs
CY8C20446h_32qfn.ibs

cy8c20xx7_16qfn.ibs
cy8c20xx7_16soic.ibs
cy8c20xx7_24qfn.ibs
cy8c20xx7_30wlcsp.ibs
cy8c20xx7_32qfn.ibs
cy8c20xx7_48qfn.ibs

cy8c20xx7s_16qfn.ibs
cy8c20xx7s_24qfn.ibs
cy8c20xx7s_32qfn.ibs
cy8c20xx7s_48qfn.ibs

cy8c20111_8soic_27v.ibs
cy8c20111_8soic_33v.ibs
cy8c20111_8soic_5v.ibs
cy8c20121_8soic_27v.ibs
cy8c20121_8soic_33v.ibs
cy8c20121_8soic_5v.ibs
cy8c20142_8soic_27v.ibs
cy8c20142_8soic_33v.ibs
cy8c20142_8soic_5v.ibs
cy8c201x0_16qfn_27v.ibs
cy8c201x0_16qfn_33v.ibs
cy8c201x0_16qfn_5v.ibs
cy8c201x0_16soic_27v.ibs
cy8c201x0_16soic_33v.ibs
cy8c201x0_16soic_5v.ibs

• 8-bit resolution
• Sample rates up to 8.8 ksps
• Input range 0 to Vdd-1V

The ADC8 User Module implements a Single Slope A/D Converter that generates an 8-bit, full scale output (0 to 255 count range).

• Immune to GPIO current transient, VDD fluctuation, entry and exit from sleep, and IDAC RTS noise
• Implements CapSense® capacitive sensing using sigma-delta data conversion
• Configurable system parameters allow tuning to optimize performance in a range of applications
• Supports as many as 35 capacitive sensors and six sliders
• Capable of detecting touches as low as 0.1 pF, meaning that, detecting a finger is possible through up to 15 mm of glass or 5 mm of plastic
• Supports capacitive sensors configured as independent buttons or as dependent arrays to form sliders, or both
• Effective number of slider elements can double the number of dedicated I/O pins using diplexing technique
• Supports slider resolution greater than physical pitch by using interpolation
• For more, see pdf

The CSDPLUS User Module is based on the differential capacitive sensing method. This user module uses the Analog MUX Bus for connecting a capacitive sensing analog circuitry to any PSoC pin. The CSDPLUS User Module connects the active sensor to the Analog MUX Bus allowing the CapSense circuitry to measure its capacitance and translate that capacitance into a digital code. Firmware serially scans the sensors by sequentially setting corresponding bits in the MUX_CRx registers.

• Scan 1 to 37 capacitive sensors
• Sensing possible with up to a 15 mm glass overlay
• Proximity detection to 20 cm with a wire-based sensor
• High immunity to AC mains noise, EMC noise, and power supply voltage changes
• Supports different combinations of independent and slide capacitive sensors
• Double slide sensor physical resolution using diplexing
• Increase slide sensor resolution using interpolation
• Touchpad support with two slide sensors
• Sensing support through high resistive conductive materials (ITO films for example)
• Shield electrode support for reliable operation in the presence of water film or droplets
• Guided sensor and pin assignments using the CSD2x Wizard
• Integrated baseline update algorithm for handling temperature, humidity, and electrostatic discharge (ESD) events
• Easily adjustable operational parameters
• PC GUI application support for raw data monitoring and parameter optimization in real-time
   

The CSD2x User Module (Capacitive Sensing using a Sigma-Delta Modulator) gives capacitance sensing using the switched capacitor technique with a sigma-delta modulator to convert the sensing switched capacitor current to digital code. The CSD2x User Module can support single-channel CapSense scanning and dual-channel CapSense scanning.

• Provides a global shadow register for a selected port data register
• Generates a set of macros for port pin manipulation
• Prevents corruption of GPIO pin settings during CPU control of GPIO
• Cooperates with other user modules that allocate shadow registers.