PSoC Designer 5.0 SP6 will continue to be available for System Level Design users, and it will co-exist with future PSoC Designer 5.1 releases. However, we are not recommending System Level Design for production designs.

We suggest users to use the latest version of PSoC Designer located here:

www.cypress.com/go/psocdesigner

PSoC Designer 5.0 SP6 supports Internet Explorer 6 through 8, but does not support Internet Explorer 8 Beta or Internet Explorer 9 due to compatibility issues.

To Install PSoC Designer 5.0 SP6 users must first have PSoC Programmer installed first. For the latest release of PSoC Programmer please, Click Here

PSoC Designer 5.0 PS6 was tested using Beta version of Windows 7. PSoC Designer 5.0 SP6 is not supported for Windows 7 systems.

To Install:

Shut Down any currently running instances of PSoC Designer.

If an earlier service pack of PSoC Designer 5.0 is currently installed, uninstall it. To do this please navigate to Start>Control Panel>Add or Remove Programs.

• Install latest PSoC Programmer.
• Install PSoC Designer 5.0 SP6 by running the installed in the downloads table below.”

Note to HI-TECH Compiler Users:

There are new devices in this release. To compile projects containing these devices with the HI-TECH compiler, you must manually update the psoc.ini file. The HI-TECH psoc.ini file is found in the HI-TECH installation folder. The default location of the psoc.ini is here:

C:\Program Files\HI-TECH Software\HCPSOC\PRO\9.61\dat\psoc.ini

The default location of the replacement psoc.ini file that adds support for the new devices is here:

C:\Program Files\Cypress\Common\CypressSemiBuildMgr\tools\psoc.ini

PSoC Programmer: The latest version of PSoC Programmer must be installed along with PSoC Designer. For the latest release please navigate to the PSoC Programmer web page: Click Here

PSoC Designer: User Guides - Click Here

PSoC Designer Archive - Click Here

CY3236A-PIRMOTION Rev. A Kit Contents:

• PIR Motion Sensor Board using CY8C27443-24PVXI PSoC(R) device
• 12V Power Supply
• PSoC Designer(TM) and PSoC Programmer CD
• Design Files CD (Schematic, BOM, Gerber Files, PSoC Designer Example Project)

The ICE-Cube also serves as a single-site device programmer via an ISSP (In-System Serial Programming) Cable and MiniEval board included in the kit. The MiniEval board is a programming and evaluation board which connects to the ICE-Cube via an ISSP Cable and allows programming of DIP devices. There are also other Programming boards available for programming other packages. The MiniEval also includes LEDs and a POT for simple evaluation and demonstration.

PSoC 1 Debugger Includes:

• PSoC Designer Software CD-ROM
• ICE-Cube In-Circuit Emulator
• ICE Flex-Pod for CY8C29xxx Family
• Backward compatibility Cat-5 Adapter
• ISSP Cable
• Mini-Eval Programming Board in One
• USB 2.0 Cable and Blue Cat-5 Cable
• 110 ~ 240V Power Supply, Euro-Plug Adapter
• 2 CY8C29466-24PXI 28-PDIP Chip Samples

Supports following 8 bit PSoC1 (Programmable System-On Chip) families, including automotive, except CY8C25/26xxx devices.

PSoC 1 Getting Started Debugging - Part 1

Software Title	Description	Link
PSoC Designer	This kit requires PSoC Designer for development
PSoC Programmer	This kit requires PSoC Programmer for programming

Related Resources:

Sleep mode is used to reduce a PSoC’s average current consumption by entering a low-power state, whenever the CPU and other internally clocked functions are not needed. Sleep mode is most useful for battery-powered systems, but it is applicable to any design.

Features

• Powerful Harvard-architecture processor
• Advanced peripherals (PSoC® blocks)
• Flexible on-chip memory
• Complete development tools
• Precision, programmable clocking
• Programmable pin configurations
• Additional system resources
   

PSoC Functional Overview

The PSoC family consists of many programmable system-on-chip controller devices. These devices are designed to replace multiple traditional MCU-based system components with a low cost single-chip programmable component. A PSoC device includes configurable blocks of analog and digital logic, and programmable interconnect. This architecture allows you to create customized peripheral configurations, to match the requirements of each individual application. Additionally, a fast CPU, Flash program memory, SRAM data memory, and configurable I/O are included in a range of convenient pinouts.

General-purpose input and output (GPIO) is a very critical part of any microcontroller unit (MCU) as they form the bridge between the external world and the MCU. The type and nature of this external world bridge depends on the end application. For instance, an ADC requires a GPIO to be an analog pin whereas an I2C or SPI digital communication block requires the same GPIO to be digital. In order to properly setup this external world bridge, you need to know not only the end application but also the GPIO system of the MCU that is used. PSoC like any other controller has its own GPIO system. This application note discusses the application specific parameters of the GPIO system. Detailed technical overview of the system can be found in the respective device technical reference manual (TRM) under General Purpose I/O chapter of PSoC Core section.
 

Features

• Low power CapSense® block with SmartSense Auto-tuning
• Powerful Harvard-architecture processor
• Operating Range: 1.71 V to 5.5 V
• Operating Temperature range: -40 °C to +85 °C
• Flexible on-chip memory
• Four Clock Sources
• Programmable pin configurations
• Versatile Analog functions
• Full-Speed USB
• For more, see pdf

PSoC^® Functional Overview

The PSoC family consists of on-chip controller devices, which are designed to replace multiple traditional microcontroller unit (MCU)-based components with one, low cost single-chip programmable component. A PSoC device includes configurable analog and digital blocks, and programmable interconnect. This architecture allows the user to create customized peripheral configurations, to match the requirements of each individual application.  

Kit Upgrade: Now it’s time to make the upgrade to PSoC® 5LP Processor Module and take advantage of all that PSoC has to offer.

These upgrades are FREE to our valued customers. Log on to http://www.cypress.com/go/psockitupgrade to know more details. Cypress appreciates your business and continued loyalty.

Kit Contents:

• PSoC Development Board 
• PSoC 1 CY8C28 Family Processor Module
• PSoC 3 CY8C38 Family Processor Module
• PSoC 5 CY8C58LP Family Processor Module
• MiniProg3 Program/Debug Device
• Program/Debug Ribbon Cable
• USB Cable
• 12V AC Power Adapter
• Quick Start Guide
• Kit CDs, which includes: PSoC Creator™, PSoC Designer™, PSoC Programmer, Projects, and Documentation

For PSoC training, please visit http://www.cypress.com/go/training.

Software Title	Description	Link
PSoC Creator	This kit requires PSoC Creator for development
PSoC Designer	This kit requires PSoC Designer for development
PSoC Programmer	This kit requires PSoC Programmer for programming

See how you can integrate thermal management functions in a single low-cost PSoC 1 device:

1. Closed-loop 4-wire fan control
2. Temperature measurement
3. Fan Speed Control based on temperature measurement
4. Display

Required Hardware

CY8CKIT-001 PSoC Development Kit (sold separately) The CY8CKIT-001 PSoC Development Kit (DVK) allows you to evaluate the PSoC 1, PSoC 3, and PSoC 5 families. Place the Processor Module families (included) on the DVK and program it with the CY8CKIT-016 PSoC Thermal Management kit example project using the MiniProg3 Program device.

CY8CKIT-036 PSoC Thermal Management Expansion Board Kit (sold separately) The CY8CKIT-036 PSoC Thermal Management Expansion Board Kit (EBK) connects to the CY8CKIT-001. Kit Contents: Two 4-wire fans and connectors for two additional 4-wire fans Digital (I2C-based TMP175, One-wire DS1820, PWM output TMP05) and Analog (Diode) temperature sensors I2C/SMBus/PMBus host interface   The EBK connects to the CY8CKIT-001 PSoC Development Kit for operation.

Easy to use Modular Design

The CY8CKIT-001 PSoC 1 Development Kit allows you to evaluate Cypress's PSoC 1, PSoC 3 and PSoC 5 families. The modular design allows you to interface with different types of Expansion Board Kits. In this case the CY8CKIT-036 plugs onto the CY8CKIT-001, which uses the firmware example project of the CY8CKIT-016 to demonstrate Thermal Management functions.

CY8CKIT-001 PSoC DVK	CY8CKIT-036		CY8CKIT-016
PSoC 1 CY8C28 Family Processor Module

Example Project Description

Example firmware provides a quick demonstration of a two-zone Thermal Management system. Zone 1 consists of a 4-wire fan, the I2C temperature sensor and a potentiometer that simulates a diode. Zone 2 consists of the other 4-wire fan, a PWM output temperature sensor and a 1-wire temperature sensor. Fan RPM is controlled based on the weighted average readings of temperature sensors in their zones. Fan RPM zone temperature readings and fan faults are displayed in LCD.
 

PSoC One-chip Solution
 

This Thermal Management solution is used by Tier 1 Customers in Data and Telecom equipment. It can be your solution as well. Options include:

1. Driving up to 8 fans in closed-loop or open-loop
2. Interfacing with Multiple Digital and Analog Sensors
3. Communicating via I2C, SPI, UART or PMBus* and SMBus*

*SMBus and *PMBus with PSoC 1 are under development

To learn more, download these App Notes.

To know more about PSoC 1, click here. To know more about other PSoC 1 kits, click here.
 

Software Title	Description	Link
PSoC Designer	This kit requires PSoC Designer for development
PSoC Programmer	PSoC programmer is required every time the PSoC 1 (CY8C28) Family Processor Module is programmed

Features

• XRES pin to support in-system serial programming (ISSP) and external reset control in CY8C24894
• Powerful Harvard-architecture processor
• Advanced peripherals (PSoC® Blocks)
• Full speed USB (12 Mbps)
• Flexible on-chip memory
• Programmable pin configurations
• Precision, programmable clocking
• Additional system resources
• For more, see pdf

PSoC Functional Overview

The PSoC family consists of many devices with on-chip controllers. These devices are designed to replace multiple traditional MCU-based system components with one low-cost single-chip programmable component. A PSoC device includes configurable blocks of analog and digital logic, and programmable interconnect. This architecture makes it possible for you to create customized peripheral configurations, to match the requirements of each individual application.

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Introduction

   Cypress's Programmable System-on-Chip (PSoC®) integrates a microcontroller with programmable analog and digital peripherals. Because you can configure the resources of a PSoC, you can develop a device that is customized and tuned for your application. Moreover, as the needs of the application change during development and in production, you can reconfigure the device to adapt to these new requirements with minimal effort.   
   

Getting Started with PSoC 1 - Part 1 - Architecture and System Resources

Getting Started with PSoC 1 - Part 2 - Digital Subsystem

Getting Started with PSoC 1 - Part 3 - Analog architecture

Getting Started with PSoC 1 - Part 4 - My first PSoC Designer Project

PSoC® 1 - Getting Started with SPI

Introduction

System cooling is a critical task in any high performance electronic system. As circuit miniaturization continues, increasing demands are placed on system designers to improve the efficiency of their thermal management designs. Usually thermal management is done by forced convection. In forced convection the heat dissipation is increased by moving the air inside and around the heat source. This can be easily accomplished using Brushless DC (BLDC) based fans. The speed of these fans depends on DC voltage across these fans.

PSoC Programmer 3.17 offers the user a simple GUI that connects to programming hardware to program and configure PSoC, Clock, and configurable fixed function devices. Also provided with PSoC Programmer is the Bridge Control Panel, which can be used to debug, graph and log I2C serial communications using various supported Cypress Software. PSoC Programmer also provides a hardware layer for customers to design custom applications or use existing code examples for testing hardware and Firmware designs.

PSoC Programmer 3.17 release shall support both PSoC Creator and PSoC Designer in a single installation.

PSoC Programmer 3.17 is a minor release. For additional information regarding the installation and the new features please see the release notes in the downloads table below.

PSoC Programmer:

PSoC Programmer is a flexible, integrated programming application for programming PSoC devices. PSoC Programmer can be used with PSoC Designer and PSoC Creator to program any design onto a PSoC device. PSoC Programmer supports all PSoC 1, 3, and 5 devices.

COM Hardware Layer Supported Languages:

PSoC Programmer provides the user a hardware layer with API’s to design specific applications utilizing the programmers and bridge devices. The PSoC Programmer hardware layer is fully detailed in the COM guide documentation as well as example code across the following languages: C#, C, Perl, and Python.

PSoC Programmer Secondary Software

PSoC Programmer includes additional software beyond just PSoC Programmer. For more information on that additional software please: Click Here

Third Party IDE and Programming Support

PSoC Programmer delivers a number of files and utilities that enable 3^rd party programming and debugging support for PSoC device families. In the downloads table below we include the 3^rd party user guide which will assists the user in configuring and enabling the support in the IDEs or programming utilities. The files and applications can be found in the root installation directory for each programmer installation.

Archived Software:

PSoC Programmer software is archived at the following page: Click Here

Additional Programming Links:
Prototype Programming Hardware:

PSoC Programmer is part of a suite of programming options and programming content available to PSoC users. For customers who are looking for more information on general programming options and information please navigate to the web page linked below. On the General Programming web page we discuss all of the available programming options for customers including Software, Schematics, Programming Specifications, and 3rd party mass programming.

www.cypress.com/go/programming

All PDF documents require at least a PDF reader installed prior to opening.

 
Features:

• User friendly PLC Control Panel Application available on kit CD
• CY8CPLC20-OCD – 100-pin TQFP on-chip debug (OCD) device that allows quick design and debug of a PLC application. The CY8CPLC20 100-pin TQFP is available for debug purposed only. For production quantities, CY8CPLC20 is available in 28-pin SSOP and 48-pin QFN packages.
• Chip power supply derived from 90V to 264V AC
• User configurable general purpose LEDs
• General purpose 8-bit DIP switch
• On board surge protection and isolation circuit
• RJ45 connector to use ICE debugger
• RS232 COM port for communication
• Header to attach LCD card
• I2C header for communicating to external device
• ISSP header for programming the CY8CPLC20

 
Kit Contents:

• CY3274 Quick Start Guide
• CY3274 PLC HV Development Board
• CDs containing:
  • Packet Test Software – PLC Control Panel Application
  • CY8CPLC20 Data Sheet
  • Development Board User Guide
  • Application Note – Using CY8CPLC20 in Powerline Communication (PLC) Applications
  • CY3274 Board Schematics
  • CY3274 Board Gerbers
  • PSoC Designer™
  • PSoC Programmer
• AC Power Cable
• MiniProg1 to Program CY8CPLC20
• 25 Jumper Wires
• LCD Module
• USB-I2C Bridge
• Retractable USB Cable
• Five CY8CPLC20-28PVXI Device Samples

Software Title	Description	Link
PSoC Designer	This kit requires PSoC Designer for development
PSoC Programmer	This kit requires PSoC Programmer for programming
Powerline Communcation	PLC Contol Panel Application

• Nominal 10-bit resolution
• Selectable resolution from 2-bit to 12-bit
• Input range 0 to Vdd-1
• Allows a coarse temperature measurement: range of -40°C to +125°; accuracy of ± 40°C with resolution ± 2°C
   

The ADC10 User Module implements a Single Slope A/D Converter that generates up to a 12-bit, full scale output (0 to 4095 count range). Although capable of generating a 12-bit output, it has only 10 effective bits of resolution. Further resolution is achieved by averaging multiple samples.

The application note describes the three modes in which the TMP05/06 sensors can be interfaced followed by sample projects interfacing the sensors with a CY8C28xxx device through a simple, serial 2-wire digital interface. After reading the application note, a designer should be able to use the project attached to interface any PSoC 1 to TMP05 and TMP06 sensors in all the three modes described.

This application note assumes that the reader is familiar with PSoC 1, PSoC Designer IDE and programming in C.

For PSoC® 3 based implementation of TMP05/06 sensor interface refer - AN65977
 

• Powerful Harvard Architecture Processor
  • M8C Processor Speeds up to 24 MHz
  • 8x8 Multiply, 32-Bit Accumulate
  • Low power at high speed
  • 3.0 to 5.25V Operating Voltage
  • Industrial Temperature Range: -40°C to +85°C
• Advanced Peripherals (PSoC® Blocks)
  • 4 Rail-to-Rail Analog PSoC Blocks Provide:
    • Up to 14-Bit ADCs
    • Up to 8-Bit DACs
    • Programmable Gain Amplifiers
    • Programmable Filters and Comparators
  • 4 Digital PSoC Blocks Provide:
    • 8 to 32-Bit Timers and Counters, 8- and 16-bit pulse-width modulators (PWMs)
    • CRC and PRS Modules
    • Full Duplex UART
    • Multiple SPI Masters or Slaves
    • Connectable to all GPIO Pins
  • Complex Peripherals by Combining Blocks
  • High speed 8-bit SAR ADC optimized for motor control
• Precision, Programmable Clocking
  • Internal ± 5% 24/48 MHz Oscillator across the Industrial Temperature Range
  • High Accuracy 24 MHz with Optional 32 kHz Crystal and PLL
  • Optional External Oscillator, up to 24 MHz
  • Internal Oscillator for Watchdog and Sleep
• Flexible On-Chip Memory
  • 8K Bytes Flash Program Storage 50,000 Erase/Write Cycles
  • 256 Bytes SRAM Data Storage
  • In-System Serial Programming (ISSP)
  • Partial Flash Updates
  • Flexible Protection Modes
  • EEPROM Emulation in Flash
• Programmable Pin Configurations
  • 25 mA Sink on all GPIO
  • Pull Up, Pull Down, High Z, Strong, or Open Drain Drive Modes on All GPIO
  • Up to eight Analog Inputs on GPIO plus two additional analog inputs with restricted routing
  • Two 30 mA Analog Outputs on GPIO
  • Configurable Interrupt on All GPIO
• Additional System Resources
  • I²C™ Slave, Master, and Multi-Master to 400 kHz
  • Watchdog and Sleep Timers
  • User Configurable Low Voltage Detection (LVD)
  • Integrated Supervisory Circuit
  • On-Chip Precision Voltage Reference
• Complete Development Tools
  • Free Development Software (PSoC Designer™)
  • Full-Featured, In-Circuit Emulator and Programmer
  • Full Speed Emulation
  • Complex Breakpoint Structure
  • 128K Trace Memory

PSoC Functional Overview
 

This AN also talks about the method to reduce the 3^rd and 5^th harmonics by using a dead band PWM generator and a band-pass filter.

In order to be able to understand the functionality better, following pre-readings are suggested:

AN2168: Understanding switched capacitor filters - Discusses how low pass, band pass and notch filters can be implemented using switched capacitor blocks.

KB Article: Generation of non-overlapping signals using dead band PWM generator.

• Nlradio.asm
• Nlradio.h
• Nlradio.inc
• Nlspi.asm

This document describes the APIs exposed by the WUSB-NL driver.

The WUSB-NL radio driver is used in wireless mouse, keyboard, and bridge application software stacks. The WUSB-NL radio driver is modular and can be used as a library. The API exported by this module is explained in this document.

Because PSoC 1 offers billions of configuration options, the PSoC device must be properly initialized after reset to fulfill its potential. The PSoC Designer boot process performs these necessary initialization tasks before entering main to provide an optimal working environment. This application note explains the device initialization procedure, but this document is not required reading for users of PSoC 1 or the PSoC Designer integrated development environment (IDE). The information is for users seeking a deeper understanding of PSoC and PSoC Designer initialization before main is executed.

PSoC® 1 Boot Process from Reset to Main

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Several common debugging techniques are described to help you solve common problems, such as stack overflow and memory corruption. A troubleshooting guide is included. 

Introduction

The purpose of this application note is to introduce the hardware and software debugger elements available in PSoC 1 and to describe several common debugging techniques.

The primary hardware elements of the debugging system are an In-Circuit-Emulator (ICE) and a debug pod with an on chip debugger (OCD) enabled PSoC 1 device. Those elements, and instructions on configuring and using them, are described in the Debugging Hardware portion of this application note.

PSoC 1 Getting Started Debugging - Part 1

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Introduction

When designing with the PSoC 1 family of microcontrollers, you use PSoC Designer and its highlevel interface to configure the PSoC, including the analog architecture. In addition to placing and configuring the individual user modules (building blocks), several global analog parameters also require configuration. Understanding these global parameters and the overall analog architecture is important, especially when a design consists of several analog user modules that are affected by these settings.
 

In the following videos, Dave implements Analog to Digital converters in a project and shows the tools he'll be using for designing robust analog-output sensor signal paths.

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The focus of the application note is on features specific to the ImageCraft compiler that can be modified to optimize code. General code optimization techniques for C language are only handled briefly in this application note.

This application note is for PSoC1 M8C CPU.

For PSoC3 8051 CPU, please see AN60630 - PSoC® 3 - 8051 Code Optimization

For PSoC5 ARM Cortex-M3 CPU, please see ARM Documentation

Segment LCDs are available in two forms - segment LCD glass and the segment LCD module, which comes with inbuilt driver. Many times, it is difficult to get all the required display features on a LCD module. One possibility is to use a custom LCD glass and an external driver. But this increases the cost of the system. Cypress PSoC chip can do segment LCD glass drive besides executing some other major tasks with its configurable digital/analog hardware and with its 8-bit MCU. It integrates multiple functions of the system within a single chip offering significant BOM savings.

To assist in design development, PSoC Designer provides SLCD user module. It supports following features:

• Multiplexed LCD glass drive, 1/2 bias
• 2, 3 and 4 common LCD drive
• 30Hz to 150Hz refresh rate
• Type A waveform
• Contrast control 

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The source code provided can be easily ported to any microntroller used as the host in the system. However, the application note does not describe the programming protocol. For details on programming protocol, please refer to the following documents:

• PSoC1 – Device programming specifications (AN2026A) – ISSP programming specifications for following device families: CY8C21x23, CY8C21x34, CY8C23x33, CY8C24x23A, CY8C27x43, CY8CTMG110, CY8CTST110

• PSoC1 – Device programming specifications (AN2026B) – ISSP programming specifications for following device families: CY8C21x45, CY8C22x45, CY8C24x94, CY8C28xxx, CY8C29x66, CY8CTST120, CY8CTMA120, CY8CTMG120, CY7C64215

You can find the complete list of PSoC programmer hardware, software, documentation and 3^rd party vendor relationships here: General PSoC Programming.

The app note explains each parameter under the Global Resources, the relevance of each parameter to the operation of the device, points to remember while configuring these parameters, registers that affect the parameters, and code snippets to change these parameters during runtime.

This Application Note outlines a simple, almost all-hardware method for detecting FSK signals using the analog signal processing capabilities of the PSoC 1 device. It describes circuits and signal processing techniques for demodulation. This signal processing technique is readily applicable to caller ID and several modem standards but it is not a complete modem; it does not include the phone line or other interfaces; it also does not include the data processing code.

A separate project is included and outlined in the Appendix A to simplify testing of the demodulator.

In order to be able to understand the implementation, following pre-readings are suggested:

AN2041: Understanding switched capacitor blocks – Explains the operation of switched capacitor blocks, and provides practical examples for their use.

AN2168: Understanding switched capacitor filters - Discusses how low pass, band pass and notch filters can be implemented using switched capacitor blocks.

KB Article: Implementation of a full wave rectifier and low pass filtering using all hardware technique.

The thermocouple (TC) is a voltage output device that measures the temperature difference between the sensor tip and a reference junction (called the cold junction). This is a relative measurement and to be accurate, the reference lead temperature must also be known. Type K thermocouples have an average output of approximately 40.7 μV/°C. This output is approximately linear.

Correlated Double Sampling (CDS) provides a means to efficiently subtract offset and remove drift, and low frequency noise from this sensitive measurement. This technique works just as well for differential measurements such as pressure sensors and load cells.

Reading the following application notes will aid in better understanding of this application note:

AN74170 – PSoC 1 Analog structure and configuration with PSoC Designer - Discusses in detail about the architecture of analog blocks in PSoC 1 and how they can be configured to implement a particular functionality.

AN2224 – Lower noise continuous time signal processing - Provide an introduction to semiconductor noise phenomena and specifics on PSoC noise parameters.

AN2219 – Selecting Analog Ground and reference - Describes the internal ground and reference settings in detail and how they can be routed at the output to provide a reference.
 

PSoC 1 - Correlated Double Sampling Video

This video presents low noise signal processing in PSoC® 1 through the use of Correlated Double Sampling (CDS) to reduce errors due to offset, drift, and low frequency noise.

• A brief explanation of how an opamp works.
• An explanation of how a switched capacitor integrator can emulate an opamp (faux opamp).
• Examples of faux opamp circuits.
   

This application note does not give in depth information about switched capacitor blocks. For more information please refer AN2041  PSoC 1 – Understanding PSoC 1 Switched Capacitor Analog Blocks.

In the following video, Dave highlights the importance of References and Analog Ground using a PSoC Designer Project.

• Low Pass Filters
• Band Pass Filters
• High Pass Filters
• Notch Filters

This Application note discusses how these filters can be implemented using the Switched Capacitor Blocks in PSoC 1.  The application note discusses the following topics.

• Basics of filters like universal filter transfer function, various variables that construct a filter (Roll off Frequency, Damping, High pass coefficient, Band pass coefficient and Low pass coefficient)
• Detailed mathematical analysis of how the filters are implemented in PSoC 1 SC Blocks
• A tool FilterCalc.exe which can be used to calculate capacitor values for given roll off frequency, damping value and column clock
• Using FilterCalc.exe to configure a Low pass filter and a Band pass filter
• Excel spreadsheet wizard that simplifies the task of configuring filters
• Examples for Low pass filter and Band pass filters using the spread sheet
• Construction of a Notch filter and Elliptical filter

Please refer  AN2041 – Understanding PSoC 1 Switched Capacitor Analog Blocks for more details about the basics of switched capacitor blocks.

The zip file that may be found in the Related Files section, has example projects for each type of filter, example filter wizard spread sheet and the FilterCalc application.
 

In the following video, Dave explains filter choices with a PSoC Designer project.

This application note presents an example design for implementing the baseband functions of a Direct Sequence Spread Spectrum (DSSS) transmitter with the PSoC® 1 programmable system on-chip.

Below is a short video summarizing the AN. This video provides a brief overview of Dynamic Reconfiguration, and how to configure PSoC Designer for Dynamic Reconfiguration.

Optical sensors based on detection of light beam interruption by moving objects are widely used in automatic door opening systems and are also used in various industrial applications for measuring liquids level in the tanks, goods quantity calculation and movable parts position. These sensors typically consist of a light source and a photodiode and signal detection circuit, which compares photodiode signal level with a reference signal. The main drawbacks of this approach lie in high sensor noise and sensitivity characteristics which can cause false detection. This drawback can be eliminated by using modulated light instead of constant light and using correlation techniques to make decisions about presence or absence of an object between the light source and the photo diode. This approach is demonstrated in this application note using PSoC® Programmable Systems On Chip.

PSoC 1 - Understanding Switched Capacitor Blocks

Introduction

Performing multiplication can be tedious without dedicated hardware. Any dedicated hardware multiplier has finite resolution and applications may arise where more resolution is required. This application note describes the techniques that enable the PSoC 1 MCU to quickly multiply multiple-byte-operands and give a full resolution output.

PSoC 1 microcontroller’s external crystal oscillator (ECO) can be used as a reference for timekeeping and other low-speed (<32 kHz) operations. It can also act as the reference for the phase-locked loop (PLL) mode of the internal main oscillator (IMO). The PLL uses the 32.768 kHz input to generate a more accurate 24-MHz clock signal. This is used for operations that require an accurate high-speed clock such as dual-tone multifrequency (DTMF) signal generation and serial communications. Optimal performance from the ECO for each of these functions requires different external components and control register settings.

 

In the following video, Dave explains buffers using a PSoC Designer project.

This app note also provides the working principle and features of an induction cooker. It then discusses how the complete system can be implemented using CY8C22x45.

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This includes an overview of the basics of the I2C protocol, followed by a discussion of how I2C is implemented in PSOC 1. This discussion includes a brief overview of each I2C User Module (UM) and their advantages and disadvantages. In addition, special I2C considerations are discussed, such as: pull-up resistors, clock stretching, ISSP, and Hot Swapping. After reading this application note, the reader should have an understanding of how I2C works, how it is implemented in PSoC 1, and how to choose the correct user module for a design. Detailed examples and example projects are not provided, for that information the specific User Module Datasheet should be reviewed.

 *Refer to Migrating CY8CKIT-001 DVK project to CY8CKIT 030/ 050. 

1. Click on AN84741 - PSoC® 5 to PSoC 5LP Migration Guide to learn differences between PSoC 5 and PSoC 5LP.
2. For PSoC 5 project and related document, please download file AN2099_Archive.zip.

Projects associated with this application note can be downloaded from the 'Related Files' section below. For your convenience, we have provided projects that are compatible with the two most recent versions of PSoC Creator:

• AN2099.zip is used with PSoC Creator 2.1 SP1
• AN2099_Archive.zip is used with PSoC Creator 2.1/2.0

The project’s default settings may not be compatible with your device or kit, and you may need to change your project settings. For more information, see:

• User-programmable, mid-band gain
• User-programmable center frequency (20 Hz to 150 kHz) and Q with no external components
• Filter center frequency stability directly derived from clock accuracy
• Filter sampling rates up to 1.5 MHz
• Built in, zero-crossing detector

The BPF4 User Module implements a four-pole band-pass filter. The center frequency and Q (ratio of center frequency to bandwidth) are functions of the clock frequency and the ratios of the capacitor values chosen. The center frequency can be set accurately or adjusted by controlling the sample rate clock. Any of the classical all-pole filter configurations (Butterworth, Gaussian, Bessel, and Chebyshev) can be implemented. The filter output can drive the analog output bus.

General Description:

The Voltage Sequencer User Module is a flexible and easy way to implement voltage sequencing function using a PSoC 1 device. Voltage sequencing is required to ensure reliable power up and power down of power rails in a system and flag a fault condition in case of a failure. The User Module Wizard allows you to control ramp timing as well as time delays between power rails. Voltage sequencing is popularly used in computing (servers, storage arrays) as well as communication (basestation, routers, VOIP equipments) systems in addition to general industrial and consumer systems.

The User Module enables PSoC 1 to read PGOOD (power good) signals from power regulators and generate EN (enable) signals for power regulators based on user-defined ramp timing. If PSoC 1 does not receive the PGOOD signal in the user-defined 'RAMP' time, then it asserts a power-up failure interrupt and continues with the user-defined power-down sequence, if the auto power-down mode is enabled. This User Module uses an on-chip 16-bit timer (implemented using programmable digital blocks) to generate user-defined time delays.

Features: Drag-n-drop ‘virtual IC’ in PSoC Designer 5.3 or later Implements voltage sequencing in a PSoC 1 device Provides a graphical Wizard for configuration Reads PGOOD signals and generates EN signals Enables user-defined time delays and power-up as well as power-down sequences Detects a fault in case of a failure
	Voltage Sequencer User Module Wizard

Related Pages: Application Notes, Technical Reference Manuals, Design Guides

General Description:

The SmartSense2X User Module helps you design CapSense based touch buttons and sliders. This User Module includes auto-tuning algorithm implemented by Cypress that auto-tunes the design and avoids need of extensive engineering and manual tuning. As manual tuning is not required, this User Module improves time-to-market and reduces production cost. The SmartSense2X User Module adapts to noise and other environmental changes and provided industry’s most reliable touch solution. This User Module empowers you to make your design water-tolerant with a simple selection of shield electrode from the drop-down list. The SmartSense2X user module includes background scanning feature that provides more CPU bandwidth for other process. Some of the applications where this User Module can be used are home appliances, consumer electronics, learning kits, medical appliances etc.

Features: Dual channel scanning to reduce scanning time Configurable sensitivity for each sensor Supports background scanning to improve system performance Supports buttons, sliders, and proximity sensors Supports water-tolerance using shield electrode
	SmartSense2X Wizard configures CapSense quickly

Related Pages: Application Notes, Technical Reference Manuals, Design Guides

General Description:

The Thermistor User Module measures the temperature from a Thermistor using PSoC 1 device. This User Module implements complete Analog Front End (AFE) needed for Thermistor interface. It also implements the required firmware that provides the digital output directly proportional to the temperature.

This User Module implements ratiometric interface for Thermistor. On-chip analog multiplexer is used to switch between the channels. Two buffered references are used to excite the sensor circuit. A Programmable Gain Amplifier (PGA) that is implemented using continuous time block is used to provide required gain. Then, ADC converts the amplifier’s output to digital format. M8C core converts this digital voltage output into the temperature either using the Steinhart-Hart equation or the Lookup table based on user selection.

Features: Implements complete AFE for Thermistor interfacing using PSoC 1 Calculates temperature either using the Steinhart-Hart equation or the Lookup Table Provides output in signed or unsigned data format Compensates for offset error User Module wizard helps in configuring the User Module quickly
	Thermistor User Module Wizard

Related Pages: Application Notes, Technical Reference Manuals, Design Guides

General Description:

The Gas Sensor Analog Front End (AFE) User Module in PSoC Designer is a virtual IC that implements the required analog front-end for three-lead electrochemical gas sensors in PSoC 1. Once you place this User Module in your design it configures all required hardware resources. This User Module provides an output voltage that is proportional to the gas concentration.

The Gas Sensor AFE User Module consists of two blocks - a control amplifier and a trans-impedance amplifier (TIA). Control amplifier is implemented using one continues time (CT) analog block and one switched capacitor (SC) block of PSoC 1. It is used to maintain the sensor’s required bias voltage.

The sensor provides current output proportional to the gas concentration. TIA (implemented using a CT block) converts this current signal to voltage.

Features:

• Implements configurable AFE for a three-lead electrochemical sensor
• Provides Control Amplifier to drive and control the gas sensor
• Provides TIA to convert the sensor current output to voltage
• Maintains user-settable bias voltage for the gas sensor

Related Pages: Application Notes, Technical Reference Manuals, Design Guides

General Description:

The Fan Controller User Module in PSoC Designer helps you control up to eight, four-wire fans in open-loop or closedloop mode. The Fan Controller User Module wizard enables you to select the number of fans and their configurations. Some key applications of Fan Controller are in servers, computers, projectors etc.

The Fan Controller User Module changes the fan speed using hardware PWMs implemented in programmable digital blocks in PSoC 1. It measures fan speed by reading tachometer output using a 16-bit timer and a hysteresis comparator.

In open-loop mode, PSoC 1 sets the user defined PWM duty cycle irrespective if the current fan speed. However, application programming interface (API) is provided to measure the fan speed. In closed-loop mode, a desired fan speed is achieved by PSoC 1 by controlling PWM duty cycle based on the difference between desired and current speed. In open-loop mode, this User Module supports multiple fans to be connected to the same PWM signal called “banks”.

Features: Open-loop and closed-loop control of four-wire BLDC fans User Module wizard to select the number of fans and their configuration Fan speeds ranging from 450 to 25,000 RPM Fan stall/rotor lock condition detect on all fans Selectable tolerance and damping factor Multiple fans grouped together called “banks” can be connected to one PWM output APIs to set desired speed and to read current speed

Fan Controller Wizard

Related Pages: Application Notes, Technical Reference Manuals, Design Guides

• Supports Serial Peripheral Interconnect (SPI) Slave protocol
• Supports protocol modes 0, 1, 2, and 3
• Selectable input sources for MOSI, SCLK, and ~SS
• Selectable output routing for MISO
• Programmable interrupt on SPI done condition
• SS may be firmware controlled

The SPIS User Module is a Serial Peripheral Interconnect Slave. It performs full duplex synchronous 8-bit data transfers. SCLK phase, SCLK polarity, and LSB First can be specified to accommodate most SPI protocols. The SPIS PSoC block has selectable routing for the input and output signals, and programmable interrupt driven control. Application Programming Interface (API) firmware provides a highlevel programming interface for either assembly or C application software.

• Range of -40°C to 85°C
• Accuracy of ± 20°C with no calibration
• Single PSoC block implementation
• 8-bit 2’s complement output in degrees Celsius
   

The FlashTemp User Module gives a coarse temperature measurement for the bFlashWriteBlock routine, which varies its programming pulse width with temperature. A single switch capacitor analog block is used and requires no calibration. The output of the FlashTemp User Module is the junction temperature of the PSoC microcontroller in a 2’s complement format, with 1 count per degree Celsius.

The PSoC Development Kit includes an In-Circuit Emulator (ICE) which consists of a base unit, USB 2.0 cable, and power supply. The base unit is connected to the host PC via the USB port. The ICE is driven by the Debugger subsystem of PSoC Designer. This software interface allows the user to run, halt, and single step the processor. It also allows the user to set complex event points. Event points can start and stop the trace memory on the ICE, as well as break the program execution. In addition to the Development Kit, different Emulation Pods are available to support the range of devices in the PSoC family. They plug into (or are soldered onto) the user's circuit board to provide the physical interface. Pods are available for low-cost expansion of the ICE-Cube capability.

The ICE-Cube also serves as a single-site device programmer via an ISSP (In-System Serial Programming) Cable and MiniEval board included in the kit. The MiniEval board is a programming and evaluation board which connects to the ICE-Cube via an ISSP Cable and allows programming of DIP devices. There are also other Programming boards available for programming other packages. The MiniEval also includes LEDs and a POT for simple evaluation and demonstration.

Development Kit Includes:

• PSoC Designer Software CD-ROM
• ICE-Cube In-Circuit Emulator
• Backward compatibility Cat-5 Adapter
• ISSP Cable
• Mini-Eval Programming Board in One
• USB 2.0 Cable and Blue Cat-5 Cable
• 110 ~ 240V Power Supply, Euro-Plug Adapter
• 2 CY8C29466-24PXI 28-PDIP Chip Samples

Supports following 8 bit PSoC1 (Programmable System-On Chip) families, including automotive, except CY8C25/26xxx devices.

    CY8C20x34
    CY8C20xx6A
    CY8C21x23
    CY8C21x34
    CY8C22xxx/CY8C21x45
    CY8C23x33
    CY8C24x23A/CY8C24x33
    CY8C24x94
    CY8C27x43
    CY8C28xxx
    CY8C29x66
    CY8C95xx 
 

Software Title	Description	Link
PSoC Designer	This kit requires PSoC Designer for development
PSoC Programmer	This kit requires PSoC Programmer for programming

• 8-bit resolution
• Sample rates up to 8.8 ksps
• Input range 0 to Vdd-1V

The ADC8 User Module implements a Single Slope A/D Converter that generates an 8-bit, full scale output (0 to 255 count range).

• The best analog-to-digital conversion results on CY8C21x45, CY8C22x45, and CY8C28x45 devices.
• 10-bit resolution
• One-shot conversion
• Free running conversion.
• Selectable conversion trigger
• Programmable clock divider
• Automatically enter low power mode right after conversion finishing
   

The SAR10 User Module is a 10-bit Successive Approximation Register (SAR) ADC converter that converts an input voltage to a digital code using the SAR block. It produces a 10-bit unsigned value for each sample. This user module supports three modes of analog-to-digital conversion: Software Trigger, Hardware Trigger, and Freerun.

• Best analog-to-digital conversion results on CY8C24x33 and CY8C23x33 devices
• Fast (typical 2.7 μs) conversion time
• Successive approximation functionality support
• 8-bit resolution
• Eight primary input analog channels and two internal analog channels from CT blocks
• Single conversion
• Free running conversion
• Selectable conversion trigger
• Programmable sample time
• Programmable clock divider
• Cancel/restart feature for running conversions
• Support to autoalign/trigger at any point of PWM, timer, or counter cycle
• Automatic entry into low power mode after every conversion in single conversion mode
   

The SAR8 User Module is an 8-bit successive approximation register (SAR) ADC converter that converts an input voltage to a digital code using a dedicated analog PSoC block. It features typical conversion times of 2.7 μs (limited with firmware processing) and produces an 8-bit unsigned value for each sample.