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User Module Datasheet: Triple Input 7- to 13-Bit Incremental ADC Datasheet TriADC V 2.20 (CY8C29/27xxx, CY8C28x43, CY8C28x52, CY8CLED08/16, CY8C28x45, CY8CPLC20, CY8CLED16P01) | Cypress Semiconductor

User Module Datasheet: Triple Input 7- to 13-Bit Incremental ADC Datasheet TriADC V 2.20 (CY8C29/27xxx, CY8C28x43, CY8C28x52, CY8CLED08/16, CY8C28x45, CY8CPLC20, CY8CLED16P01)

Last Updated: 
Mar 25, 2015
Version: 
2.20

Features and Overview

  • Samples three inputs simultaneously
  • 7- to 13-bit resolution, two’s complement or unsigned integers
  • Sample rates from 4 to greater than 10,000 sps
  • Maximum input range Vss to Vdd
  • Integrating converter provides good normal mode rejection
  • Internal or external clock

The TriADC is a triple input integrating ADC with an adjustable resolution between 7 and 13 bits. It can be configured to remove unwanted high frequencies by optimizing the integrate time. Input voltage ranges, including rail-to-rail, may be measured by configuring the proper reference voltage and analog ground. The output is configurable two’s complement or unsigned integers based on an input voltage between –Vref and +Vref centered at AGND.

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