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User Module Datasheet: CapSense® Sigma-Delta Plus ADC Datasheet CSDADC V 1.50 (CY8C24x94, CY8CLED0xD, CY8CLED0xG, CY8CLED04) | Cypress Semiconductor

User Module Datasheet: CapSense® Sigma-Delta Plus ADC Datasheet CSDADC V 1.50 (CY8C24x94, CY8CLED0xD, CY8CLED0xG, CY8CLED04)

Last Updated: 
Jun 04, 2013
Version: 
1.50

Features and Overview

  • Allows scanning CapSense sensors and measuring input voltages without using separate loadable configurations
  • Uses a SincN filter fully implemented in hardware to reduce CPU overhead and antialias requirements
  • Supports a configuration that uses no digital blocks
  • ADC features:
    • Sigma-delta ADC with second order modulator
    • Data in unsigned or signed 2’s complement formats
    • Dynamically changed resolution to 10,12 and 14 bits
    • Maximum sample rates of 31250 sps at 10 bit resolution, 7812 sps at 14-bit resolution
    • Input range defined by internal and external reference options
    • Built in Programmable Gain Amplifier with configurable gain and reference settings.
  • CapSense features:
    • Based on the robust CSD method
    • Second order modulator provides superior SNR performance
    • Scans 1 to 46 capacitive sensors
    • Sensing possible with up to a 25 mm glass overlay  
    • For more, see pdf

The CSDADC provides capacitance sensing using the switched capacitor technique with a sigma-delta modulator to convert the sensing switched capacitor current to digital code. 
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