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User Module Datasheet: 8-Bit Delta Sigma ADC Datasheet DELSIG8 V 3.2 (CY8C29/27/24/22xxx, CY8C23x33, CY8CLED08/16, CY8C28x45) | Cypress Semiconductor

User Module Datasheet: 8-Bit Delta Sigma ADC Datasheet DELSIG8 V 3.2 (CY8C29/27/24/22xxx, CY8C23x33, CY8CLED08/16, CY8C28x45)

Last Updated: 
Mar 27, 2015
Version: 
3.2

Features and Overview

  • 8-bit resolution
  • Data format available in 2’s complement
  • Sample rate up to 32 ksps
  • 64X over sampling with sinc2 filter reduces antialias requirements
  • Input range defined by internal and external reference options
  • Internal or external clock
  • Second order modulator available for the CY8C29/27/24/22xxx, CY8C23x33, CY8CLED08/16,CY8C28x45 families of PSoC devices
     

Note:  If this user module is used with the 29K family, it consumes an extra 6 mA. As an alternate, use the Delsig user module instead.

The DELSIG8 User Module provides an 8-bit 2’s complement conversion of an 2.6 volt full scale input signal centered around a user selected AGND, when the reference selection in the global parameter window is set to ± Bandgap. It supports sample rates from 1.8 ksps to 31 ksps. The sample rate is determined by the data clock input and is selectable by the user. Data generated by the DELSIG8 is available in the interrupt routine where the data is collected or through polling functions furnished by the DELSIG8 API.