Capacitive Sensing Made Easy, Part 2 | Cypress Semiconductor
Capacitive Sensing Made Easy, Part 2
When it comes to capacitive sensing design, layout plays a crucial role. Giving importance to layout not only aids in superior performance (lower noise and higher signal) but also helps in achieving EMI/EMC compliance. It should be kept in mind that a good layout helps in realizing the following two objectives:
1. Higher finger capacitance and lower parasitic capacitance: The signal in a given system is the sum of signals due to parasitic capacitance and those due to finger capacitance. It is important to reduce parasitic capacitance because, in order to increase a particular signal within a fixed range, the other signal must always be reduced to avoid saturating the signal.
2. Lower noise: This helps in making the system more reliable and avoid false detects.