QDR®-IV SRAM Xilinx® Virtex®-7 FPGA Memory Interface Design | Cypress Semiconductor
QDR®-IV SRAM Xilinx® Virtex®-7 FPGA Memory Interface Design
The Cypress QDR®-IV SRAM interface design is a fully synthesizable controller and physical layer (PHY) on Xilinx® Virtex®-7 FPGAs. QDR-IV, the latest generation of the high-performance QDR SRAM family, provides a Random Transaction Rate (RTR) of 2132 MT/s on two independent bi-directional data ports.
Cypress offers a reference design memory controller for Xilinx® FPGAs to qualified QDR-IV customers. If you already have an NDA with Cypress, please contact firstname.lastname@example.org for controller availability. If you do not, please complete the NDA below and send to email@example.com.