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CYRS1542AV18, CYRS1544AV18: 72-Mbit QDR® II+ SRAM Two-Word Burst Architecture with RadStop™ Technology | Cypress Semiconductor

CYRS1542AV18, CYRS1544AV18: 72-Mbit QDR® II+ SRAM Two-Word Burst Architecture with RadStop™ Technology

Last Updated: 
Nov 14, 2017
Version: 
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72-Mbit QDR® II+ SRAM Two-Word Burst Architecture with RadStop™ Technology

Features

  • Separate independent read and write data ports
    • Supports concurrent transactions
  • 250-MHz clock for high bandwidth
  • Two-word burst on all accesses
  • Double data rate (DDR) interfaces on both read and write ports at 250 MHz (data transferred at 500 MHz)
  • Two input clocks (K and K) for precise DDR timing
    • SRAM uses rising edges only
  • Echo clocks (CQ and CQ) simplify data capture in high speed systems
  • Single multiplexed address input bus latches address inputs for both read and write ports
  • Separate port selects for depth expansion
  • For more, see pdf

Functional Description

The CYRS1542AV18 and CYRS1544AV18 are synchronous pipelined SRAMs, equipped with 1.8-V QDR II+ architecture with RadStop™ technology. Cypress’s state-of-the-art RadStop Technology is radiation hardened through proprietary design and process hardening techniques.