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CY7C4022KV13/CY7C4042KV13, 72-Mbit QDR™-IV XP SRAM | Cypress Semiconductor

CY7C4022KV13/CY7C4042KV13, 72-Mbit QDR™-IV XP SRAM

Last Updated: 
Aug 07, 2016



  • 72-Mbit density (4 M × 18, 2 M × 36)
  • Total Random Transaction Rate of 2132 MT/s
  • Maximum operating frequency of 1066 MHz
  • Read latency of 8.0 clock cycles and Write Latency of 5.0 clock cycles
  • 8 bank architecture enables one access per bank per cycle
  • Two-word burst on all accesses
  • Dual independent bi-directional data ports
  • Single address port used to control both data ports
  • Single data rate (SDR) control signaling
  • For more, see pdf


Functional Description


The QDR-IV XP (Xtreme Performance) SRAM is a high performance memory device that has been optimized to maximize the number of random transactions per second by the use of two independent bi-directional data ports.

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