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CY7C1480V33: 72-Mbit (2M x 36) Pipelined Sync SRAM | Cypress Semiconductor

CY7C1480V33: 72-Mbit (2M x 36) Pipelined Sync SRAM

Last Updated: 
Sep 06, 2017
Version: 
*Q

72-Mbit (2M x 36) Pipelined Sync SRAM

Features

  • Supports bus operation up to 200 MHz
  • Available speed grades are 200 and 167 MHz
  • Registered inputs and outputs for pipelined operation
  • 3.3 V core power supply
  • 2.5 V/3.3 V I/O operation
  • Fast clock-to-output times
    • 3.0 ns (for 200 MHz device)
  • Provide high performance 3-1-1-1 access rate
  • User selectable burst counter supporting Intel® Pentium® interleaved or linear burst sequences
  • For more, see pdf
     

Functional Description

The CY7C1480V33 SRAM integrates 2 M × 36 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input (CLK).