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CY7C135: 4 K × 8 Dual-Port Static RAM | Cypress Semiconductor

CY7C135: 4 K × 8 Dual-Port Static RAM

Last Updated: 
Aug 26, 2015

4 K × 8 Dual-Port Static RAM


  • True dual-ported memory cells, which allow simultaneous reads of the same memory location
  • 4 K × 8 organization
  • 0.65 micron CMOS for optimum speed and power
  • High speed access: 15 ns
  • Low operating power: ICC = 180 mA (max)
  • Fully asynchronous operation
  • Automatic power down
  • Available in 52-pin plastic leaded chip carrier (PLCC)
  • Pb-free packages available
  • For more, see pdf.

Functional Description

The CY7C135 is a high speed CMOS 4K x 8 dual-port static RAMs. Two ports are provided permitting independent, asynchronous access for reads and writes to any location in memory. Application areas include interprocessor/multiprocessor designs, communications status buffering, and dual-port video/graphics memory.

Each port has independent control pins: chip enable (CE), read or write enable (R/W), and output enable (OE). The CY7C135 is suited for those systems that do not require on-chip arbitration or are intolerant of wait states. Therefore, the user must be aware that simultaneous access to a location is possible. An automatic power down feature is controlled independently on each port by a chip enable (CE) pin.

The CY7C135 is available in 52-pin PLCC.